drivers/net/wireless/rockchip_wlan/rtl8723cs/include/rtw_pwrctrl.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #ifndef __RTW_PWRCTRL_H_
  21 #define __RTW_PWRCTRL_H_
  22
  23
  24 #define FW_PWR0 0
  25 #define FW_PWR1 1
  26 #define FW_PWR2 2
  27 #define FW_PWR3 3
  28
  29
  30 #define HW_PWR0 7
  31 #define HW_PWR1 6
  32 #define HW_PWR2 2
  33 #define HW_PWR3 0
  34 #define HW_PWR4 8
  35
  36 #define FW_PWRMSK       0x7
  37
  38
  39 #define XMIT_ALIVE      BIT(0)
  40 #define RECV_ALIVE      BIT(1)
  41 #define CMD_ALIVE       BIT(2)
  42 #define EVT_ALIVE       BIT(3)
  43 #ifdef CONFIG_BT_COEXIST
  44 #define BTCOEX_ALIVE    BIT(4)
  45 #endif /* CONFIG_BT_COEXIST */
  46
  47 #ifdef CONFIG_WOWLAN
  48 #ifdef CONFIG_DEFAULT_PATTERNS_EN
  49         #ifdef CONFIG_PLATFORM_ANDROID_INTEL_X86
  50                 /* TCP/ICMP/UDP multicast with specific IP addr */
  51                 #define DEFAULT_PATTERN_NUM 3
  52         #else
  53                 /* TCP/ICMP */
  54                 #define DEFAULT_PATTERN_NUM 2
  55         #endif
  56 #else
  57         #define DEFAULT_PATTERN_NUM 0
  58 #endif /*CONFIG_DEFAULT_PATTERNS_EN*/
  59
  60 #ifdef CONFIG_WOW_PATTERN_HW_CAM        /* Frame Mask Cam number for pattern match */
  61 #define MAX_WKFM_CAM_NUM        12
  62 #else
  63 #define MAX_WKFM_CAM_NUM        16
  64 #endif
  65
  66 #define MAX_WKFM_SIZE   16 /* (16 bytes for WKFM bit mask, 16*8 = 128 bits) */
  67 #define MAX_WKFM_PATTERN_SIZE   128
  68 #define WKFMCAM_ADDR_NUM 6
  69 #define WKFMCAM_SIZE 24 /* each entry need 6*4 bytes */
  70 enum pattern_type {
  71         PATTERN_BROADCAST = 0,
  72         PATTERN_MULTICAST,
  73         PATTERN_UNICAST,
  74         PATTERN_VALID,
  75         PATTERN_INVALID,
  76 };
  77
  78 typedef struct rtl_priv_pattern {
  79         int len;
  80         char content[MAX_WKFM_PATTERN_SIZE];
  81         char mask[MAX_WKFM_SIZE];
  82 } rtl_priv_pattern_t;
  83
  84 #endif /* CONFIG_WOWLAN */
  85
  86 enum Power_Mgnt {
  87         PS_MODE_ACTIVE  = 0     ,
  88         PS_MODE_MIN                     ,
  89         PS_MODE_MAX                     ,
  90         PS_MODE_DTIM                    ,       /* PS_MODE_SELF_DEFINED */
  91         PS_MODE_VOIP                    ,
  92         PS_MODE_UAPSD_WMM       ,
  93         PS_MODE_UAPSD                   ,
  94         PS_MODE_IBSS                    ,
  95         PS_MODE_WWLAN           ,
  96         PM_Radio_Off                    ,
  97         PM_Card_Disable         ,
  98         PS_MODE_NUM,
  99 };
 100
 101 #ifdef CONFIG_PNO_SUPPORT
 102 #define MAX_PNO_LIST_COUNT 16
 103 #define MAX_SCAN_LIST_COUNT 14  /* 2.4G only */
 104 #define MAX_HIDDEN_AP 8         /* 8 hidden AP */
 105 #endif
 106
 107 /*
 108         BIT[2:0] = HW state
 109         BIT[3] = Protocol PS state,   0: register active state , 1: register sleep state
 110         BIT[4] = sub-state
 111 */
 112
 113 #define PS_DPS                          BIT(0)
 114 #define PS_LCLK                         (PS_DPS)
 115 #define PS_RF_OFF                       BIT(1)
 116 #define PS_ALL_ON                       BIT(2)
 117 #define PS_ST_ACTIVE            BIT(3)
 118
 119 #define PS_ISR_ENABLE           BIT(4)
 120 #define PS_IMR_ENABLE           BIT(5)
 121 #define PS_ACK                          BIT(6)
 122 #define PS_TOGGLE                       BIT(7)
 123
 124 #define PS_STATE_MASK           (0x0F)
 125 #define PS_STATE_HW_MASK        (0x07)
 126 #define PS_SEQ_MASK                     (0xc0)
 127
 128 #define PS_STATE(x)             (PS_STATE_MASK & (x))
 129 #define PS_STATE_HW(x)  (PS_STATE_HW_MASK & (x))
 130 #define PS_SEQ(x)               (PS_SEQ_MASK & (x))
 131
 132 #define PS_STATE_S0             (PS_DPS)
 133 #define PS_STATE_S1             (PS_LCLK)
 134 #define PS_STATE_S2             (PS_RF_OFF)
 135 #define PS_STATE_S3             (PS_ALL_ON)
 136 #define PS_STATE_S4             ((PS_ST_ACTIVE) | (PS_ALL_ON))
 137
 138
 139 #define PS_IS_RF_ON(x)  ((x) & (PS_ALL_ON))
 140 #define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE))
 141 #define CLR_PS_STATE(x) ((x) = ((x) & (0xF0)))
 142
 143
 144 struct reportpwrstate_parm {
 145         unsigned char mode;
 146         unsigned char state; /* the CPWM value */
 147         unsigned short rsvd;
 148 };
 149
 150
 151 typedef _sema _pwrlock;
 152
 153
 154 __inline static void _init_pwrlock(_pwrlock *plock)
 155 {
 156         _rtw_init_sema(plock, 1);
 157 }
 158
 159 __inline static void _free_pwrlock(_pwrlock *plock)
 160 {
 161         _rtw_free_sema(plock);
 162 }
 163
 164
 165 __inline static void _enter_pwrlock(_pwrlock *plock)
 166 {
 167         _rtw_down_sema(plock);
 168 }
 169
 170
 171 __inline static void _exit_pwrlock(_pwrlock *plock)
 172 {
 173         _rtw_up_sema(plock);
 174 }
 175
 176 #define LPS_DELAY_TIME  1*HZ /* 1 sec */
 177
 178 #define EXE_PWR_NONE    0x01
 179 #define EXE_PWR_IPS             0x02
 180 #define EXE_PWR_LPS             0x04
 181
 182 /* RF state. */
 183 typedef enum _rt_rf_power_state {
 184         rf_on,          /* RF is on after RFSleep or RFOff */
 185         rf_sleep,       /* 802.11 Power Save mode */
 186         rf_off,         /* HW/SW Radio OFF or Inactive Power Save */
 187         /* =====Add the new RF state above this line===== */
 188         rf_max
 189 } rt_rf_power_state;
 190
 191 /* RF Off Level for IPS or HW/SW radio off */
 192 #define RT_RF_OFF_LEVL_ASPM                     BIT(0)  /* PCI ASPM */
 193 #define RT_RF_OFF_LEVL_CLK_REQ          BIT(1)  /* PCI clock request */
 194 #define RT_RF_OFF_LEVL_PCI_D3                   BIT(2)  /* PCI D3 mode */
 195 #define RT_RF_OFF_LEVL_HALT_NIC         BIT(3)  /* NIC halt, re-initialize hw parameters */
 196 #define RT_RF_OFF_LEVL_FREE_FW          BIT(4)  /* FW free, re-download the FW */
 197 #define RT_RF_OFF_LEVL_FW_32K           BIT(5)  /* FW in 32k */
 198 #define RT_RF_PS_LEVEL_ALWAYS_ASPM      BIT(6)  /* Always enable ASPM and Clock Req in initialization. */
 199 #define RT_RF_LPS_DISALBE_2R                    BIT(30) /* When LPS is on, disable 2R if no packet is received or transmittd. */
 200 #define RT_RF_LPS_LEVEL_ASPM                    BIT(31) /* LPS with ASPM */
 201
 202 #define RT_IN_PS_LEVEL(ppsc, _PS_FLAG)          ((ppsc->cur_ps_level & _PS_FLAG) ? _TRUE : _FALSE)
 203 #define RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG)       (ppsc->cur_ps_level &= (~(_PS_FLAG)))
 204 #define RT_SET_PS_LEVEL(ppsc, _PS_FLAG)         (ppsc->cur_ps_level |= _PS_FLAG)
 205
 206 /* ASPM OSC Control bit, added by Roger, 2013.03.29. */
 207 #define RT_PCI_ASPM_OSC_IGNORE          0        /* PCI ASPM ignore OSC control in default */
 208 #define RT_PCI_ASPM_OSC_ENABLE          BIT0 /* PCI ASPM controlled by OS according to ACPI Spec 5.0 */
 209 #define RT_PCI_ASPM_OSC_DISABLE         BIT1 /* PCI ASPM controlled by driver or BIOS, i.e., force enable ASPM */
 210
 211
 212 enum _PS_BBRegBackup_ {
 213         PSBBREG_RF0 = 0,
 214         PSBBREG_RF1,
 215         PSBBREG_RF2,
 216         PSBBREG_AFE0,
 217         PSBBREG_TOTALCNT
 218 };
 219
 220 enum { /* for ips_mode */
 221         IPS_NONE = 0,
 222         IPS_NORMAL,
 223         IPS_LEVEL_2,
 224         IPS_NUM
 225 };
 226
 227 /* Design for pwrctrl_priv.ips_deny, 32 bits for 32 reasons at most */
 228 typedef enum _PS_DENY_REASON {
 229         PS_DENY_DRV_INITIAL = 0,
 230         PS_DENY_SCAN,
 231         PS_DENY_JOIN,
 232         PS_DENY_DISCONNECT,
 233         PS_DENY_SUSPEND,
 234         PS_DENY_IOCTL,
 235         PS_DENY_MGNT_TX,
 236         PS_DENY_MONITOR_MODE,
 237         PS_DENY_BEAMFORMING,            /* Beamforming */
 238         PS_DENY_DRV_REMOVE = 30,
 239         PS_DENY_OTHERS = 31
 240 } PS_DENY_REASON;
 241
 242 #ifdef CONFIG_PNO_SUPPORT
 243 typedef struct pno_nlo_info {
 244         u32 fast_scan_period;                           /* Fast scan period */
 245         u8      ssid_num;                               /* number of entry */
 246         u8      hidden_ssid_num;
 247         u32     slow_scan_period;                       /* slow scan period */
 248         u32     fast_scan_iterations;                   /* Fast scan iterations */
 249         u8      ssid_length[MAX_PNO_LIST_COUNT];        /* SSID Length Array */
 250         u8      ssid_cipher_info[MAX_PNO_LIST_COUNT];   /* Cipher information for security */
 251         u8      ssid_channel_info[MAX_PNO_LIST_COUNT];  /* channel information */
 252         u8      loc_probe_req[MAX_HIDDEN_AP];           /* loc_probeReq */
 253 } pno_nlo_info_t;
 254
 255 typedef struct pno_ssid {
 256         u32             SSID_len;
 257         u8              SSID[32];
 258 } pno_ssid_t;
 259
 260 typedef struct pno_ssid_list {
 261         pno_ssid_t      node[MAX_PNO_LIST_COUNT];
 262 } pno_ssid_list_t;
 263
 264 typedef struct pno_scan_channel_info {
 265         u8      channel;
 266         u8      tx_power;
 267         u8      timeout;
 268         u8      active;                         /* set 1 means active scan, or pasivite scan. */
 269 } pno_scan_channel_info_t;
 270
 271 typedef struct pno_scan_info {
 272         u8      enableRFE;                      /* Enable RFE */
 273         u8      period_scan_time;               /* exclusive with fast_scan_period and slow_scan_period */
 274         u8      periodScan;                     /* exclusive with fast_scan_period and slow_scan_period */
 275         u8      orig_80_offset;                 /* original channel 80 offset */
 276         u8      orig_40_offset;                 /* original channel 40 offset */
 277         u8      orig_bw;                        /* original bandwidth */
 278         u8      orig_ch;                        /* original channel */
 279         u8      channel_num;                    /* number of channel */
 280         u64     rfe_type;                       /* rfe_type && 0x00000000000000ff */
 281         pno_scan_channel_info_t ssid_channel_info[MAX_SCAN_LIST_COUNT];
 282 } pno_scan_info_t;
 283 #endif /* CONFIG_PNO_SUPPORT */
 284
 285 #ifdef CONFIG_LPS_POFF
 286 /* Driver context for LPS 32K Close IO Power */
 287 typedef struct lps_poff_info {
 288         bool    bEn;
 289         u8      *pStaticFile;
 290         u8      *pDynamicFile;
 291         u32     ConfFileOffset;
 292         u32     tx_bndy_static;
 293         u32     tx_bndy_dynamic;
 294         u16     ConfLenForPTK;
 295         u16     ConfLenForGTK;
 296         ATOMIC_T bEnterPOFF;
 297         ATOMIC_T bTxBoundInProgress;
 298         ATOMIC_T bSetPOFFParm;
 299 } lps_poff_info_t;
 300 #endif /*CONFIG_LPS_POFF*/
 301
 302 struct aoac_report {
 303         u8 iv[8];
 304         u8 replay_counter_eapol_key[8];
 305         u8 group_key[32];
 306         u8 key_index;
 307         u8 security_type;
 308 };
 309
 310 struct pwrctrl_priv {
 311         _pwrlock        lock;
 312         _pwrlock        check_32k_lock;
 313         volatile u8 rpwm; /* requested power state for fw */
 314         volatile u8 cpwm; /* fw current power state. updated when 1. read from HCPWM 2. driver lowers power level */
 315         volatile u8 tog; /* toggling */
 316         volatile u8 cpwm_tog; /* toggling */
 317
 318         u8      pwr_mode;
 319         u8      smart_ps;
 320         u8      bcn_ant_mode;
 321         u8      dtim;
 322
 323         u32     alives;
 324         _workitem cpwm_event;
 325         _workitem dma_event; /*for handle un-synchronized tx dma*/
 326 #ifdef CONFIG_LPS_RPWM_TIMER
 327         u8 brpwmtimeout;
 328         _workitem rpwmtimeoutwi;
 329         _timer pwr_rpwm_timer;
 330 #endif /* CONFIG_LPS_RPWM_TIMER */
 331         u8      bpower_saving; /* for LPS/IPS */
 332
 333         u8      b_hw_radio_off;
 334         u8      reg_rfoff;
 335         u8      reg_pdnmode; /* powerdown mode */
 336         u32     rfoff_reason;
 337
 338         /* RF OFF Level */
 339         u32     cur_ps_level;
 340         u32     reg_rfps_level;
 341
 342         uint    ips_enter_cnts;
 343         uint    ips_leave_cnts;
 344         uint    lps_enter_cnts;
 345         uint    lps_leave_cnts;
 346
 347         u8      ips_mode;
 348         u8      ips_org_mode;
 349         u8      ips_mode_req; /* used to accept the mode setting request, will update to ipsmode later */
 350         uint bips_processing;
 351         u32 ips_deny_time; /* will deny IPS when system time is smaller than this */
 352         u8 pre_ips_type;/* 0: default flow, 1: carddisbale flow */
 353
 354         /* ps_deny: if 0, power save is free to go; otherwise deny all kinds of power save. */
 355         /* Use PS_DENY_REASON to decide reason. */
 356         /* Don't access this variable directly without control function, */
 357         /* and this variable should be protected by lock. */
 358         u32 ps_deny;
 359
 360         u8 ps_processing; /* temporarily used to mark whether in rtw_ps_processor */
 361
 362         u8 fw_psmode_iface_id;
 363         u8      bLeisurePs;
 364         u8      LpsIdleCount;
 365         u8      power_mgnt;
 366         u8      org_power_mgnt;
 367         u8      bFwCurrentInPSMode;
 368         u32     DelayLPSLastTimeStamp;
 369         s32             pnp_current_pwr_state;
 370         u8              pnp_bstop_trx;
 371
 372
 373         u8              bInternalAutoSuspend;
 374         u8              bInSuspend;
 375 #ifdef CONFIG_BT_COEXIST
 376         u8              bAutoResume;
 377         u8              autopm_cnt;
 378 #endif
 379         u8              bSupportRemoteWakeup;
 380         u8              wowlan_wake_reason;
 381         u8              wowlan_last_wake_reason;
 382         u8              wowlan_ap_mode;
 383         u8              wowlan_mode;
 384         u8              wowlan_p2p_mode;
 385         u8              wowlan_pno_enable;
 386 #ifdef CONFIG_GPIO_WAKEUP
 387         u8              is_high_active;
 388 #endif /* CONFIG_GPIO_WAKEUP */
 389 #ifdef CONFIG_WOWLAN
 390         u8              wowlan_txpause_status;
 391         u8              wowlan_pattern_idx;
 392         u8              wowlan_in_resume;
 393         u64             wowlan_fw_iv;
 394         struct rtl_priv_pattern patterns[MAX_WKFM_CAM_NUM];
 395 #ifdef CONFIG_PNO_SUPPORT
 396         u8              pno_inited;
 397         pno_nlo_info_t  *pnlo_info;
 398         pno_scan_info_t *pscan_info;
 399         pno_ssid_list_t *pno_ssid_list;
 400 #endif /* CONFIG_PNO_SUPPORT */
 401 #ifdef CONFIG_WOW_PATTERN_HW_CAM
 402         _mutex  wowlan_pattern_cam_mutex;
 403 #endif
 404         u8              wowlan_aoac_rpt_loc;
 405         struct aoac_report wowlan_aoac_rpt;
 406 #endif /* CONFIG_WOWLAN */
 407         _timer  pwr_state_check_timer;
 408         int             pwr_state_check_interval;
 409         u8              pwr_state_check_cnts;
 410
 411         int             ps_flag; /* used by autosuspend */
 412
 413         rt_rf_power_state       rf_pwrstate;/* cur power state, only for IPS */
 414         /* rt_rf_power_state    current_rfpwrstate; */
 415         rt_rf_power_state       change_rfpwrstate;
 416
 417         u8              bHWPowerdown; /* power down mode selection. 0:radio off, 1:power down */
 418         u8              bHWPwrPindetect; /* come from registrypriv.hwpwrp_detect. enable power down function. 0:disable, 1:enable */
 419         u8              bkeepfwalive;
 420         u8              brfoffbyhw;
 421         unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT];
 422
 423 #ifdef CONFIG_RESUME_IN_WORKQUEUE
 424         struct workqueue_struct *rtw_workqueue;
 425         _workitem resume_work;
 426 #endif
 427
 428 #ifdef CONFIG_HAS_EARLYSUSPEND
 429         struct early_suspend early_suspend;
 430         u8 do_late_resume;
 431 #endif /* CONFIG_HAS_EARLYSUSPEND */
 432
 433 #ifdef CONFIG_ANDROID_POWER
 434         android_early_suspend_t early_suspend;
 435         u8 do_late_resume;
 436 #endif
 437
 438 #ifdef CONFIG_INTEL_PROXIM
 439         u8      stored_power_mgnt;
 440 #endif
 441
 442 #ifdef CONFIG_LPS_POFF
 443         lps_poff_info_t *plps_poff_info;
 444 #endif
 445
 446 #ifdef CONFIG_LPS_PG
 447         u8 lpspg_rsvd_page_locate;
 448         u8 blpspg_info_up;
 449 #endif
 450         u8 current_lps_hw_port_id;
 451 };
 452
 453 #define rtw_get_ips_mode_req(pwrctl) \
 454         (pwrctl)->ips_mode_req
 455
 456 #define rtw_ips_mode_req(pwrctl, ips_mode) \
 457         (pwrctl)->ips_mode_req = (ips_mode)
 458
 459 #define RTW_PWR_STATE_CHK_INTERVAL 2000
 460
 461 #define _rtw_set_pwr_state_check_timer(pwrctl, ms) \
 462         do { \
 463                 /*RTW_INFO("%s _rtw_set_pwr_state_check_timer(%p, %d)\n", __FUNCTION__, (pwrctl), (ms));*/ \
 464                 _set_timer(&(pwrctl)->pwr_state_check_timer, (ms)); \
 465         } while (0)
 466
 467 #define rtw_set_pwr_state_check_timer(pwrctl) \
 468         _rtw_set_pwr_state_check_timer((pwrctl), (pwrctl)->pwr_state_check_interval)
 469
 470 extern void rtw_init_pwrctrl_priv(_adapter *adapter);
 471 extern void rtw_free_pwrctrl_priv(_adapter *adapter);
 472
 473 #ifdef CONFIG_LPS_LCLK
 474 s32 rtw_register_task_alive(PADAPTER, u32 task);
 475 void rtw_unregister_task_alive(PADAPTER, u32 task);
 476 extern s32 rtw_register_tx_alive(PADAPTER padapter);
 477 extern void rtw_unregister_tx_alive(PADAPTER padapter);
 478 extern s32 rtw_register_rx_alive(PADAPTER padapter);
 479 extern void rtw_unregister_rx_alive(PADAPTER padapter);
 480 extern s32 rtw_register_cmd_alive(PADAPTER padapter);
 481 extern void rtw_unregister_cmd_alive(PADAPTER padapter);
 482 extern s32 rtw_register_evt_alive(PADAPTER padapter);
 483 extern void rtw_unregister_evt_alive(PADAPTER padapter);
 484 extern void cpwm_int_hdl(PADAPTER padapter, struct reportpwrstate_parm *preportpwrstate);
 485 extern void LPS_Leave_check(PADAPTER padapter);
 486 #endif
 487
 488 extern void LeaveAllPowerSaveMode(PADAPTER Adapter);
 489 extern void LeaveAllPowerSaveModeDirect(PADAPTER Adapter);
 490 #ifdef CONFIG_IPS
 491 void _ips_enter(_adapter *padapter);
 492 void ips_enter(_adapter *padapter);
 493 int _ips_leave(_adapter *padapter);
 494 int ips_leave(_adapter *padapter);
 495 #endif
 496
 497 void rtw_ps_processor(_adapter *padapter);
 498
 499 #ifdef CONFIG_AUTOSUSPEND
 500 int autoresume_enter(_adapter *padapter);
 501 #endif
 502 #ifdef SUPPORT_HW_RFOFF_DETECTED
 503 rt_rf_power_state RfOnOffDetect(IN      PADAPTER pAdapter);
 504 #endif
 505
 506
 507 int rtw_fw_ps_state(PADAPTER padapter);
 508
 509 #ifdef CONFIG_LPS
 510 s32 LPS_RF_ON_check(PADAPTER padapter, u32 delay_ms);
 511 void LPS_Enter(PADAPTER padapter, const char *msg);
 512 void LPS_Leave(PADAPTER padapter, const char *msg);
 513 void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets);
 514 void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg);
 515 void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable);
 516 void rtw_set_rpwm(_adapter *padapter, u8 val8);
 517 #endif
 518
 519 #ifdef CONFIG_RESUME_IN_WORKQUEUE
 520 void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv);
 521 #endif /* CONFIG_RESUME_IN_WORKQUEUE */
 522
 523 #if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER)
 524 bool rtw_is_earlysuspend_registered(struct pwrctrl_priv *pwrpriv);
 525 bool rtw_is_do_late_resume(struct pwrctrl_priv *pwrpriv);
 526 void rtw_set_do_late_resume(struct pwrctrl_priv *pwrpriv, bool enable);
 527 void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv);
 528 void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv);
 529 #else
 530 #define rtw_is_earlysuspend_registered(pwrpriv) _FALSE
 531 #define rtw_is_do_late_resume(pwrpriv) _FALSE
 532 #define rtw_set_do_late_resume(pwrpriv, enable) do {} while (0)
 533 #define rtw_register_early_suspend(pwrpriv) do {} while (0)
 534 #define rtw_unregister_early_suspend(pwrpriv) do {} while (0)
 535 #endif /* CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER */
 536
 537 u8 rtw_interface_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val);
 538 void rtw_set_ips_deny(_adapter *padapter, u32 ms);
 539 int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller);
 540 #define rtw_pwr_wakeup(adapter) _rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __FUNCTION__)
 541 #define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) _rtw_pwr_wakeup(adapter, ips_deffer_ms, __FUNCTION__)
 542 int rtw_pm_set_ips(_adapter *padapter, u8 mode);
 543 int rtw_pm_set_lps(_adapter *padapter, u8 mode);
 544
 545 void rtw_ps_deny(PADAPTER padapter, PS_DENY_REASON reason);
 546 void rtw_ps_deny_cancel(PADAPTER padapter, PS_DENY_REASON reason);
 547 u32 rtw_ps_deny_get(PADAPTER padapter);
 548
 549 #if defined(CONFIG_WOWLAN)
 550 void rtw_get_current_ip_address(PADAPTER padapter, u8 *pcurrentip);
 551 void rtw_get_sec_iv(PADAPTER padapter, u8 *pcur_dot11txpn, u8 *StaAddr);
 552 bool rtw_check_pattern_valid(u8 *input, u8 len);
 553 bool rtw_wowlan_parser_pattern_cmd(u8 *input, char *pattern,
 554                                 int *pattern_len, char *bit_mask);
 555 void rtw_wow_pattern_sw_reset(_adapter *adapter);
 556 u8 rtw_set_default_pattern(_adapter *adapter);
 557 void rtw_wow_pattern_sw_dump(_adapter *adapter);
 558 #endif /* CONFIG_WOWLAN */
 559 #endif /* __RTL871X_PWRCTRL_H_ */