drivers/net/wireless/rockchip_wlan/rtl8723cs/include/hal_com.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #ifndef __HAL_COMMON_H__
  21 #define __HAL_COMMON_H__
  22
  23 #include "HalVerDef.h"
  24 #include "hal_pg.h"
  25 #include "hal_phy.h"
  26 #include "hal_phy_reg.h"
  27 #include "hal_com_reg.h"
  28 #include "hal_com_phycfg.h"
  29 #include "../hal/hal_com_c2h.h"
  30
  31 /*------------------------------ Tx Desc definition Macro ------------------------*/
  32 /* #pragma mark -- Tx Desc related definition. -- */
  33 /* ----------------------------------------------------------------------------
  34  * -----------------------------------------------------------
  35  *      Rate
  36  * -----------------------------------------------------------
  37  * CCK Rates, TxHT = 0 */
  38 #define DESC_RATE1M                                     0x00
  39 #define DESC_RATE2M                                     0x01
  40 #define DESC_RATE5_5M                           0x02
  41 #define DESC_RATE11M                            0x03
  42
  43 /* OFDM Rates, TxHT = 0 */
  44 #define DESC_RATE6M                                     0x04
  45 #define DESC_RATE9M                                     0x05
  46 #define DESC_RATE12M                            0x06
  47 #define DESC_RATE18M                            0x07
  48 #define DESC_RATE24M                            0x08
  49 #define DESC_RATE36M                            0x09
  50 #define DESC_RATE48M                            0x0a
  51 #define DESC_RATE54M                            0x0b
  52
  53 /* MCS Rates, TxHT = 1 */
  54 #define DESC_RATEMCS0                           0x0c
  55 #define DESC_RATEMCS1                           0x0d
  56 #define DESC_RATEMCS2                           0x0e
  57 #define DESC_RATEMCS3                           0x0f
  58 #define DESC_RATEMCS4                           0x10
  59 #define DESC_RATEMCS5                           0x11
  60 #define DESC_RATEMCS6                           0x12
  61 #define DESC_RATEMCS7                           0x13
  62 #define DESC_RATEMCS8                           0x14
  63 #define DESC_RATEMCS9                           0x15
  64 #define DESC_RATEMCS10                          0x16
  65 #define DESC_RATEMCS11                          0x17
  66 #define DESC_RATEMCS12                          0x18
  67 #define DESC_RATEMCS13                          0x19
  68 #define DESC_RATEMCS14                          0x1a
  69 #define DESC_RATEMCS15                          0x1b
  70 #define DESC_RATEMCS16                          0x1C
  71 #define DESC_RATEMCS17                          0x1D
  72 #define DESC_RATEMCS18                          0x1E
  73 #define DESC_RATEMCS19                          0x1F
  74 #define DESC_RATEMCS20                          0x20
  75 #define DESC_RATEMCS21                          0x21
  76 #define DESC_RATEMCS22                          0x22
  77 #define DESC_RATEMCS23                          0x23
  78 #define DESC_RATEMCS24                          0x24
  79 #define DESC_RATEMCS25                          0x25
  80 #define DESC_RATEMCS26                          0x26
  81 #define DESC_RATEMCS27                          0x27
  82 #define DESC_RATEMCS28                          0x28
  83 #define DESC_RATEMCS29                          0x29
  84 #define DESC_RATEMCS30                          0x2A
  85 #define DESC_RATEMCS31                          0x2B
  86 #define DESC_RATEVHTSS1MCS0             0x2C
  87 #define DESC_RATEVHTSS1MCS1             0x2D
  88 #define DESC_RATEVHTSS1MCS2             0x2E
  89 #define DESC_RATEVHTSS1MCS3             0x2F
  90 #define DESC_RATEVHTSS1MCS4             0x30
  91 #define DESC_RATEVHTSS1MCS5             0x31
  92 #define DESC_RATEVHTSS1MCS6             0x32
  93 #define DESC_RATEVHTSS1MCS7             0x33
  94 #define DESC_RATEVHTSS1MCS8             0x34
  95 #define DESC_RATEVHTSS1MCS9             0x35
  96 #define DESC_RATEVHTSS2MCS0             0x36
  97 #define DESC_RATEVHTSS2MCS1             0x37
  98 #define DESC_RATEVHTSS2MCS2             0x38
  99 #define DESC_RATEVHTSS2MCS3             0x39
 100 #define DESC_RATEVHTSS2MCS4             0x3A
 101 #define DESC_RATEVHTSS2MCS5             0x3B
 102 #define DESC_RATEVHTSS2MCS6             0x3C
 103 #define DESC_RATEVHTSS2MCS7             0x3D
 104 #define DESC_RATEVHTSS2MCS8             0x3E
 105 #define DESC_RATEVHTSS2MCS9             0x3F
 106 #define DESC_RATEVHTSS3MCS0             0x40
 107 #define DESC_RATEVHTSS3MCS1             0x41
 108 #define DESC_RATEVHTSS3MCS2             0x42
 109 #define DESC_RATEVHTSS3MCS3             0x43
 110 #define DESC_RATEVHTSS3MCS4             0x44
 111 #define DESC_RATEVHTSS3MCS5             0x45
 112 #define DESC_RATEVHTSS3MCS6             0x46
 113 #define DESC_RATEVHTSS3MCS7             0x47
 114 #define DESC_RATEVHTSS3MCS8             0x48
 115 #define DESC_RATEVHTSS3MCS9             0x49
 116 #define DESC_RATEVHTSS4MCS0             0x4A
 117 #define DESC_RATEVHTSS4MCS1             0x4B
 118 #define DESC_RATEVHTSS4MCS2             0x4C
 119 #define DESC_RATEVHTSS4MCS3             0x4D
 120 #define DESC_RATEVHTSS4MCS4             0x4E
 121 #define DESC_RATEVHTSS4MCS5             0x4F
 122 #define DESC_RATEVHTSS4MCS6             0x50
 123 #define DESC_RATEVHTSS4MCS7             0x51
 124 #define DESC_RATEVHTSS4MCS8             0x52
 125 #define DESC_RATEVHTSS4MCS9             0x53
 126
 127 #define HDATA_RATE(rate)\
 128         (rate == DESC_RATE1M) ? "CCK_1M" :\
 129         (rate == DESC_RATE2M) ? "CCK_2M" :\
 130         (rate == DESC_RATE5_5M) ? "CCK5_5M" :\
 131         (rate == DESC_RATE11M) ? "CCK_11M" :\
 132         (rate == DESC_RATE6M) ? "OFDM_6M" :\
 133         (rate == DESC_RATE9M) ? "OFDM_9M" :\
 134         (rate == DESC_RATE12M) ? "OFDM_12M" :\
 135         (rate == DESC_RATE18M) ? "OFDM_18M" :\
 136         (rate == DESC_RATE24M) ? "OFDM_24M" :\
 137         (rate == DESC_RATE36M) ? "OFDM_36M" :\
 138         (rate == DESC_RATE48M) ? "OFDM_48M" :\
 139         (rate == DESC_RATE54M) ? "OFDM_54M" :\
 140         (rate == DESC_RATEMCS0) ? "MCS0" :\
 141         (rate == DESC_RATEMCS1) ? "MCS1" :\
 142         (rate == DESC_RATEMCS2) ? "MCS2" :\
 143         (rate == DESC_RATEMCS3) ? "MCS3" :\
 144         (rate == DESC_RATEMCS4) ? "MCS4" :\
 145         (rate == DESC_RATEMCS5) ? "MCS5" :\
 146         (rate == DESC_RATEMCS6) ? "MCS6" :\
 147         (rate == DESC_RATEMCS7) ? "MCS7" :\
 148         (rate == DESC_RATEMCS8) ? "MCS8" :\
 149         (rate == DESC_RATEMCS9) ? "MCS9" :\
 150         (rate == DESC_RATEMCS10) ? "MCS10" :\
 151         (rate == DESC_RATEMCS11) ? "MCS11" :\
 152         (rate == DESC_RATEMCS12) ? "MCS12" :\
 153         (rate == DESC_RATEMCS13) ? "MCS13" :\
 154         (rate == DESC_RATEMCS14) ? "MCS14" :\
 155         (rate == DESC_RATEMCS15) ? "MCS15" :\
 156         (rate == DESC_RATEMCS16) ? "MCS16" :\
 157         (rate == DESC_RATEMCS17) ? "MCS17" :\
 158         (rate == DESC_RATEMCS18) ? "MCS18" :\
 159         (rate == DESC_RATEMCS19) ? "MCS19" :\
 160         (rate == DESC_RATEMCS20) ? "MCS20" :\
 161         (rate == DESC_RATEMCS21) ? "MCS21" :\
 162         (rate == DESC_RATEMCS22) ? "MCS22" :\
 163         (rate == DESC_RATEMCS23) ? "MCS23" :\
 164         (rate == DESC_RATEVHTSS1MCS0) ? "VHTSS1MCS0" :\
 165         (rate == DESC_RATEVHTSS1MCS1) ? "VHTSS1MCS1" :\
 166         (rate == DESC_RATEVHTSS1MCS2) ? "VHTSS1MCS2" :\
 167         (rate == DESC_RATEVHTSS1MCS3) ? "VHTSS1MCS3" :\
 168         (rate == DESC_RATEVHTSS1MCS4) ? "VHTSS1MCS4" :\
 169         (rate == DESC_RATEVHTSS1MCS5) ? "VHTSS1MCS5" :\
 170         (rate == DESC_RATEVHTSS1MCS6) ? "VHTSS1MCS6" :\
 171         (rate == DESC_RATEVHTSS1MCS7) ? "VHTSS1MCS7" :\
 172         (rate == DESC_RATEVHTSS1MCS8) ? "VHTSS1MCS8" :\
 173         (rate == DESC_RATEVHTSS1MCS9) ? "VHTSS1MCS9" :\
 174         (rate == DESC_RATEVHTSS2MCS0) ? "VHTSS2MCS0" :\
 175         (rate == DESC_RATEVHTSS2MCS1) ? "VHTSS2MCS1" :\
 176         (rate == DESC_RATEVHTSS2MCS2) ? "VHTSS2MCS2" :\
 177         (rate == DESC_RATEVHTSS2MCS3) ? "VHTSS2MCS3" :\
 178         (rate == DESC_RATEVHTSS2MCS4) ? "VHTSS2MCS4" :\
 179         (rate == DESC_RATEVHTSS2MCS5) ? "VHTSS2MCS5" :\
 180         (rate == DESC_RATEVHTSS2MCS6) ? "VHTSS2MCS6" :\
 181         (rate == DESC_RATEVHTSS2MCS7) ? "VHTSS2MCS7" :\
 182         (rate == DESC_RATEVHTSS2MCS8) ? "VHTSS2MCS8" :\
 183         (rate == DESC_RATEVHTSS2MCS9) ? "VHTSS2MCS9" :\
 184         (rate == DESC_RATEVHTSS3MCS0) ? "VHTSS3MCS0" :\
 185         (rate == DESC_RATEVHTSS3MCS1) ? "VHTSS3MCS1" :\
 186         (rate == DESC_RATEVHTSS3MCS2) ? "VHTSS3MCS2" :\
 187         (rate == DESC_RATEVHTSS3MCS3) ? "VHTSS3MCS3" :\
 188         (rate == DESC_RATEVHTSS3MCS4) ? "VHTSS3MCS4" :\
 189         (rate == DESC_RATEVHTSS3MCS5) ? "VHTSS3MCS5" :\
 190         (rate == DESC_RATEVHTSS3MCS6) ? "VHTSS3MCS6" :\
 191         (rate == DESC_RATEVHTSS3MCS7) ? "VHTSS3MCS7" :\
 192         (rate == DESC_RATEVHTSS3MCS8) ? "VHTSS3MCS8" :\
 193         (rate == DESC_RATEVHTSS3MCS9) ? "VHTSS3MCS9" : "UNKNOWN"
 194
 195 enum {
 196         UP_LINK,
 197         DOWN_LINK,
 198 };
 199 typedef enum _RT_MEDIA_STATUS {
 200         RT_MEDIA_DISCONNECT = 0,
 201         RT_MEDIA_CONNECT       = 1
 202 } RT_MEDIA_STATUS;
 203
 204 #define MAX_DLFW_PAGE_SIZE                      4096    /* @ page : 4k bytes */
 205 typedef enum _FIRMWARE_SOURCE {
 206         FW_SOURCE_IMG_FILE = 0,
 207         FW_SOURCE_HEADER_FILE = 1,              /* from header file */
 208 } FIRMWARE_SOURCE, *PFIRMWARE_SOURCE;
 209
 210 typedef enum _CH_SW_USE_CASE {
 211         CH_SW_USE_CASE_TDLS             = 0,
 212         CH_SW_USE_CASE_MCC              = 1
 213 } CH_SW_USE_CASE;
 214
 215 typedef enum _WAKEUP_REASON{
 216         RX_PAIRWISEKEY                                  = 0x01,
 217         RX_GTK                                                  = 0x02,
 218         RX_FOURWAY_HANDSHAKE                    = 0x03,
 219         RX_DISASSOC                                             = 0x04,
 220         RX_DEAUTH                                               = 0x08,
 221         RX_ARP_REQUEST                                  = 0x09,
 222         FW_DECISION_DISCONNECT                  = 0x10,
 223         RX_MAGIC_PKT                                    = 0x21,
 224         RX_UNICAST_PKT                                  = 0x22,
 225         RX_PATTERN_PKT                                  = 0x23,
 226         RTD3_SSID_MATCH                                 = 0x24,
 227         RX_REALWOW_V2_WAKEUP_PKT                = 0x30,
 228         RX_REALWOW_V2_ACK_LOST                  = 0x31,
 229         ENABLE_FAIL_DMA_IDLE                    = 0x40,
 230         ENABLE_FAIL_DMA_PAUSE                   = 0x41,
 231         RTIME_FAIL_DMA_IDLE                             = 0x42,
 232         RTIME_FAIL_DMA_PAUSE                    = 0x43,
 233         RX_PNO                                                  = 0x55,
 234         AP_OFFLOAD_WAKEUP                               = 0x66,
 235         CLK_32K_UNLOCK                                  = 0xFD,
 236         CLK_32K_LOCK                                    = 0xFE
 237 }WAKEUP_REASON;
 238
 239 /*
 240  * Queue Select Value in TxDesc
 241  *   */
 242 #define QSLT_BK                                                 0x2/* 0x01 */
 243 #define QSLT_BE                                                 0x0
 244 #define QSLT_VI                                                 0x5/* 0x4 */
 245 #define QSLT_VO                                                 0x7/* 0x6 */
 246 #define QSLT_BEACON                                             0x10
 247 #define QSLT_HIGH                                               0x11
 248 #define QSLT_MGNT                                               0x12
 249 #define QSLT_CMD                                                0x13
 250
 251 /* BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON.
 252  * #define MAX_TX_QUEUE         9 */
 253
 254 #define TX_SELE_HQ                      BIT(0)          /* High Queue */
 255 #define TX_SELE_LQ                      BIT(1)          /* Low Queue */
 256 #define TX_SELE_NQ                      BIT(2)          /* Normal Queue */
 257 #define TX_SELE_EQ                      BIT(3)          /* Extern Queue */
 258
 259 #define PageNum_128(_Len)               (u32)(((_Len)>>7) + ((_Len) & 0x7F ? 1 : 0))
 260 #define PageNum_256(_Len)               (u32)(((_Len)>>8) + ((_Len) & 0xFF ? 1 : 0))
 261 #define PageNum_512(_Len)               (u32)(((_Len)>>9) + ((_Len) & 0x1FF ? 1 : 0))
 262 #define PageNum(_Len, _Size)            (u32)(((_Len)/(_Size)) + ((_Len)&((_Size) - 1) ? 1 : 0))
 263
 264 struct dbg_rx_counter {
 265         u32     rx_pkt_ok;
 266         u32     rx_pkt_crc_error;
 267         u32     rx_pkt_drop;
 268         u32     rx_ofdm_fa;
 269         u32     rx_cck_fa;
 270         u32     rx_ht_fa;
 271 };
 272
 273 #ifdef CONFIG_MBSSID_CAM
 274         #define DBG_MBID_CAM_DUMP
 275
 276         void rtw_mbid_cam_init(struct dvobj_priv *dvobj);
 277         void rtw_mbid_cam_deinit(struct dvobj_priv *dvobj);
 278         void rtw_mbid_cam_reset(_adapter *adapter);
 279         u8 rtw_get_max_mbid_cam_id(_adapter *adapter);
 280         u8 rtw_get_mbid_cam_entry_num(_adapter *adapter);
 281         int rtw_mbid_cam_cache_dump(void *sel, const char *fun_name , _adapter *adapter);
 282         int rtw_mbid_cam_dump(void *sel, const char *fun_name, _adapter *adapter);
 283         void rtw_mbid_cam_restore(_adapter *adapter);
 284 #endif
 285
 286 #ifdef CONFIG_MI_WITH_MBSSID_CAM
 287         void rtw_hal_set_macaddr_mbid(_adapter *adapter, u8 *mac_addr);
 288         void rtw_hal_change_macaddr_mbid(_adapter *adapter, u8 *mac_addr);
 289 #endif
 290
 291 void rtw_dump_mac_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter);
 292 void rtw_dump_phy_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter);
 293 void rtw_reset_mac_rx_counters(_adapter *padapter);
 294 void rtw_reset_phy_rx_counters(_adapter *padapter);
 295 void rtw_reset_phy_trx_ok_counters(_adapter *padapter);
 296
 297 #ifdef DBG_RX_COUNTER_DUMP
 298         #define DUMP_DRV_RX_COUNTER     BIT0
 299         #define DUMP_MAC_RX_COUNTER     BIT1
 300         #define DUMP_PHY_RX_COUNTER     BIT2
 301         #define DUMP_DRV_TRX_COUNTER_DATA       BIT3
 302
 303         void rtw_dump_phy_rxcnts_preprocess(_adapter *padapter, u8 rx_cnt_mode);
 304         void rtw_dump_rx_counters(_adapter *padapter);
 305 #endif
 306
 307 void dump_chip_info(HAL_VERSION ChipVersion);
 308 void rtw_hal_config_rftype(PADAPTER  padapter);
 309
 310 #define BAND_CAP_2G                     BIT0
 311 #define BAND_CAP_5G                     BIT1
 312 #define BAND_CAP_BIT_NUM        2
 313
 314 #define BW_CAP_5M               BIT0
 315 #define BW_CAP_10M              BIT1
 316 #define BW_CAP_20M              BIT2
 317 #define BW_CAP_40M              BIT3
 318 #define BW_CAP_80M              BIT4
 319 #define BW_CAP_160M             BIT5
 320 #define BW_CAP_80_80M   BIT6
 321 #define BW_CAP_BIT_NUM  7
 322
 323 #define PROTO_CAP_11B           BIT0
 324 #define PROTO_CAP_11G           BIT1
 325 #define PROTO_CAP_11N           BIT2
 326 #define PROTO_CAP_11AC          BIT3
 327 #define PROTO_CAP_BIT_NUM       4
 328
 329 #define WL_FUNC_P2P                     BIT0
 330 #define WL_FUNC_MIRACAST        BIT1
 331 #define WL_FUNC_TDLS            BIT2
 332 #define WL_FUNC_FTM                     BIT3
 333 #define WL_FUNC_BIT_NUM         4
 334
 335 int hal_spec_init(_adapter *adapter);
 336 void dump_hal_spec(void *sel, _adapter *adapter);
 337
 338 bool hal_chk_band_cap(_adapter *adapter, u8 cap);
 339 bool hal_chk_bw_cap(_adapter *adapter, u8 cap);
 340 bool hal_chk_proto_cap(_adapter *adapter, u8 cap);
 341 bool hal_is_band_support(_adapter *adapter, u8 band);
 342 bool hal_is_bw_support(_adapter *adapter, u8 bw);
 343 bool hal_is_wireless_mode_support(_adapter *adapter, u8 mode);
 344 u8 hal_largest_bw(_adapter *adapter, u8 in_bw);
 345
 346 bool hal_chk_wl_func(_adapter *adapter, u8 func);
 347
 348 u8 hal_com_config_channel_plan(
 349         IN      PADAPTER padapter,
 350         IN      char *hw_alpha2,
 351         IN      u8 hw_chplan,
 352         IN      char *sw_alpha2,
 353         IN      u8 sw_chplan,
 354         IN      u8 def_chplan,
 355         IN      BOOLEAN AutoLoadFail
 356 );
 357
 358 int hal_config_macaddr(_adapter *adapter, bool autoload_fail);
 359
 360 BOOLEAN
 361 HAL_IsLegalChannel(
 362         IN      PADAPTER        Adapter,
 363         IN      u32                     Channel
 364 );
 365
 366 u8      MRateToHwRate(u8 rate);
 367
 368 u8      hw_rate_to_m_rate(u8 rate);
 369
 370 void    HalSetBrateCfg(
 371         IN PADAPTER             Adapter,
 372         IN u8                   *mBratesOS,
 373         OUT u16                 *pBrateCfg);
 374
 375 BOOLEAN
 376 Hal_MappingOutPipe(
 377         IN      PADAPTER        pAdapter,
 378         IN      u8              NumOutPipe
 379 );
 380
 381 void rtw_dump_fw_info(void *sel, _adapter *adapter);
 382 void rtw_restore_mac_addr(_adapter *adapter);/*set mac addr when hal_init for all iface*/
 383 void rtw_hal_dump_macaddr(void *sel, _adapter *adapter);
 384
 385 void rtw_init_hal_com_default_value(PADAPTER Adapter);
 386
 387 #ifdef CONFIG_FW_C2H_REG
 388 void c2h_evt_clear(_adapter *adapter);
 389 s32 c2h_evt_read_88xx(_adapter *adapter, u8 *buf);
 390 #endif
 391
 392 #ifdef CONFIG_FW_C2H_PKT
 393 void rtw_hal_c2h_pkt_pre_hdl(_adapter *adapter, u8 *buf, u16 len);
 394 void rtw_hal_c2h_pkt_hdl(_adapter *adapter, u8 *buf, u16 len);
 395 #endif
 396
 397 u8  rtw_hal_networktype_to_raid(_adapter *adapter, struct sta_info *psta);
 398 u8 rtw_get_mgntframe_raid(_adapter *adapter, unsigned char network_type);
 399 void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta);
 400
 401 /* access HW only */
 402 u32 rtw_sec_read_cam(_adapter *adapter, u8 addr);
 403 void rtw_sec_write_cam(_adapter *adapter, u8 addr, u32 wdata);
 404 void rtw_sec_read_cam_ent(_adapter *adapter, u8 id, u8 *ctrl, u8 *mac, u8 *key);
 405 void rtw_sec_write_cam_ent(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key);
 406 void rtw_sec_clr_cam_ent(_adapter *adapter, u8 id);
 407 bool rtw_sec_read_cam_is_gk(_adapter *adapter, u8 id);
 408
 409 void rtw_hal_set_msr(_adapter *adapter, u8 net_type);
 410 void rtw_hal_set_macaddr_port(_adapter *adapter, u8 *val);
 411 void rtw_hal_get_macaddr_port(_adapter *adapter, u8 *mac_addr);
 412
 413 void rtw_hal_set_bssid(_adapter *adapter, u8 *val);
 414
 415 void hw_var_port_switch(_adapter *adapter);
 416
 417 void SetHwReg(PADAPTER padapter, u8 variable, u8 *val);
 418 void GetHwReg(PADAPTER padapter, u8 variable, u8 *val);
 419 void rtw_hal_check_rxfifo_full(_adapter *adapter);
 420 void rtw_hal_reqtxrpt(_adapter *padapter, u8 macid);
 421
 422 u8 SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
 423 u8 GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
 424
 425 BOOLEAN
 426 eqNByte(
 427         u8      *str1,
 428         u8      *str2,
 429         u32     num
 430 );
 431
 432 u32
 433 MapCharToHexDigit(
 434         IN      char    chTmp
 435 );
 436
 437 BOOLEAN
 438 GetHexValueFromString(
 439         IN              char                    *szStr,
 440         IN OUT  u32                     *pu4bVal,
 441         IN OUT  u32                     *pu4bMove
 442 );
 443
 444 BOOLEAN
 445 GetFractionValueFromString(
 446         IN              char            *szStr,
 447         IN OUT  u8                      *pInteger,
 448         IN OUT  u8                      *pFraction,
 449         IN OUT  u32             *pu4bMove
 450 );
 451
 452 BOOLEAN
 453 IsCommentString(
 454         IN              char            *szStr
 455 );
 456
 457 BOOLEAN
 458 ParseQualifiedString(
 459         IN      char *In,
 460         IN OUT  u32 *Start,
 461         OUT     char *Out,
 462         IN      char  LeftQualifier,
 463         IN      char  RightQualifier
 464 );
 465
 466 BOOLEAN
 467 GetU1ByteIntegerFromStringInDecimal(
 468         IN              char *Str,
 469         IN OUT  u8 *pInt
 470 );
 471
 472 BOOLEAN
 473 isAllSpaceOrTab(
 474         u8      *data,
 475         u8      size
 476 );
 477
 478 void linked_info_dump(_adapter *padapter, u8 benable);
 479 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
 480         void rtw_get_raw_rssi_info(void *sel, _adapter *padapter);
 481         void rtw_dump_raw_rssi_info(_adapter *padapter, void *sel);
 482 #endif
 483
 484 #ifdef DBG_RX_DFRAME_RAW_DATA
 485         void rtw_dump_rx_dframe_info(_adapter *padapter, void *sel);
 486 #endif
 487 void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe);
 488 #define         HWSET_MAX_SIZE                  1024
 489 #ifdef CONFIG_EFUSE_CONFIG_FILE
 490         #define         EFUSE_FILE_COLUMN_NUM           16
 491         u32 Hal_readPGDataFromConfigFile(PADAPTER padapter);
 492         u32 Hal_ReadMACAddrFromFile(PADAPTER padapter, u8 *mac_addr);
 493 #endif /* CONFIG_EFUSE_CONFIG_FILE */
 494
 495 int check_phy_efuse_tx_power_info_valid(PADAPTER padapter);
 496 int hal_efuse_macaddr_offset(_adapter *adapter);
 497 int Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8 *mac_addr);
 498 void rtw_dump_cur_efuse(PADAPTER padapter);
 499
 500 #ifdef CONFIG_RF_POWER_TRIM
 501         void rtw_bb_rf_gain_offset(_adapter *padapter);
 502 #endif /*CONFIG_RF_POWER_TRIM*/
 503
 504 void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer);
 505 u8 rtw_hal_busagg_qsel_check(_adapter *padapter, u8 pre_qsel, u8 next_qsel);
 506 void GetHalODMVar(
 507         PADAPTER                                Adapter,
 508         HAL_ODM_VARIABLE                eVariable,
 509         PVOID                                   pValue1,
 510         PVOID                                   pValue2);
 511 void SetHalODMVar(
 512         PADAPTER                                Adapter,
 513         HAL_ODM_VARIABLE                eVariable,
 514         PVOID                                   pValue1,
 515         BOOLEAN                                 bSet);
 516
 517 #ifdef CONFIG_BACKGROUND_NOISE_MONITOR
 518 struct noise_info {
 519         u8              bPauseDIG;
 520         u8              IGIValue;
 521         u32     max_time;/* ms   */
 522         u8              chan;
 523 };
 524 #endif
 525
 526 void rtw_get_noise(_adapter *padapter);
 527 u8 rtw_get_current_tx_rate(_adapter *padapter, u8 macid);
 528 u8 rtw_get_current_tx_sgi(_adapter *padapter, u8 macid);
 529 void rtw_hal_construct_NullFunctionData(PADAPTER, u8 *pframe, u32 *pLength, u8 *StaAddr, u8 bQoS, u8 AC, u8 bEosp, u8 bForcePowerSave);
 530
 531 void rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished);
 532
 533 #ifdef CONFIG_TDLS
 534         #ifdef CONFIG_TDLS_CH_SW
 535                 s32 rtw_hal_ch_sw_oper_offload(_adapter *padapter, u8 channel, u8 channel_offset, u16 bwmode);
 536         #endif
 537 #endif
 538 #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT)
 539 s32 rtw_hal_set_wifi_port_id_cmd(_adapter *adapter);
 540 #endif
 541
 542 #ifdef CONFIG_GPIO_API
 543         u8 rtw_hal_get_gpio(_adapter *adapter, u8 gpio_num);
 544         int rtw_hal_set_gpio_output_value(_adapter *adapter, u8 gpio_num, bool isHigh);
 545         int rtw_hal_config_gpio(_adapter *adapter, u8 gpio_num, bool isOutput);
 546         int rtw_hal_register_gpio_interrupt(_adapter *adapter, int gpio_num, void(*callback)(u8 level));
 547         int rtw_hal_disable_gpio_interrupt(_adapter *adapter, int gpio_num);
 548 #endif
 549
 550 s8 rtw_hal_ch_sw_iqk_info_search(_adapter *padapter, u8 central_chnl, u8 bw_mode);
 551 void rtw_hal_ch_sw_iqk_info_backup(_adapter *adapter);
 552 void rtw_hal_ch_sw_iqk_info_restore(_adapter *padapter, u8 ch_sw_use_case);
 553
 554 #ifdef CONFIG_GPIO_WAKEUP
 555         void rtw_hal_switch_gpio_wl_ctrl(_adapter *padapter, u8 index, u8 enable);
 556         void rtw_hal_set_output_gpio(_adapter *padapter, u8 index, u8 outputval);
 557 #endif
 558
 559 typedef enum _HAL_PHYDM_OPS {
 560         HAL_PHYDM_DIS_ALL_FUNC,
 561         HAL_PHYDM_FUNC_SET,
 562         HAL_PHYDM_FUNC_CLR,
 563         HAL_PHYDM_ABILITY_BK,
 564         HAL_PHYDM_ABILITY_RESTORE,
 565         HAL_PHYDM_ABILITY_SET,
 566         HAL_PHYDM_ABILITY_GET,
 567 } HAL_PHYDM_OPS;
 568
 569
 570 #define DYNAMIC_FUNC_DISABLE            (0x0)
 571 u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability);
 572
 573 #define rtw_phydm_func_disable_all(adapter)     \
 574         rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0)
 575
 576 #define rtw_phydm_func_for_offchannel(adapter) \
 577         do { \
 578                 rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0); \
 579                 if (rtw_odm_adaptivity_needed(adapter)) \
 580                         rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ODM_BB_ADAPTIVITY); \
 581         } while (0)
 582
 583 #define rtw_phydm_func_set(adapter, ability)    \
 584         rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ability)
 585
 586 #define rtw_phydm_func_clr(adapter, ability)    \
 587         rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_CLR, ability)
 588
 589 #define rtw_phydm_ability_backup(adapter)       \
 590         rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_BK, 0)
 591
 592 #define rtw_phydm_ability_restore(adapter)      \
 593         rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_RESTORE, 0)
 594
 595 #define rtw_phydm_ability_set(adapter, ability) \
 596         rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_SET, ability)
 597
 598 static inline u32 rtw_phydm_ability_get(_adapter *adapter)
 599 {
 600         return rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_GET, 0);
 601 }
 602
 603 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
 604         extern char *rtw_phy_file_path;
 605         extern char rtw_phy_para_file_path[PATH_LENGTH_MAX];
 606         #define GetLineFromBuffer(buffer)   strsep(&buffer, "\r\n")
 607 #endif
 608
 609 void update_IOT_info(_adapter *padapter);
 610
 611 #ifdef CONFIG_AUTO_CHNL_SEL_NHM
 612         void rtw_acs_start(_adapter *padapter, bool bStart);
 613 #endif
 614
 615 void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap);
 616 void rtw_hal_correct_tsf(_adapter *padapter, u8 hw_port, u64 tsf);
 617
 618 void ResumeTxBeacon(_adapter *padapter);
 619 void StopTxBeacon(_adapter *padapter);
 620 #ifdef CONFIG_MI_WITH_MBSSID_CAM /*HW port0 - MBSS*/
 621         void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode);
 622         u8 rtw_mbid_camid_alloc(_adapter *adapter, u8 *mac_addr);
 623 #endif
 624
 625 #ifdef CONFIG_ANTENNA_DIVERSITY
 626         u8      rtw_hal_antdiv_before_linked(_adapter *padapter);
 627         void    rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src);
 628 #endif
 629
 630 #ifdef DBG_SEC_CAM_MOVE
 631         void rtw_hal_move_sta_gk_to_dk(_adapter *adapter);
 632         void rtw_hal_read_sta_dk_key(_adapter *adapter, u8 key_id);
 633 #endif
 634
 635 #ifdef CONFIG_LPS_PG
 636 #define LPSPG_RSVD_PAGE_SET_MACID(_rsvd_pag, _value)            SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 0, 8, _value)/*used macid*/
 637 #define LPSPG_RSVD_PAGE_SET_MBSSCAMID(_rsvd_pag, _value)        SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 8, 8, _value)/*used BSSID CAM entry*/
 638 #define LPSPG_RSVD_PAGE_SET_PMC_NUM(_rsvd_pag, _value)          SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 16, 8, _value)/*Max used Pattern Match CAM entry*/
 639 #define LPSPG_RSVD_PAGE_SET_MU_RAID_GID(_rsvd_pag, _value)      SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 24, 8, _value)/*Max MU rate table Group ID*/
 640 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_NUM(_rsvd_pag, _value)      SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x04, 0, 8, _value)/*used Security CAM entry number*/
 641 #define LPSPG_RSVD_PAGE_SET_DRV_RSVDPAGE_NUM(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x04, 8, 8, _value)/*Txbuf used page number for fw offload*/
 642 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID1(_rsvd_pag, _value)      SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 0, 8, _value)/*used Security CAM entry -1*/
 643 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID2(_rsvd_pag, _value)      SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 8, 8, _value)/*used Security CAM entry -2*/
 644 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID3(_rsvd_pag, _value)      SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 16, 8, _value)/*used Security CAM entry -3*/
 645 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID4(_rsvd_pag, _value)      SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 24, 8, _value)/*used Security CAM entry -4*/
 646 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID5(_rsvd_pag, _value)      SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 0, 8, _value)/*used Security CAM entry -5*/
 647 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID6(_rsvd_pag, _value)      SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 8, 8, _value)/*used Security CAM entry -6*/
 648 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID7(_rsvd_pag, _value)      SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 16, 8, _value)/*used Security CAM entry -7*/
 649 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID8(_rsvd_pag, _value)      SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 24, 8, _value)/*used Security CAM entry -8*/
 650 enum lps_pg_hdl_id {
 651         LPS_PG_INFO_CFG = 0,
 652         LPS_PG_REDLEMEM,
 653         LPS_PG_RESEND_H2C,
 654 };
 655
 656         u8 rtw_hal_set_lps_pg_info(_adapter *adapter);
 657 #endif
 658
 659 int rtw_hal_get_rsvd_page(_adapter *adapter, u32 page_offset, u32 page_num, u8 *buffer, u32 buffer_size);
 660
 661 #ifdef CONFIG_WOWLAN
 662 struct rtl_wow_pattern {
 663         u16     crc;
 664         u8      type;
 665         u32     mask[4];
 666 };
 667 void rtw_wow_pattern_cam_dump(_adapter *adapter);
 668
 669 #ifdef CONFIG_WOW_PATTERN_HW_CAM
 670 void rtw_wow_pattern_read_cam_ent(_adapter *adapter, u8 id, struct  rtl_wow_pattern *context);
 671 void rtw_dump_wow_pattern(void *sel, struct rtl_wow_pattern *pwow_pattern, u8 idx);
 672 #endif
 673 #endif
 674 void rtw_dump_phy_cap(void *sel, _adapter *adapter);
 675 void rtw_dump_rsvd_page(void *sel, _adapter *adapter, u8 page_offset, u8 page_num);
 676
 677 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
 678 s32 rtw_hal_set_default_port_id_cmd(_adapter *adapter, u8 mac_id);
 679 s32 rtw_set_default_port_id(_adapter *adapter);
 680 s32 rtw_set_ps_rsvd_page(_adapter *adapter);
 681 #endif
 682
 683 #endif /* __HAL_COMMON_H__ */