drivers/mmc/host/sdhci-of-arasan.c

   1 /*
   2  * Arasan Secure Digital Host Controller Interface.
   3  * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
   4  * Copyright (c) 2012 Wind River Systems, Inc.
   5  * Copyright (C) 2013 Pengutronix e.K.
   6  * Copyright (C) 2013 Xilinx Inc.
   7  *
   8  * Based on sdhci-of-esdhc.c
   9  *
  10  * Copyright (c) 2007 Freescale Semiconductor, Inc.
  11  * Copyright (c) 2009 MontaVista Software, Inc.
  12  *
  13  * Authors: Xiaobo Xie <X.Xie@freescale.com>
  14  *          Anton Vorontsov <avorontsov@ru.mvista.com>
  15  *
  16  * This program is free software; you can redistribute it and/or modify
  17  * it under the terms of the GNU General Public License as published by
  18  * the Free Software Foundation; either version 2 of the License, or (at
  19  * your option) any later version.
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/of_device.h>
  24 #include <linux/phy/phy.h>
  25 #include "sdhci-pltfm.h"
  26
  27 #define SDHCI_ARASAN_CLK_CTRL_OFFSET    0x2c
  28 #define SDHCI_ARASAN_VENDOR_REGISTER    0x78
  29
  30 #define VENDOR_ENHANCED_STROBE          BIT(0)
  31 #define CLK_CTRL_TIMEOUT_SHIFT          16
  32 #define CLK_CTRL_TIMEOUT_MASK           (0xf << CLK_CTRL_TIMEOUT_SHIFT)
  33 #define CLK_CTRL_TIMEOUT_MIN_EXP        13
  34
  35 /**
  36  * struct sdhci_arasan_data
  37  * @clk_ahb:    Pointer to the AHB clock
  38  * @phy: Pointer to the generic phy
  39  */
  40 struct sdhci_arasan_data {
  41         struct clk      *clk_ahb;
  42         struct phy      *phy;
  43 };
  44
  45 static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host)
  46 {
  47         u32 div;
  48         unsigned long freq;
  49         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
  50
  51         div = readl(host->ioaddr + SDHCI_ARASAN_CLK_CTRL_OFFSET);
  52         div = (div & CLK_CTRL_TIMEOUT_MASK) >> CLK_CTRL_TIMEOUT_SHIFT;
  53
  54         freq = clk_get_rate(pltfm_host->clk);
  55         freq /= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP + div);
  56
  57         return freq;
  58 }
  59
  60 static void sdhci_arasan_enhanced_strobe(struct mmc_host *mmc,
  61                                          struct mmc_ios *ios)
  62 {
  63         u32 vendor;
  64         struct sdhci_host *host = mmc_priv(mmc);
  65
  66         vendor = readl(host->ioaddr + SDHCI_ARASAN_VENDOR_REGISTER);
  67         if (ios->enhanced_strobe)
  68                 vendor |= VENDOR_ENHANCED_STROBE;
  69         else
  70                 vendor &= (~VENDOR_ENHANCED_STROBE);
  71
  72         writel(vendor, host->ioaddr + SDHCI_ARASAN_VENDOR_REGISTER);
  73 }
  74
  75 static void sdhci_arasan_set_clock(struct sdhci_host *host, unsigned int clock)
  76 {
  77         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
  78         struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
  79         bool ctrl_phy = false;
  80
  81         if (clock > MMC_HIGH_52_MAX_DTR && (!IS_ERR(sdhci_arasan->phy)))
  82                 ctrl_phy = true;
  83
  84         if (ctrl_phy) {
  85                 spin_unlock_irq(&host->lock);
  86                 phy_power_off(sdhci_arasan->phy);
  87                 spin_lock_irq(&host->lock);
  88         }
  89
  90         sdhci_set_clock(host, clock);
  91
  92         if (ctrl_phy) {
  93                 spin_unlock_irq(&host->lock);
  94                 phy_power_on(sdhci_arasan->phy);
  95                 spin_lock_irq(&host->lock);
  96         }
  97 }
  98
  99 static struct sdhci_ops sdhci_arasan_ops = {
 100         .set_clock = sdhci_arasan_set_clock,
 101         .get_max_clock = sdhci_pltfm_clk_get_max_clock,
 102         .get_timeout_clock = sdhci_arasan_get_timeout_clock,
 103         .set_bus_width = sdhci_set_bus_width,
 104         .reset = sdhci_reset,
 105         .set_uhs_signaling = sdhci_set_uhs_signaling,
 106 };
 107
 108 static struct sdhci_pltfm_data sdhci_arasan_pdata = {
 109         .ops = &sdhci_arasan_ops,
 110         .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
 111         .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
 112                         SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
 113 };
 114
 115 #ifdef CONFIG_PM_SLEEP
 116 /**
 117  * sdhci_arasan_suspend - Suspend method for the driver
 118  * @dev:        Address of the device structure
 119  * Return: 0 on success and error value on error
 120  *
 121  * Put the device in a low power state.
 122  */
 123 static int sdhci_arasan_suspend(struct device *dev)
 124 {
 125         struct platform_device *pdev = to_platform_device(dev);
 126         struct sdhci_host *host = platform_get_drvdata(pdev);
 127         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 128         struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
 129         int ret;
 130
 131         ret = sdhci_suspend_host(host);
 132         if (ret)
 133                 return ret;
 134
 135         if (!IS_ERR(sdhci_arasan->phy)) {
 136                 ret = phy_power_off(sdhci_arasan->phy);
 137                 if (ret) {
 138                         dev_err(dev, "Cannot power off phy.\n");
 139                         sdhci_resume_host(host);
 140                         return ret;
 141                 }
 142         }
 143
 144         clk_disable(pltfm_host->clk);
 145         clk_disable(sdhci_arasan->clk_ahb);
 146
 147         return 0;
 148 }
 149
 150 /**
 151  * sdhci_arasan_resume - Resume method for the driver
 152  * @dev:        Address of the device structure
 153  * Return: 0 on success and error value on error
 154  *
 155  * Resume operation after suspend
 156  */
 157 static int sdhci_arasan_resume(struct device *dev)
 158 {
 159         struct platform_device *pdev = to_platform_device(dev);
 160         struct sdhci_host *host = platform_get_drvdata(pdev);
 161         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 162         struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
 163         int ret;
 164
 165         ret = clk_enable(sdhci_arasan->clk_ahb);
 166         if (ret) {
 167                 dev_err(dev, "Cannot enable AHB clock.\n");
 168                 return ret;
 169         }
 170
 171         ret = clk_enable(pltfm_host->clk);
 172         if (ret) {
 173                 dev_err(dev, "Cannot enable SD clock.\n");
 174                 return ret;
 175         }
 176
 177         if (!IS_ERR(sdhci_arasan->phy)) {
 178                 ret = phy_power_on(sdhci_arasan->phy);
 179                 if (ret) {
 180                         dev_err(dev, "Cannot power on phy.\n");
 181                         return ret;
 182                 }
 183         }
 184
 185         return sdhci_resume_host(host);
 186 }
 187 #endif /* ! CONFIG_PM_SLEEP */
 188
 189 static SIMPLE_DEV_PM_OPS(sdhci_arasan_dev_pm_ops, sdhci_arasan_suspend,
 190                          sdhci_arasan_resume);
 191
 192 static int sdhci_arasan_probe(struct platform_device *pdev)
 193 {
 194         int ret;
 195         struct clk *clk_xin;
 196         struct sdhci_host *host;
 197         struct sdhci_pltfm_host *pltfm_host;
 198         struct sdhci_arasan_data *sdhci_arasan;
 199
 200         sdhci_arasan = devm_kzalloc(&pdev->dev, sizeof(*sdhci_arasan),
 201                         GFP_KERNEL);
 202         if (!sdhci_arasan)
 203                 return -ENOMEM;
 204
 205         sdhci_arasan->clk_ahb = devm_clk_get(&pdev->dev, "clk_ahb");
 206         if (IS_ERR(sdhci_arasan->clk_ahb)) {
 207                 dev_err(&pdev->dev, "clk_ahb clock not found.\n");
 208                 ret = PTR_ERR(sdhci_arasan->clk_ahb);
 209                 goto err_pltfm_free;
 210         }
 211
 212         clk_xin = devm_clk_get(&pdev->dev, "clk_xin");
 213         if (IS_ERR(clk_xin)) {
 214                 dev_err(&pdev->dev, "clk_xin clock not found.\n");
 215                 ret = PTR_ERR(clk_xin);
 216                 goto err_pltfm_free;
 217         }
 218
 219         ret = clk_prepare_enable(sdhci_arasan->clk_ahb);
 220         if (ret) {
 221                 dev_err(&pdev->dev, "Unable to enable AHB clock.\n");
 222                 goto err_pltfm_free;
 223         }
 224
 225         ret = clk_prepare_enable(clk_xin);
 226         if (ret) {
 227                 dev_err(&pdev->dev, "Unable to enable SD clock.\n");
 228                 goto clk_dis_ahb;
 229         }
 230
 231         host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata, 0);
 232         if (IS_ERR(host)) {
 233                 ret = PTR_ERR(host);
 234                 goto clk_disable_all;
 235         }
 236
 237         if (of_device_is_compatible(pdev->dev.of_node, "arasan,sdhci-4.9a")) {
 238                 host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
 239                 host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
 240         }
 241
 242         sdhci_get_of_property(pdev);
 243         pltfm_host = sdhci_priv(host);
 244         pltfm_host->priv = sdhci_arasan;
 245         pltfm_host->clk = clk_xin;
 246
 247         ret = mmc_of_parse(host->mmc);
 248         if (ret) {
 249                 dev_err(&pdev->dev, "parsing dt failed (%u)\n", ret);
 250                 goto clk_disable_all;
 251         }
 252
 253         sdhci_arasan->phy = ERR_PTR(-ENODEV);
 254         if (of_device_is_compatible(pdev->dev.of_node,
 255                                     "arasan,sdhci-5.1")) {
 256                 sdhci_arasan->phy = devm_phy_get(&pdev->dev,
 257                                                  "phy_arasan");
 258                 if (IS_ERR(sdhci_arasan->phy)) {
 259                         ret = PTR_ERR(sdhci_arasan->phy);
 260                         dev_err(&pdev->dev, "No phy for arasan,sdhci-5.1.\n");
 261                         goto clk_disable_all;
 262                 }
 263
 264                 ret = phy_init(sdhci_arasan->phy);
 265                 if (ret < 0) {
 266                         dev_err(&pdev->dev, "phy_init err.\n");
 267                         goto clk_disable_all;
 268                 }
 269
 270                 ret = phy_power_on(sdhci_arasan->phy);
 271                 if (ret < 0) {
 272                         dev_err(&pdev->dev, "phy_power_on err.\n");
 273                         goto err_phy_power;
 274                 }
 275
 276                 host->mmc_host_ops.hs400_enhanced_strobe =
 277                                         sdhci_arasan_enhanced_strobe;
 278         }
 279
 280         ret = sdhci_add_host(host);
 281         if (ret)
 282                 goto err_add_host;
 283
 284         device_init_wakeup(&pdev->dev, 1);
 285
 286         return 0;
 287
 288 err_add_host:
 289         if (!IS_ERR(sdhci_arasan->phy))
 290                 phy_power_off(sdhci_arasan->phy);
 291 err_phy_power:
 292         if (!IS_ERR(sdhci_arasan->phy))
 293                 phy_exit(sdhci_arasan->phy);
 294 clk_disable_all:
 295         clk_disable_unprepare(clk_xin);
 296 clk_dis_ahb:
 297         clk_disable_unprepare(sdhci_arasan->clk_ahb);
 298 err_pltfm_free:
 299         sdhci_pltfm_free(pdev);
 300         return ret;
 301 }
 302
 303 static int sdhci_arasan_remove(struct platform_device *pdev)
 304 {
 305         int ret;
 306         struct sdhci_host *host = platform_get_drvdata(pdev);
 307         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 308         struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
 309
 310         if (!IS_ERR(sdhci_arasan->phy)) {
 311                 phy_power_off(sdhci_arasan->phy);
 312                 phy_exit(sdhci_arasan->phy);
 313         }
 314
 315         ret = sdhci_pltfm_unregister(pdev);
 316
 317         clk_disable_unprepare(sdhci_arasan->clk_ahb);
 318
 319         return ret;
 320 }
 321
 322 static const struct of_device_id sdhci_arasan_of_match[] = {
 323         { .compatible = "arasan,sdhci-8.9a" },
 324         { .compatible = "arasan,sdhci-5.1" },
 325         { .compatible = "arasan,sdhci-4.9a" },
 326         { }
 327 };
 328 MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match);
 329
 330 static struct platform_driver sdhci_arasan_driver = {
 331         .driver = {
 332                 .name = "sdhci-arasan",
 333                 .of_match_table = sdhci_arasan_of_match,
 334                 .pm = &sdhci_arasan_dev_pm_ops,
 335         },
 336         .probe = sdhci_arasan_probe,
 337         .remove = sdhci_arasan_remove,
 338 };
 339
 340 module_platform_driver(sdhci_arasan_driver);
 341
 342 MODULE_DESCRIPTION("Driver for the Arasan SDHCI Controller");
 343 MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
 344 MODULE_LICENSE("GPL");