5f5ca45474dfdd68672b5f76526c15094536285b
[firefly-linux-kernel-4.4.55.git] / drivers / mailbox / scpi_cmd.h
1 /*
2  * SCPI Command header
3  *
4  * Copyright (C) 2014 ARM Ltd.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along with
16  * this program. If not, see <http://www.gnu.org/licenses/>.
17  */
18
19 #define SCPI_VERSION            0x01000000      /* version: 1.0.0.0 */
20
21 enum scpi_error_codes {
22         SCPI_SUCCESS = 0, /* Success */
23         SCPI_ERR_PARAM = 1, /* Invalid parameter(s) */
24         SCPI_ERR_ALIGN = 2, /* Invalid alignment */
25         SCPI_ERR_SIZE = 3, /* Invalid size */
26         SCPI_ERR_HANDLER = 4, /* Invalid handler/callback */
27         SCPI_ERR_ACCESS = 5, /* Invalid access/permission denied */
28         SCPI_ERR_RANGE = 6, /* Value out of range */
29         SCPI_ERR_TIMEOUT = 7, /* Timeout has occurred */
30         SCPI_ERR_NOMEM = 8, /* Invalid memory area or pointer */
31         SCPI_ERR_PWRSTATE = 9, /* Invalid power state */
32         SCPI_ERR_SUPPORT = 10, /* Not supported or disabled */
33         SCPI_ERR_DEVICE = 11, /* Device error */
34         SCPI_ERR_MAX
35 };
36
37 enum scpi_client_id {
38         SCPI_CL_NONE,
39         SCPI_CL_CLOCKS,
40         SCPI_CL_DVFS,
41         SCPI_CL_POWER,
42         SCPI_CL_THERMAL,
43         SCPI_CL_DDR,
44         SCPI_CL_SYS,
45         SCPI_MAX,
46 };
47
48 enum scpi_ddr_cmd {
49                 SCPI_DDR_INIT,
50                 SCPI_DDR_SET_FREQ,
51                 SCPI_DDR_ROUND_RATE,
52                 SCPI_DDR_AUTO_SELF_REFRESH,
53                 SCPI_DDR_BANDWIDTH_GET,
54                 SCPI_DDR_GET_FREQ,
55 };
56
57 enum scpi_sys_cmd {
58         SCPI_SYS_GET_VERSION,
59         SCPI_SYS_REFRESH_MCU_FREQ,
60 };
61
62 enum scpi_std_cmd {
63         SCPI_CMD_INVALID                = 0x00,
64         SCPI_CMD_SCPI_READY             = 0x01,
65         SCPI_CMD_SCPI_CAPABILITIES      = 0x02,
66         SCPI_CMD_EVENT                  = 0x03,
67         SCPI_CMD_SET_CSS_PWR_STATE      = 0x04,
68         SCPI_CMD_GET_CSS_PWR_STATE      = 0x05,
69         SCPI_CMD_CFG_PWR_STATE_STAT     = 0x06,
70         SCPI_CMD_GET_PWR_STATE_STAT     = 0x07,
71         SCPI_CMD_SYS_PWR_STATE          = 0x08,
72         SCPI_CMD_L2_READY               = 0x09,
73         SCPI_CMD_SET_AP_TIMER           = 0x0a,
74         SCPI_CMD_CANCEL_AP_TIME         = 0x0b,
75         SCPI_CMD_DVFS_CAPABILITIES      = 0x0c,
76         SCPI_CMD_GET_DVFS_INFO          = 0x0d,
77         SCPI_CMD_SET_DVFS               = 0x0e,
78         SCPI_CMD_GET_DVFS               = 0x0f,
79         SCPI_CMD_GET_DVFS_STAT          = 0x10,
80         SCPI_CMD_SET_RTC                = 0x11,
81         SCPI_CMD_GET_RTC                = 0x12,
82         SCPI_CMD_CLOCK_CAPABILITIES     = 0x13,
83         SCPI_CMD_SET_CLOCK_INDEX        = 0x14,
84         SCPI_CMD_SET_CLOCK_VALUE        = 0x15,
85         SCPI_CMD_GET_CLOCK_VALUE        = 0x16,
86         SCPI_CMD_PSU_CAPABILITIES       = 0x17,
87         SCPI_CMD_SET_PSU                = 0x18,
88         SCPI_CMD_GET_PSU                = 0x19,
89         SCPI_CMD_SENSOR_CAPABILITIES    = 0x1a,
90         SCPI_CMD_SENSOR_INFO            = 0x1b,
91         SCPI_CMD_SENSOR_VALUE           = 0x1c,
92         SCPI_CMD_SENSOR_CFG_PERIODIC    = 0x1d,
93         SCPI_CMD_SENSOR_CFG_BOUNDS      = 0x1e,
94         SCPI_CMD_SENSOR_ASYNC_VALUE     = 0x1f,
95         SCPI_CMD_COUNT
96 };
97