2 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
3 * Author:Mark Yao <mark.yao@rock-chips.com>
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #ifndef _ROCKCHIP_DRM_VOP_H
16 #define _ROCKCHIP_DRM_VOP_H
19 * major: IP major vertion, used for IP structure
20 * minor: big feature change under same structure
22 #define VOP_VERSION(major, minor) ((major) << 8 | (minor))
23 #define VOP_MAJOR(version) ((version) >> 8)
24 #define VOP_MINOR(version) ((version) & 0xff)
37 enum vop_data_format {
55 uint32_t begin_minor:4;
58 uint32_t write_mask:1;
62 struct vop_reg y2r_en;
63 struct vop_reg r2r_en;
64 struct vop_reg r2y_en;
72 struct vop_reg standby;
73 struct vop_reg htotal_pw;
74 struct vop_reg hact_st_end;
75 struct vop_reg vtotal_pw;
76 struct vop_reg vact_st_end;
77 struct vop_reg vact_st_end_f1;
78 struct vop_reg vs_st_end_f1;
79 struct vop_reg hpost_st_end;
80 struct vop_reg vpost_st_end;
81 struct vop_reg vpost_st_end_f1;
82 struct vop_reg dsp_interlace;
83 struct vop_reg global_regdone_en;
84 struct vop_reg auto_gate_en;
85 struct vop_reg post_lb_mode;
86 struct vop_reg dsp_layer_sel;
87 struct vop_reg overlay_mode;
88 struct vop_reg core_dclk_div;
89 struct vop_reg p2i_en;
90 struct vop_reg rgb_en;
91 struct vop_reg edp_en;
92 struct vop_reg hdmi_en;
93 struct vop_reg mipi_en;
94 struct vop_reg pin_pol;
95 struct vop_reg rgb_pin_pol;
96 struct vop_reg hdmi_pin_pol;
97 struct vop_reg edp_pin_pol;
98 struct vop_reg mipi_pin_pol;
100 struct vop_reg dither_up;
101 struct vop_reg dither_down;
103 struct vop_reg dsp_data_swap;
104 struct vop_reg dsp_ccir656_avg;
105 struct vop_reg dsp_black;
106 struct vop_reg dsp_blank;
107 struct vop_reg dsp_outzero;
108 struct vop_reg dsp_lut_en;
110 struct vop_reg out_mode;
112 struct vop_reg xmirror;
113 struct vop_reg ymirror;
114 struct vop_reg dsp_background;
116 struct vop_reg cfg_done;
122 struct vop_reg line_flag_num;
123 struct vop_reg enable;
124 struct vop_reg clear;
125 struct vop_reg status;
128 struct vop_scl_extension {
129 struct vop_reg cbcr_vsd_mode;
130 struct vop_reg cbcr_vsu_mode;
131 struct vop_reg cbcr_hsd_mode;
132 struct vop_reg cbcr_ver_scl_mode;
133 struct vop_reg cbcr_hor_scl_mode;
134 struct vop_reg yrgb_vsd_mode;
135 struct vop_reg yrgb_vsu_mode;
136 struct vop_reg yrgb_hsd_mode;
137 struct vop_reg yrgb_ver_scl_mode;
138 struct vop_reg yrgb_hor_scl_mode;
139 struct vop_reg line_load_mode;
140 struct vop_reg cbcr_axi_gather_num;
141 struct vop_reg yrgb_axi_gather_num;
142 struct vop_reg vsd_cbcr_gt2;
143 struct vop_reg vsd_cbcr_gt4;
144 struct vop_reg vsd_yrgb_gt2;
145 struct vop_reg vsd_yrgb_gt4;
146 struct vop_reg bic_coe_sel;
147 struct vop_reg cbcr_axi_gather_en;
148 struct vop_reg yrgb_axi_gather_en;
149 struct vop_reg lb_mode;
152 struct vop_scl_regs {
153 const struct vop_scl_extension *ext;
155 struct vop_reg scale_yrgb_x;
156 struct vop_reg scale_yrgb_y;
157 struct vop_reg scale_cbcr_x;
158 struct vop_reg scale_cbcr_y;
161 struct vop_csc_table {
162 const uint32_t *y2r_bt601;
163 const uint32_t *y2r_bt601_12_235;
164 const uint32_t *y2r_bt601_10bit;
165 const uint32_t *y2r_bt601_10bit_12_235;
166 const uint32_t *r2y_bt601;
167 const uint32_t *r2y_bt601_12_235;
168 const uint32_t *r2y_bt601_10bit;
169 const uint32_t *r2y_bt601_10bit_12_235;
171 const uint32_t *y2r_bt709;
172 const uint32_t *y2r_bt709_10bit;
173 const uint32_t *r2y_bt709;
174 const uint32_t *r2y_bt709_10bit;
176 const uint32_t *y2r_bt2020;
177 const uint32_t *r2y_bt2020;
179 const uint32_t *r2r_bt709_to_bt2020;
180 const uint32_t *r2r_bt2020_to_bt709;
190 VOP_CSC_R2R_BT2020_TO_BT709,
191 VOP_CSC_R2R_BT709_TO_2020,
195 const struct vop_scl_regs *scl;
196 const uint32_t *data_formats;
200 struct vop_reg enable;
201 struct vop_reg format;
202 struct vop_reg xmirror;
203 struct vop_reg ymirror;
204 struct vop_reg rb_swap;
205 struct vop_reg act_info;
206 struct vop_reg dsp_info;
207 struct vop_reg dsp_st;
208 struct vop_reg yrgb_mst;
209 struct vop_reg uv_mst;
210 struct vop_reg yrgb_vir;
211 struct vop_reg uv_vir;
213 struct vop_reg dst_alpha_ctl;
214 struct vop_reg src_alpha_ctl;
215 struct vop_reg alpha_mode;
216 struct vop_reg alpha_en;
217 struct vop_reg key_color;
218 struct vop_reg key_en;
221 struct vop_win_data {
223 enum drm_plane_type type;
224 const struct vop_win_phy *phy;
225 const struct vop_win_phy **area;
226 const struct vop_csc *csc;
227 unsigned int area_size;
230 #define VOP_FEATURE_OUTPUT_10BIT BIT(0)
233 const struct vop_reg_data *init_table;
234 unsigned int table_size;
235 const struct vop_ctrl *ctrl;
236 const struct vop_intr *intr;
237 const struct vop_win_data *win;
238 const struct vop_csc_table *csc_table;
239 unsigned int win_size;
244 /* interrupt define */
245 #define DSP_HOLD_VALID_INTR (1 << 0)
246 #define FS_INTR (1 << 1)
247 #define LINE_FLAG_INTR (1 << 2)
248 #define BUS_ERROR_INTR (1 << 3)
249 #define FS_NEW_INTR (1 << 4)
250 #define ADDR_SAME_INTR (1 << 5)
251 #define LINE_FLAG1_INTR (1 << 6)
252 #define WIN0_EMPTY_INTR (1 << 7)
253 #define WIN1_EMPTY_INTR (1 << 8)
254 #define WIN2_EMPTY_INTR (1 << 9)
255 #define WIN3_EMPTY_INTR (1 << 10)
256 #define HWC_EMPTY_INTR (1 << 11)
257 #define POST_BUF_EMPTY_INTR (1 << 12)
258 #define PWM_GEN_INTR (1 << 13)
260 #define INTR_MASK (DSP_HOLD_VALID_INTR | FS_INTR | \
261 LINE_FLAG_INTR | BUS_ERROR_INTR | \
262 FS_NEW_INTR | LINE_FLAG1_INTR | \
263 WIN0_EMPTY_INTR | WIN1_EMPTY_INTR | \
264 WIN2_EMPTY_INTR | WIN3_EMPTY_INTR | \
265 HWC_EMPTY_INTR | POST_BUF_EMPTY_INTR)
267 #define DSP_HOLD_VALID_INTR_EN(x) ((x) << 4)
268 #define FS_INTR_EN(x) ((x) << 5)
269 #define LINE_FLAG_INTR_EN(x) ((x) << 6)
270 #define BUS_ERROR_INTR_EN(x) ((x) << 7)
271 #define DSP_HOLD_VALID_INTR_MASK (1 << 4)
272 #define FS_INTR_MASK (1 << 5)
273 #define LINE_FLAG_INTR_MASK (1 << 6)
274 #define BUS_ERROR_INTR_MASK (1 << 7)
276 #define INTR_CLR_SHIFT 8
277 #define DSP_HOLD_VALID_INTR_CLR (1 << (INTR_CLR_SHIFT + 0))
278 #define FS_INTR_CLR (1 << (INTR_CLR_SHIFT + 1))
279 #define LINE_FLAG_INTR_CLR (1 << (INTR_CLR_SHIFT + 2))
280 #define BUS_ERROR_INTR_CLR (1 << (INTR_CLR_SHIFT + 3))
282 #define DSP_LINE_NUM(x) (((x) & 0x1fff) << 12)
283 #define DSP_LINE_NUM_MASK (0x1fff << 12)
285 /* src alpha ctrl define */
286 #define SRC_FADING_VALUE(x) (((x) & 0xff) << 24)
287 #define SRC_GLOBAL_ALPHA(x) (((x) & 0xff) << 16)
288 #define SRC_FACTOR_M0(x) (((x) & 0x7) << 6)
289 #define SRC_ALPHA_CAL_M0(x) (((x) & 0x1) << 5)
290 #define SRC_BLEND_M0(x) (((x) & 0x3) << 3)
291 #define SRC_ALPHA_M0(x) (((x) & 0x1) << 2)
292 #define SRC_COLOR_M0(x) (((x) & 0x1) << 1)
293 #define SRC_ALPHA_EN(x) (((x) & 0x1) << 0)
294 /* dst alpha ctrl define */
295 #define DST_FACTOR_M0(x) (((x) & 0x7) << 6)
298 * display output interface supported by rockchip lcdc
300 #define ROCKCHIP_OUT_MODE_P888 0
301 #define ROCKCHIP_OUT_MODE_P666 1
302 #define ROCKCHIP_OUT_MODE_P565 2
303 /* for use special outface */
304 #define ROCKCHIP_OUT_MODE_AAAA 15
306 #define ROCKCHIP_OUT_MODE_TYPE(x) ((x) >> 16)
307 #define ROCKCHIP_OUT_MODE(x) ((x) & 0xffff)
308 #define ROCKCHIP_DSP_MODE(type, mode) \
309 (DRM_MODE_CONNECTOR_##type << 16) | \
310 (ROCKCHIP_OUT_MODE_##mode & 0xffff)
317 enum global_blend_mode {
320 ALPHA_PER_PIX_GLOBAL,
323 enum alpha_cal_mode {
330 ALPHA_SRC_NO_PRE_MUL,
361 enum scale_down_mode {
362 SCALE_DOWN_BIL = 0x0,
366 #define FRAC_16_16(mult, div) (((mult) << 16) / (div))
367 #define SCL_FT_DEFAULT_FIXPOINT_SHIFT 12
368 #define SCL_MAX_VSKIPLINES 4
369 #define MIN_SCL_FT_AFTER_VSKIP 1
371 static inline uint16_t scl_cal_scale(int src, int dst, int shift)
373 return ((src * 2 - 3) << (shift - 1)) / (dst - 1);
376 static inline uint16_t scl_cal_scale2(int src, int dst)
378 return ((src - 1) << 12) / (dst - 1);
381 #define GET_SCL_FT_BILI_DN(src, dst) scl_cal_scale(src, dst, 12)
382 #define GET_SCL_FT_BILI_UP(src, dst) scl_cal_scale(src, dst, 16)
383 #define GET_SCL_FT_BIC(src, dst) scl_cal_scale(src, dst, 16)
385 static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h,
390 act_height = (src_h + vskiplines - 1) / vskiplines;
392 return GET_SCL_FT_BILI_DN(act_height, dst_h);
395 static inline enum scale_mode scl_get_scl_mode(int src, int dst)
405 static inline int scl_get_vskiplines(uint32_t srch, uint32_t dsth)
409 for (vskiplines = SCL_MAX_VSKIPLINES; vskiplines > 1; vskiplines /= 2)
410 if (srch >= vskiplines * dsth * MIN_SCL_FT_AFTER_VSKIP)
416 static inline int scl_vop_cal_lb_mode(int width, bool is_yuv)
421 lb_mode = LB_RGB_3840X2;
422 else if (width > 1920)
423 lb_mode = LB_RGB_2560X4;
425 lb_mode = LB_RGB_1920X5;
426 else if (width > 1280)
427 lb_mode = LB_YUV_3840X5;
429 lb_mode = LB_YUV_2560X8;
434 extern const struct component_ops vop_component_ops;
435 #endif /* _ROCKCHIP_DRM_VOP_H */