drivers/gpu/drm/rockchip/rockchip_drm_rga.c

   1 #include <linux/clk.h>
   2 #include <linux/debugfs.h>
   3 #include <linux/delay.h>
   4 #include <linux/dma-buf.h>
   5 #include <linux/dma-mapping.h>
   6 #include <linux/interrupt.h>
   7 #include <linux/of.h>
   8 #include <linux/of_address.h>
   9 #include <linux/of_device.h>
  10 #include <linux/pm_runtime.h>
  11 #include <linux/reset.h>
  12 #include <linux/seq_file.h>
  13 #include <linux/slab.h>
  14 #include <linux/uaccess.h>
  15
  16 #include <asm/cacheflush.h>
  17 #include <drm/drmP.h>
  18 #include <drm/rockchip_drm.h>
  19
  20 #include "rockchip_drm_drv.h"
  21 #include "rockchip_drm_rga.h"
  22
  23 #define RGA_MODE_BASE_REG               0x0100
  24 #define RGA_MODE_MAX_REG                0x017C
  25
  26 #define RGA_SYS_CTRL                    0x0000
  27 #define RGA_CMD_CTRL                    0x0004
  28 #define RGA_CMD_BASE                    0x0008
  29 #define RGA_INT                         0x0010
  30 #define RGA_MMU_CTRL0                   0x0014
  31 #define RGA_VERSION_INFO                0x0028
  32
  33 #define RGA_SRC_Y_RGB_BASE_ADDR         0x0108
  34 #define RGA_SRC_CB_BASE_ADDR            0x010C
  35 #define RGA_SRC_CR_BASE_ADDR            0x0110
  36 #define RGA_SRC1_RGB_BASE_ADDR          0x0114
  37 #define RGA_DST_Y_RGB_BASE_ADDR         0x013C
  38 #define RGA_DST_CB_BASE_ADDR            0x0140
  39 #define RGA_DST_CR_BASE_ADDR            0x014C
  40 #define RGA_MMU_CTRL1                   0x016C
  41 #define RGA_MMU_SRC_BASE                0x0170
  42 #define RGA_MMU_SRC1_BASE               0x0174
  43 #define RGA_MMU_DST_BASE                0x0178
  44
  45 static void __user *rga_compat_ptr(u64 value)
  46 {
  47 #ifdef CONFIG_ARM64
  48         return (void __user *)(value);
  49 #else
  50         return (void __user *)((u32)(value));
  51 #endif
  52 }
  53
  54 static void rga_dma_flush_range(void *ptr, int size)
  55 {
  56 #ifdef CONFIG_ARM
  57         dmac_flush_range(ptr, ptr + size);
  58         outer_flush_range(virt_to_phys(ptr), virt_to_phys(ptr + size));
  59 #elif CONFIG_ARM64
  60         __dma_flush_range(ptr, ptr + size);
  61 #endif
  62 }
  63
  64 static inline void rga_write(struct rockchip_rga *rga, u32 reg, u32 value)
  65 {
  66         writel(value, rga->regs + reg);
  67 }
  68
  69 static inline u32 rga_read(struct rockchip_rga *rga, u32 reg)
  70 {
  71         return readl(rga->regs + reg);
  72 }
  73
  74 static inline void rga_mod(struct rockchip_rga *rga, u32 reg, u32 val, u32 mask)
  75 {
  76         u32 temp = rga_read(rga, reg) & ~(mask);
  77
  78         temp |= val & mask;
  79         rga_write(rga, reg, temp);
  80 }
  81
  82 static int rga_enable_clocks(struct rockchip_rga *rga)
  83 {
  84         int ret;
  85
  86         ret = clk_prepare_enable(rga->sclk);
  87         if (ret) {
  88                 dev_err(rga->dev, "Cannot enable rga sclk: %d\n", ret);
  89                 return ret;
  90         }
  91
  92         ret = clk_prepare_enable(rga->aclk);
  93         if (ret) {
  94                 dev_err(rga->dev, "Cannot enable rga aclk: %d\n", ret);
  95                 goto err_disable_sclk;
  96         }
  97
  98         ret = clk_prepare_enable(rga->hclk);
  99         if (ret) {
 100                 dev_err(rga->dev, "Cannot enable rga hclk: %d\n", ret);
 101                 goto err_disable_aclk;
 102         }
 103
 104         return 0;
 105
 106 err_disable_sclk:
 107         clk_disable_unprepare(rga->sclk);
 108 err_disable_aclk:
 109         clk_disable_unprepare(rga->aclk);
 110
 111         return ret;
 112 }
 113
 114 static void rga_disable_clocks(struct rockchip_rga *rga)
 115 {
 116         clk_disable_unprepare(rga->sclk);
 117         clk_disable_unprepare(rga->hclk);
 118         clk_disable_unprepare(rga->aclk);
 119 }
 120
 121 static void rga_init_cmdlist(struct rockchip_rga *rga)
 122 {
 123         struct rga_cmdlist_node *node;
 124         int nr;
 125
 126         node = rga->cmdlist_node;
 127
 128         for (nr = 0; nr < ARRAY_SIZE(rga->cmdlist_node); nr++)
 129                 list_add_tail(&node[nr].list, &rga->free_cmdlist);
 130 }
 131
 132 static int rga_alloc_dma_buf_for_cmdlist(struct rga_runqueue_node *runqueue)
 133 {
 134         struct list_head *run_cmdlist = &runqueue->run_cmdlist;
 135         struct device *dev = runqueue->dev;
 136         struct dma_attrs cmdlist_dma_attrs;
 137         struct rga_cmdlist_node *node;
 138         void *cmdlist_pool_virt;
 139         dma_addr_t cmdlist_pool;
 140         int cmdlist_cnt = 0;
 141         int count = 0;
 142
 143         list_for_each_entry(node, run_cmdlist, list)
 144                 cmdlist_cnt++;
 145
 146         init_dma_attrs(&cmdlist_dma_attrs);
 147         dma_set_attr(DMA_ATTR_WRITE_COMBINE, &runqueue->cmdlist_dma_attrs);
 148
 149         cmdlist_pool_virt = dma_alloc_attrs(dev, cmdlist_cnt * RGA_CMDLIST_SIZE,
 150                                             &cmdlist_pool, GFP_KERNEL,
 151                                             &cmdlist_dma_attrs);
 152         if (!cmdlist_pool_virt) {
 153                 dev_err(dev, "failed to allocate cmdlist dma memory\n");
 154                 return -ENOMEM;
 155         }
 156
 157         /*
 158          * Fill in the RGA operation registers from cmdlist command buffer,
 159          * and also filled in the MMU TLB base information.
 160          */
 161         list_for_each_entry(node, run_cmdlist, list) {
 162                 struct rga_cmdlist *cmdlist = &node->cmdlist;
 163                 unsigned int mmu_ctrl = 0;
 164                 unsigned int reg;
 165                 u32 *dest;
 166                 int i;
 167
 168                 dest = cmdlist_pool_virt + RGA_CMDLIST_SIZE * 4 * count++;
 169
 170                 for (i = 0; i < cmdlist->last / 2; i++) {
 171                         reg = (node->cmdlist.data[2 * i] - RGA_MODE_BASE_REG);
 172                         if (reg > RGA_MODE_BASE_REG)
 173                                 continue;
 174                         dest[reg >> 2] = cmdlist->data[2 * i + 1];
 175                 }
 176
 177                 if (cmdlist->src_mmu_pages) {
 178                         reg = RGA_MMU_SRC_BASE - RGA_MODE_BASE_REG;
 179                         dest[reg >> 2] = virt_to_phys(cmdlist->src_mmu_pages) >> 4;
 180                         mmu_ctrl |= 0x7;
 181                 }
 182
 183                 if (cmdlist->dst_mmu_pages) {
 184                         reg = RGA_MMU_DST_BASE - RGA_MODE_BASE_REG;
 185                         dest[reg >> 2] = virt_to_phys(cmdlist->dst_mmu_pages) >> 4;
 186                         mmu_ctrl |= 0x7 << 8;
 187                 }
 188
 189                 if (cmdlist->src1_mmu_pages) {
 190                         reg = RGA_MMU_SRC1_BASE - RGA_MODE_BASE_REG;
 191                         dest[reg >> 2] = virt_to_phys(cmdlist->src1_mmu_pages) >> 4;
 192                         mmu_ctrl |= 0x7 << 4;
 193                 }
 194
 195                 reg = RGA_MMU_CTRL1 - RGA_MODE_BASE_REG;
 196                 dest[reg >> 2] = mmu_ctrl;
 197         }
 198
 199         rga_dma_flush_range(cmdlist_pool_virt, cmdlist_cnt * RGA_CMDLIST_SIZE);
 200
 201         runqueue->cmdlist_dma_attrs = cmdlist_dma_attrs;
 202         runqueue->cmdlist_pool_virt = cmdlist_pool_virt;
 203         runqueue->cmdlist_pool = cmdlist_pool;
 204         runqueue->cmdlist_cnt = cmdlist_cnt;
 205
 206         return 0;
 207 }
 208
 209 static int rga_check_reg_offset(struct device *dev,
 210                                 struct rga_cmdlist_node *node)
 211 {
 212         struct rga_cmdlist *cmdlist = &node->cmdlist;
 213         int index;
 214         int reg;
 215         int i;
 216
 217         for (i = 0; i < cmdlist->last / 2; i++) {
 218                 index = cmdlist->last - 2 * (i + 1);
 219                 reg = cmdlist->data[index];
 220
 221                 switch (reg) {
 222                 case RGA_BUF_TYPE_GEMFD | RGA_DST_Y_RGB_BASE_ADDR:
 223                 case RGA_BUF_TYPE_GEMFD | RGA_SRC_Y_RGB_BASE_ADDR:
 224                         break;
 225
 226                 case RGA_BUF_TYPE_USERPTR | RGA_DST_Y_RGB_BASE_ADDR:
 227                 case RGA_BUF_TYPE_USERPTR | RGA_SRC_Y_RGB_BASE_ADDR:
 228                         goto err;
 229
 230                 default:
 231                         if (reg < RGA_MODE_BASE_REG || reg > RGA_MODE_MAX_REG)
 232                                 goto err;
 233
 234                         if (reg % 4)
 235                                 goto err;
 236                 }
 237         }
 238
 239         return 0;
 240
 241 err:
 242         dev_err(dev, "Bad register offset: 0x%x\n", cmdlist->data[index]);
 243         return -EINVAL;
 244 }
 245
 246 static struct dma_buf_attachment *
 247 rga_gem_buf_to_pages(struct rockchip_rga *rga, void **mmu_pages, int fd)
 248 {
 249         struct dma_buf_attachment *attach;
 250         struct dma_buf *dmabuf;
 251         struct sg_table *sgt;
 252         struct scatterlist *sgl;
 253         unsigned int mapped_size = 0;
 254         unsigned int address;
 255         unsigned int len;
 256         unsigned int i, p;
 257         unsigned int *pages;
 258         int ret;
 259
 260         dmabuf = dma_buf_get(fd);
 261         if (IS_ERR(dmabuf)) {
 262                 dev_err(rga->dev, "Failed to get dma_buf with fd %d\n", fd);
 263                 return ERR_PTR(-EINVAL);
 264         }
 265
 266         attach = dma_buf_attach(dmabuf, rga->dev);
 267         if (IS_ERR(attach)) {
 268                 dev_err(rga->dev, "Failed to attach dma_buf\n");
 269                 ret = PTR_ERR(attach);
 270                 goto failed_attach;
 271         }
 272
 273         sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
 274         if (IS_ERR(sgt)) {
 275                 dev_err(rga->dev, "Failed to map dma_buf attachment\n");
 276                 ret = PTR_ERR(sgt);
 277                 goto failed_detach;
 278         }
 279
 280         /*
 281          * Alloc (2^3 * 4K) = 32K byte for storing pages, those space could
 282          * cover 32K * 4K = 128M ram address.
 283          */
 284         pages = (unsigned int *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 3);
 285
 286         for_each_sg(sgt->sgl, sgl, sgt->nents, i) {
 287                 len = sg_dma_len(sgl) >> PAGE_SHIFT;
 288                 address = sg_phys(sgl);
 289
 290                 for (p = 0; p < len; p++) {
 291                         dma_addr_t phys = address + (p << PAGE_SHIFT);
 292                         void *virt = phys_to_virt(phys);
 293
 294                         rga_dma_flush_range(virt, 4 * 1024);
 295                         pages[mapped_size + p] = phys;
 296                 }
 297
 298                 mapped_size += len;
 299         }
 300
 301         rga_dma_flush_range(pages, 32 * 1024);
 302
 303         *mmu_pages = pages;
 304
 305         dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL);
 306
 307         return attach;
 308
 309 failed_detach:
 310         dma_buf_detach(dmabuf, attach);
 311 failed_attach:
 312         dma_buf_put(dmabuf);
 313
 314         return ERR_PTR(ret);
 315 }
 316
 317 static int rga_map_cmdlist_gem(struct rockchip_rga *rga,
 318                                struct rga_cmdlist_node *node,
 319                                struct drm_device *drm_dev,
 320                                struct drm_file *file)
 321 {
 322         struct rga_cmdlist *cmdlist = &node->cmdlist;
 323         struct dma_buf_attachment *attach;
 324         void *mmu_pages;
 325         int fd;
 326         int i;
 327
 328         for (i = 0; i < cmdlist->last / 2; i++) {
 329                 int index = cmdlist->last - 2 * (i + 1);
 330
 331                 switch (cmdlist->data[index]) {
 332                 case RGA_SRC_Y_RGB_BASE_ADDR | RGA_BUF_TYPE_GEMFD:
 333                         fd = cmdlist->data[index + 1];
 334                         attach = rga_gem_buf_to_pages(rga, &mmu_pages, fd);
 335
 336                         cmdlist->src_attach = attach;
 337                         cmdlist->src_mmu_pages = mmu_pages;
 338                         break;
 339
 340                 case RGA_DST_Y_RGB_BASE_ADDR | RGA_BUF_TYPE_GEMFD:
 341                         fd = cmdlist->data[index + 1];
 342                         attach = rga_gem_buf_to_pages(rga, &mmu_pages, fd);
 343
 344                         cmdlist->dst_attach = attach;
 345                         cmdlist->dst_mmu_pages = mmu_pages;
 346                         break;
 347                 }
 348         }
 349
 350         return 0;
 351 }
 352
 353 static void rga_unmap_cmdlist_gem(struct rockchip_rga *rga,
 354                                   struct rga_cmdlist_node *node)
 355 {
 356         struct dma_buf_attachment *attach;
 357         struct dma_buf *dma_buf;
 358
 359         attach = node->cmdlist.src_attach;
 360         if (attach) {
 361                 dma_buf = attach->dmabuf;
 362                 dma_buf_detach(dma_buf, attach);
 363                 dma_buf_put(dma_buf);
 364         }
 365         node->cmdlist.src_attach = NULL;
 366
 367         attach = node->cmdlist.dst_attach;
 368         if (attach) {
 369                 dma_buf = attach->dmabuf;
 370                 dma_buf_detach(dma_buf, attach);
 371                 dma_buf_put(dma_buf);
 372         }
 373         node->cmdlist.dst_attach = NULL;
 374
 375         if (node->cmdlist.src_mmu_pages)
 376                 free_pages((unsigned long)node->cmdlist.src_mmu_pages, 3);
 377         node->cmdlist.src_mmu_pages = NULL;
 378
 379         if (node->cmdlist.src1_mmu_pages)
 380                 free_pages((unsigned long)node->cmdlist.src1_mmu_pages, 3);
 381         node->cmdlist.src1_mmu_pages = NULL;
 382
 383         if (node->cmdlist.dst_mmu_pages)
 384                 free_pages((unsigned long)node->cmdlist.dst_mmu_pages, 3);
 385         node->cmdlist.dst_mmu_pages = NULL;
 386 }
 387
 388 static void rga_cmd_start(struct rockchip_rga *rga,
 389                           struct rga_runqueue_node *runqueue)
 390 {
 391         int ret;
 392
 393         ret = pm_runtime_get_sync(rga->dev);
 394         if (ret < 0)
 395                 return;
 396
 397         rga_write(rga, RGA_SYS_CTRL, 0x00);
 398
 399         rga_write(rga, RGA_CMD_BASE, runqueue->cmdlist_pool);
 400
 401         rga_write(rga, RGA_SYS_CTRL, 0x22);
 402
 403         rga_write(rga, RGA_INT, 0x600);
 404
 405         rga_write(rga, RGA_CMD_CTRL, ((runqueue->cmdlist_cnt - 1) << 3) | 0x1);
 406 }
 407
 408 static void rga_free_runqueue_node(struct rockchip_rga *rga,
 409                                    struct rga_runqueue_node *runqueue)
 410 {
 411         struct rga_cmdlist_node *node;
 412
 413         if (!runqueue)
 414                 return;
 415
 416         if (runqueue->cmdlist_pool_virt && runqueue->cmdlist_pool)
 417                 dma_free_attrs(rga->dev, runqueue->cmdlist_cnt * RGA_CMDLIST_SIZE,
 418                                runqueue->cmdlist_pool_virt,
 419                                runqueue->cmdlist_pool,
 420                                &runqueue->cmdlist_dma_attrs);
 421
 422         mutex_lock(&rga->cmdlist_mutex);
 423         /*
 424          * commands in run_cmdlist have been completed so unmap all gem
 425          * objects in each command node so that they are unreferenced.
 426          */
 427         list_for_each_entry(node, &runqueue->run_cmdlist, list)
 428                 rga_unmap_cmdlist_gem(rga, node);
 429         list_splice_tail_init(&runqueue->run_cmdlist, &rga->free_cmdlist);
 430         mutex_unlock(&rga->cmdlist_mutex);
 431
 432         kmem_cache_free(rga->runqueue_slab, runqueue);
 433 }
 434
 435 static struct rga_runqueue_node *rga_get_runqueue(struct rockchip_rga *rga)
 436 {
 437         struct rga_runqueue_node *runqueue;
 438
 439         if (list_empty(&rga->runqueue_list))
 440                 return NULL;
 441
 442         runqueue = list_first_entry(&rga->runqueue_list,
 443                                     struct rga_runqueue_node, list);
 444         list_del_init(&runqueue->list);
 445
 446         return runqueue;
 447 }
 448
 449 static void rga_exec_runqueue(struct rockchip_rga *rga)
 450 {
 451         rga->runqueue_node = rga_get_runqueue(rga);
 452         if (rga->runqueue_node)
 453                 rga_cmd_start(rga, rga->runqueue_node);
 454 }
 455
 456 static struct rga_cmdlist_node *rga_get_cmdlist(struct rockchip_rga *rga)
 457 {
 458         struct rga_cmdlist_node *node;
 459         struct device *dev = rga->dev;
 460
 461         mutex_lock(&rga->cmdlist_mutex);
 462         if (list_empty(&rga->free_cmdlist)) {
 463                 dev_err(dev, "there is no free cmdlist\n");
 464                 mutex_unlock(&rga->cmdlist_mutex);
 465                 return NULL;
 466         }
 467
 468         node = list_first_entry(&rga->free_cmdlist,
 469                                 struct rga_cmdlist_node, list);
 470         list_del_init(&node->list);
 471         mutex_unlock(&rga->cmdlist_mutex);
 472
 473         return node;
 474 }
 475
 476 static void rga_add_cmdlist_to_inuse(struct rockchip_drm_rga_private *rga_priv,
 477                                      struct rga_cmdlist_node *node)
 478 {
 479         struct rga_cmdlist_node *lnode;
 480
 481         if (list_empty(&rga_priv->inuse_cmdlist))
 482                 goto add_to_list;
 483
 484         /* this links to base address of new cmdlist */
 485         lnode = list_entry(rga_priv->inuse_cmdlist.prev,
 486                            struct rga_cmdlist_node, list);
 487
 488 add_to_list:
 489         list_add_tail(&node->list, &rga_priv->inuse_cmdlist);
 490 }
 491
 492 /*
 493  * IOCRL functions for userspace to get RGA version.
 494  */
 495 int rockchip_rga_get_ver_ioctl(struct drm_device *drm_dev, void *data,
 496                                struct drm_file *file)
 497 {
 498         struct rockchip_drm_file_private *file_priv = file->driver_priv;
 499         struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
 500         struct drm_rockchip_rga_get_ver *ver = data;
 501         struct rockchip_rga *rga;
 502         struct device *dev;
 503
 504         if (!rga_priv)
 505                 return -ENODEV;
 506
 507         dev = rga_priv->dev;
 508         if (!dev)
 509                 return -ENODEV;
 510
 511         rga = dev_get_drvdata(dev);
 512         if (!rga)
 513                 return -EFAULT;
 514
 515         ver->major = rga->version.major;
 516         ver->minor = rga->version.minor;
 517
 518         return 0;
 519 }
 520
 521 /*
 522  * IOCRL functions for userspace to send an RGA request.
 523  */
 524 int rockchip_rga_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
 525                                    struct drm_file *file)
 526 {
 527         struct rockchip_drm_file_private *file_priv = file->driver_priv;
 528         struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
 529         struct drm_rockchip_rga_set_cmdlist *req = data;
 530         struct rga_cmdlist_node *node;
 531         struct rga_cmdlist *cmdlist;
 532         struct rockchip_rga *rga;
 533         int ret;
 534
 535         if (!rga_priv)
 536                 return -ENODEV;
 537
 538         if (!rga_priv->dev)
 539                 return -ENODEV;
 540
 541         rga = dev_get_drvdata(rga_priv->dev);
 542         if (!rga)
 543                 return -EFAULT;
 544
 545         node = rga_get_cmdlist(rga);
 546         if (!node)
 547                 return -ENOMEM;
 548
 549         cmdlist = &node->cmdlist;
 550         cmdlist->last = 0;
 551
 552         if (req->cmd_nr > RGA_CMDLIST_SIZE || req->cmd_buf_nr > RGA_CMDBUF_SIZE) {
 553                 dev_err(rga->dev, "cmdlist size is too big\n");
 554                 return -EINVAL;
 555         }
 556
 557         /*
 558          * Copy the command / buffer registers setting from userspace, each
 559          * command have two integer, one for register offset, another for
 560          * register value.
 561          */
 562         if (copy_from_user(cmdlist->data, rga_compat_ptr(req->cmd),
 563                            sizeof(struct drm_rockchip_rga_cmd) * req->cmd_nr))
 564                 return -EFAULT;
 565         cmdlist->last += req->cmd_nr * 2;
 566
 567         if (copy_from_user(&cmdlist->data[cmdlist->last],
 568                            rga_compat_ptr(req->cmd_buf),
 569                            sizeof(struct drm_rockchip_rga_cmd) * req->cmd_buf_nr))
 570                 return -EFAULT;
 571         cmdlist->last += req->cmd_buf_nr * 2;
 572
 573         /*
 574          * Check the userspace command registers, and mapping the framebuffer,
 575          * create the RGA mmu pages or get the framebuffer dma address.
 576          */
 577         ret = rga_check_reg_offset(rga->dev, node);
 578         if (ret < 0)
 579                 return ret;
 580
 581         ret = rga_map_cmdlist_gem(rga, node, drm_dev, file);
 582         if (ret < 0)
 583                 return ret;
 584
 585         rga_add_cmdlist_to_inuse(rga_priv, node);
 586
 587         return 0;
 588 }
 589
 590 /*
 591  * IOCRL functions for userspace to start RGA transform.
 592  */
 593 int rockchip_rga_exec_ioctl(struct drm_device *drm_dev, void *data,
 594                             struct drm_file *file)
 595 {
 596         struct rockchip_drm_file_private *file_priv = file->driver_priv;
 597         struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
 598         struct rga_runqueue_node *runqueue;
 599         struct rockchip_rga *rga;
 600         struct device *dev;
 601         int ret;
 602
 603         if (!rga_priv)
 604                 return -ENODEV;
 605
 606         dev = rga_priv->dev;
 607         if (!dev)
 608                 return -ENODEV;
 609
 610         rga = dev_get_drvdata(dev);
 611         if (!rga)
 612                 return -EFAULT;
 613
 614         runqueue = kmem_cache_alloc(rga->runqueue_slab, GFP_KERNEL);
 615         if (!runqueue) {
 616                 dev_err(rga->dev, "failed to allocate memory\n");
 617                 return -ENOMEM;
 618         }
 619
 620         runqueue->dev = rga->dev;
 621
 622         init_completion(&runqueue->complete);
 623
 624         INIT_LIST_HEAD(&runqueue->run_cmdlist);
 625
 626         list_splice_init(&rga_priv->inuse_cmdlist, &runqueue->run_cmdlist);
 627
 628         if (list_empty(&runqueue->run_cmdlist)) {
 629                 dev_err(rga->dev, "there is no inuse cmdlist\n");
 630                 kmem_cache_free(rga->runqueue_slab, runqueue);
 631                 return -EPERM;
 632         }
 633
 634         ret = rga_alloc_dma_buf_for_cmdlist(runqueue);
 635         if (ret < 0) {
 636                 dev_err(rga->dev, "cmdlist init failed\n");
 637                 return ret;
 638         }
 639
 640         mutex_lock(&rga->runqueue_mutex);
 641         runqueue->pid = current->pid;
 642         runqueue->file = file;
 643         list_add_tail(&runqueue->list, &rga->runqueue_list);
 644         if (!rga->runqueue_node)
 645                 rga_exec_runqueue(rga);
 646         mutex_unlock(&rga->runqueue_mutex);
 647
 648         wait_for_completion(&runqueue->complete);
 649         rga_free_runqueue_node(rga, runqueue);
 650
 651         return 0;
 652 }
 653
 654 static int rockchip_rga_open(struct drm_device *drm_dev, struct device *dev,
 655                              struct drm_file *file)
 656 {
 657         struct rockchip_drm_file_private *file_priv = file->driver_priv;
 658         struct rockchip_drm_rga_private *rga_priv;
 659
 660         rga_priv = kzalloc(sizeof(*rga_priv), GFP_KERNEL);
 661         if (!rga_priv)
 662                 return -ENOMEM;
 663
 664         rga_priv->dev = dev;
 665         file_priv->rga_priv = rga_priv;
 666
 667         INIT_LIST_HEAD(&rga_priv->inuse_cmdlist);
 668
 669         return 0;
 670 }
 671
 672 static void rockchip_rga_close(struct drm_device *drm_dev, struct device *dev,
 673                                struct drm_file *file)
 674 {
 675         struct rockchip_drm_file_private *file_priv = file->driver_priv;
 676         struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
 677         struct rga_cmdlist_node *node, *n;
 678         struct rockchip_rga *rga;
 679
 680         if (!dev)
 681                 return;
 682
 683         rga = dev_get_drvdata(dev);
 684         if (!rga)
 685                 return;
 686
 687         mutex_lock(&rga->cmdlist_mutex);
 688         list_for_each_entry_safe(node, n, &rga_priv->inuse_cmdlist, list) {
 689                 /*
 690                  * unmap all gem objects not completed.
 691                  *
 692                  * P.S. if current process was terminated forcely then
 693                  * there may be some commands in inuse_cmdlist so unmap
 694                  * them.
 695                  */
 696                 rga_unmap_cmdlist_gem(rga, node);
 697                 list_move_tail(&node->list, &rga->free_cmdlist);
 698         }
 699         mutex_unlock(&rga->cmdlist_mutex);
 700
 701         kfree(file_priv->rga_priv);
 702 }
 703
 704 static void rga_runqueue_worker(struct work_struct *work)
 705 {
 706         struct rockchip_rga *rga = container_of(work, struct rockchip_rga,
 707                                             runqueue_work);
 708
 709         mutex_lock(&rga->runqueue_mutex);
 710         pm_runtime_put_sync(rga->dev);
 711
 712         complete(&rga->runqueue_node->complete);
 713
 714         if (rga->suspended)
 715                 rga->runqueue_node = NULL;
 716         else
 717                 rga_exec_runqueue(rga);
 718
 719         mutex_unlock(&rga->runqueue_mutex);
 720 }
 721
 722 static irqreturn_t rga_irq_handler(int irq, void *dev_id)
 723 {
 724         struct rockchip_rga *rga = dev_id;
 725         int intr;
 726
 727         intr = rga_read(rga, RGA_INT) & 0xf;
 728
 729         rga_mod(rga, RGA_INT, intr << 4, 0xf << 4);
 730
 731         if (intr & 0x04)
 732                 queue_work(rga->rga_workq, &rga->runqueue_work);
 733
 734         return IRQ_HANDLED;
 735 }
 736
 737 static int rga_parse_dt(struct rockchip_rga *rga)
 738 {
 739         struct reset_control *core_rst, *axi_rst, *ahb_rst;
 740
 741         core_rst = devm_reset_control_get(rga->dev, "core");
 742         if (IS_ERR(core_rst)) {
 743                 dev_err(rga->dev, "failed to get core reset controller\n");
 744                 return PTR_ERR(core_rst);
 745         }
 746
 747         axi_rst = devm_reset_control_get(rga->dev, "axi");
 748         if (IS_ERR(axi_rst)) {
 749                 dev_err(rga->dev, "failed to get axi reset controller\n");
 750                 return PTR_ERR(axi_rst);
 751         }
 752
 753         ahb_rst = devm_reset_control_get(rga->dev, "ahb");
 754         if (IS_ERR(ahb_rst)) {
 755                 dev_err(rga->dev, "failed to get ahb reset controller\n");
 756                 return PTR_ERR(ahb_rst);
 757         }
 758
 759         reset_control_assert(core_rst);
 760         udelay(1);
 761         reset_control_deassert(core_rst);
 762
 763         reset_control_assert(axi_rst);
 764         udelay(1);
 765         reset_control_deassert(axi_rst);
 766
 767         reset_control_assert(ahb_rst);
 768         udelay(1);
 769         reset_control_deassert(ahb_rst);
 770
 771         rga->sclk = devm_clk_get(rga->dev, "sclk");
 772         if (IS_ERR(rga->sclk)) {
 773                 dev_err(rga->dev, "failed to get sclk clock\n");
 774                 return PTR_ERR(rga->sclk);
 775         }
 776
 777         rga->aclk = devm_clk_get(rga->dev, "aclk");
 778         if (IS_ERR(rga->aclk)) {
 779                 dev_err(rga->dev, "failed to get aclk clock\n");
 780                 return PTR_ERR(rga->aclk);
 781         }
 782
 783         rga->hclk = devm_clk_get(rga->dev, "hclk");
 784         if (IS_ERR(rga->hclk)) {
 785                 dev_err(rga->dev, "failed to get hclk clock\n");
 786                 return PTR_ERR(rga->hclk);
 787         }
 788
 789         return rga_enable_clocks(rga);
 790 }
 791
 792 static const struct of_device_id rockchip_rga_dt_ids[] = {
 793         { .compatible = "rockchip,rk3288-rga", },
 794         { .compatible = "rockchip,rk3228-rga", },
 795         { .compatible = "rockchip,rk3399-rga", },
 796         {},
 797 };
 798 MODULE_DEVICE_TABLE(of, rockchip_rga_dt_ids);
 799
 800 static int rga_probe(struct platform_device *pdev)
 801 {
 802         struct drm_rockchip_subdrv *subdrv;
 803         struct rockchip_rga *rga;
 804         struct resource *iores;
 805         int irq;
 806         int ret;
 807
 808         if (!pdev->dev.of_node)
 809                 return -ENODEV;
 810
 811         rga = devm_kzalloc(&pdev->dev, sizeof(*rga), GFP_KERNEL);
 812         if (!rga)
 813                 return -ENOMEM;
 814
 815         rga->dev = &pdev->dev;
 816
 817         rga->runqueue_slab = kmem_cache_create("rga_runqueue_slab",
 818                                                sizeof(struct rga_runqueue_node),
 819                                                0, 0, NULL);
 820         if (!rga->runqueue_slab)
 821                 return -ENOMEM;
 822
 823         rga->rga_workq = create_singlethread_workqueue("rga");
 824         if (!rga->rga_workq) {
 825                 dev_err(rga->dev, "failed to create workqueue\n");
 826                 ret = PTR_ERR(rga->rga_workq);
 827                 goto err_destroy_slab;
 828         }
 829
 830         INIT_WORK(&rga->runqueue_work, rga_runqueue_worker);
 831         INIT_LIST_HEAD(&rga->runqueue_list);
 832         mutex_init(&rga->runqueue_mutex);
 833
 834         INIT_LIST_HEAD(&rga->free_cmdlist);
 835         mutex_init(&rga->cmdlist_mutex);
 836
 837         rga_init_cmdlist(rga);
 838
 839         ret = rga_parse_dt(rga);
 840         if (ret) {
 841                 dev_err(rga->dev, "Unable to parse OF data\n");
 842                 goto err_destroy_workqueue;
 843         }
 844
 845         pm_runtime_enable(rga->dev);
 846
 847         iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 848
 849         rga->regs = devm_ioremap_resource(rga->dev, iores);
 850         if (IS_ERR(rga->regs)) {
 851                 ret = PTR_ERR(rga->regs);
 852                 goto err_put_clk;
 853         }
 854
 855         irq = platform_get_irq(pdev, 0);
 856         if (irq < 0) {
 857                 dev_err(rga->dev, "failed to get irq\n");
 858                 ret = irq;
 859                 goto err_put_clk;
 860         }
 861
 862         ret = devm_request_irq(rga->dev, irq, rga_irq_handler, 0,
 863                                dev_name(rga->dev), rga);
 864         if (ret < 0) {
 865                 dev_err(rga->dev, "failed to request irq\n");
 866                 goto err_put_clk;
 867         }
 868
 869         platform_set_drvdata(pdev, rga);
 870
 871         rga->version.major = (rga_read(rga, RGA_VERSION_INFO) >> 24) & 0xFF;
 872         rga->version.minor = (rga_read(rga, RGA_VERSION_INFO) >> 20) & 0x0F;
 873
 874         subdrv = &rga->subdrv;
 875         subdrv->dev = rga->dev;
 876         subdrv->open = rockchip_rga_open;
 877         subdrv->close = rockchip_rga_close;
 878
 879         rockchip_drm_register_subdrv(subdrv);
 880
 881         return 0;
 882
 883 err_put_clk:
 884         pm_runtime_disable(rga->dev);
 885 err_destroy_workqueue:
 886         destroy_workqueue(rga->rga_workq);
 887 err_destroy_slab:
 888         kmem_cache_destroy(rga->runqueue_slab);
 889
 890         return ret;
 891 }
 892
 893 static int rga_remove(struct platform_device *pdev)
 894 {
 895         struct rockchip_rga *rga = platform_get_drvdata(pdev);
 896
 897         cancel_work_sync(&rga->runqueue_work);
 898
 899         while (rga->runqueue_node) {
 900                 rga_free_runqueue_node(rga, rga->runqueue_node);
 901                 rga->runqueue_node = rga_get_runqueue(rga);
 902         }
 903
 904         rockchip_drm_unregister_subdrv(&rga->subdrv);
 905
 906         pm_runtime_disable(rga->dev);
 907
 908         return 0;
 909 }
 910
 911 static int rga_suspend(struct device *dev)
 912 {
 913         struct rockchip_rga *rga = dev_get_drvdata(dev);
 914
 915         mutex_lock(&rga->runqueue_mutex);
 916         rga->suspended = true;
 917         mutex_unlock(&rga->runqueue_mutex);
 918
 919         flush_work(&rga->runqueue_work);
 920
 921         return 0;
 922 }
 923
 924 static int rga_resume(struct device *dev)
 925 {
 926         struct rockchip_rga *rga = dev_get_drvdata(dev);
 927
 928         rga->suspended = false;
 929         rga_exec_runqueue(rga);
 930
 931         return 0;
 932 }
 933
 934 #ifdef CONFIG_PM
 935 static int rga_runtime_suspend(struct device *dev)
 936 {
 937         struct rockchip_rga *rga = dev_get_drvdata(dev);
 938
 939         rga_disable_clocks(rga);
 940
 941         return 0;
 942 }
 943
 944 static int rga_runtime_resume(struct device *dev)
 945 {
 946         struct rockchip_rga *rga = dev_get_drvdata(dev);
 947
 948         return rga_enable_clocks(rga);
 949 }
 950 #endif
 951
 952 static const struct dev_pm_ops rga_pm = {
 953         SET_SYSTEM_SLEEP_PM_OPS(rga_suspend, rga_resume)
 954         SET_RUNTIME_PM_OPS(rga_runtime_suspend,
 955                            rga_runtime_resume, NULL)
 956 };
 957
 958 static struct platform_driver rga_pltfm_driver = {
 959         .probe  = rga_probe,
 960         .remove = rga_remove,
 961         .driver = {
 962                 .name = "rockchip-rga",
 963                 .pm = &rga_pm,
 964                 .of_match_table = rockchip_rga_dt_ids,
 965         },
 966 };
 967
 968 module_platform_driver(rga_pltfm_driver);
 969
 970 MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
 971 MODULE_DESCRIPTION("Rockchip RGA Driver Extension");
 972 MODULE_LICENSE("GPL");
 973 MODULE_ALIAS("platform:rockchip-rga");