d4e01b0586b90164b18d52f518079842d384e13a
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / drm_edid.c
1 /*
2  * Copyright (c) 2006 Luc Verhaegen (quirks list)
3  * Copyright (c) 2007-2008 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  * Copyright 2010 Red Hat, Inc.
6  *
7  * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8  * FB layer.
9  *   Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10  *
11  * Permission is hereby granted, free of charge, to any person obtaining a
12  * copy of this software and associated documentation files (the "Software"),
13  * to deal in the Software without restriction, including without limitation
14  * the rights to use, copy, modify, merge, publish, distribute, sub license,
15  * and/or sell copies of the Software, and to permit persons to whom the
16  * Software is furnished to do so, subject to the following conditions:
17  *
18  * The above copyright notice and this permission notice (including the
19  * next paragraph) shall be included in all copies or substantial portions
20  * of the Software.
21  *
22  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28  * DEALINGS IN THE SOFTWARE.
29  */
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
35 #include <drm/drmP.h>
36 #include <drm/drm_edid.h>
37 #include <drm/drm_displayid.h>
38
39 #define version_greater(edid, maj, min) \
40         (((edid)->version > (maj)) || \
41          ((edid)->version == (maj) && (edid)->revision > (min)))
42
43 #define EDID_EST_TIMINGS 16
44 #define EDID_STD_TIMINGS 8
45 #define EDID_DETAILED_TIMINGS 4
46
47 /*
48  * EDID blocks out in the wild have a variety of bugs, try to collect
49  * them here (note that userspace may work around broken monitors first,
50  * but fixes should make their way here so that the kernel "just works"
51  * on as many displays as possible).
52  */
53
54 /* First detailed mode wrong, use largest 60Hz mode */
55 #define EDID_QUIRK_PREFER_LARGE_60              (1 << 0)
56 /* Reported 135MHz pixel clock is too high, needs adjustment */
57 #define EDID_QUIRK_135_CLOCK_TOO_HIGH           (1 << 1)
58 /* Prefer the largest mode at 75 Hz */
59 #define EDID_QUIRK_PREFER_LARGE_75              (1 << 2)
60 /* Detail timing is in cm not mm */
61 #define EDID_QUIRK_DETAILED_IN_CM               (1 << 3)
62 /* Detailed timing descriptors have bogus size values, so just take the
63  * maximum size and use that.
64  */
65 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE    (1 << 4)
66 /* Monitor forgot to set the first detailed is preferred bit. */
67 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED     (1 << 5)
68 /* use +hsync +vsync for detailed mode */
69 #define EDID_QUIRK_DETAILED_SYNC_PP             (1 << 6)
70 /* Force reduced-blanking timings for detailed modes */
71 #define EDID_QUIRK_FORCE_REDUCED_BLANKING       (1 << 7)
72 /* Force 8bpc */
73 #define EDID_QUIRK_FORCE_8BPC                   (1 << 8)
74 /* Force 12bpc */
75 #define EDID_QUIRK_FORCE_12BPC                  (1 << 9)
76 /* Force 6bpc */
77 #define EDID_QUIRK_FORCE_6BPC                   (1 << 10)
78
79 struct detailed_mode_closure {
80         struct drm_connector *connector;
81         struct edid *edid;
82         bool preferred;
83         u32 quirks;
84         int modes;
85 };
86
87 #define LEVEL_DMT       0
88 #define LEVEL_GTF       1
89 #define LEVEL_GTF2      2
90 #define LEVEL_CVT       3
91
92 static struct edid_quirk {
93         char vendor[4];
94         int product_id;
95         u32 quirks;
96 } edid_quirk_list[] = {
97         /* Acer AL1706 */
98         { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
99         /* Acer F51 */
100         { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
101         /* Unknown Acer */
102         { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
103
104         /* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
105         { "AEO", 0, EDID_QUIRK_FORCE_6BPC },
106
107         /* Belinea 10 15 55 */
108         { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
109         { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
110
111         /* Envision Peripherals, Inc. EN-7100e */
112         { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
113         /* Envision EN2028 */
114         { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
115
116         /* Funai Electronics PM36B */
117         { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
118           EDID_QUIRK_DETAILED_IN_CM },
119
120         /* LG Philips LCD LP154W01-A5 */
121         { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
122         { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
123
124         /* Philips 107p5 CRT */
125         { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
126
127         /* Proview AY765C */
128         { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
129
130         /* Samsung SyncMaster 205BW.  Note: irony */
131         { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
132         /* Samsung SyncMaster 22[5-6]BW */
133         { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
134         { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
135
136         /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
137         { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
138
139         /* ViewSonic VA2026w */
140         { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
141
142         /* Medion MD 30217 PG */
143         { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
144
145         /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
146         { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
147 };
148
149 /*
150  * Autogenerated from the DMT spec.
151  * This table is copied from xfree86/modes/xf86EdidModes.c.
152  */
153 static const struct drm_display_mode drm_dmt_modes[] = {
154         /* 0x01 - 640x350@85Hz */
155         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
156                    736, 832, 0, 350, 382, 385, 445, 0,
157                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
158         /* 0x02 - 640x400@85Hz */
159         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
160                    736, 832, 0, 400, 401, 404, 445, 0,
161                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
162         /* 0x03 - 720x400@85Hz */
163         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
164                    828, 936, 0, 400, 401, 404, 446, 0,
165                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
166         /* 0x04 - 640x480@60Hz */
167         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
168                    752, 800, 0, 480, 490, 492, 525, 0,
169                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
170         /* 0x05 - 640x480@72Hz */
171         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
172                    704, 832, 0, 480, 489, 492, 520, 0,
173                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
174         /* 0x06 - 640x480@75Hz */
175         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
176                    720, 840, 0, 480, 481, 484, 500, 0,
177                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
178         /* 0x07 - 640x480@85Hz */
179         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
180                    752, 832, 0, 480, 481, 484, 509, 0,
181                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
182         /* 0x08 - 800x600@56Hz */
183         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
184                    896, 1024, 0, 600, 601, 603, 625, 0,
185                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
186         /* 0x09 - 800x600@60Hz */
187         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
188                    968, 1056, 0, 600, 601, 605, 628, 0,
189                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
190         /* 0x0a - 800x600@72Hz */
191         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
192                    976, 1040, 0, 600, 637, 643, 666, 0,
193                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
194         /* 0x0b - 800x600@75Hz */
195         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
196                    896, 1056, 0, 600, 601, 604, 625, 0,
197                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
198         /* 0x0c - 800x600@85Hz */
199         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
200                    896, 1048, 0, 600, 601, 604, 631, 0,
201                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
202         /* 0x0d - 800x600@120Hz RB */
203         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
204                    880, 960, 0, 600, 603, 607, 636, 0,
205                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
206         /* 0x0e - 848x480@60Hz */
207         { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
208                    976, 1088, 0, 480, 486, 494, 517, 0,
209                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
210         /* 0x0f - 1024x768@43Hz, interlace */
211         { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
212                    1208, 1264, 0, 768, 768, 772, 817, 0,
213                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
214                    DRM_MODE_FLAG_INTERLACE) },
215         /* 0x10 - 1024x768@60Hz */
216         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
217                    1184, 1344, 0, 768, 771, 777, 806, 0,
218                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
219         /* 0x11 - 1024x768@70Hz */
220         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
221                    1184, 1328, 0, 768, 771, 777, 806, 0,
222                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
223         /* 0x12 - 1024x768@75Hz */
224         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
225                    1136, 1312, 0, 768, 769, 772, 800, 0,
226                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
227         /* 0x13 - 1024x768@85Hz */
228         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
229                    1168, 1376, 0, 768, 769, 772, 808, 0,
230                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
231         /* 0x14 - 1024x768@120Hz RB */
232         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
233                    1104, 1184, 0, 768, 771, 775, 813, 0,
234                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
235         /* 0x15 - 1152x864@75Hz */
236         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
237                    1344, 1600, 0, 864, 865, 868, 900, 0,
238                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
239         /* 0x55 - 1280x720@60Hz */
240         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
241                    1430, 1650, 0, 720, 725, 730, 750, 0,
242                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
243         /* 0x16 - 1280x768@60Hz RB */
244         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
245                    1360, 1440, 0, 768, 771, 778, 790, 0,
246                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
247         /* 0x17 - 1280x768@60Hz */
248         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
249                    1472, 1664, 0, 768, 771, 778, 798, 0,
250                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
251         /* 0x18 - 1280x768@75Hz */
252         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
253                    1488, 1696, 0, 768, 771, 778, 805, 0,
254                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
255         /* 0x19 - 1280x768@85Hz */
256         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
257                    1496, 1712, 0, 768, 771, 778, 809, 0,
258                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
259         /* 0x1a - 1280x768@120Hz RB */
260         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
261                    1360, 1440, 0, 768, 771, 778, 813, 0,
262                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
263         /* 0x1b - 1280x800@60Hz RB */
264         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
265                    1360, 1440, 0, 800, 803, 809, 823, 0,
266                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
267         /* 0x1c - 1280x800@60Hz */
268         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
269                    1480, 1680, 0, 800, 803, 809, 831, 0,
270                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
271         /* 0x1d - 1280x800@75Hz */
272         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
273                    1488, 1696, 0, 800, 803, 809, 838, 0,
274                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
275         /* 0x1e - 1280x800@85Hz */
276         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
277                    1496, 1712, 0, 800, 803, 809, 843, 0,
278                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
279         /* 0x1f - 1280x800@120Hz RB */
280         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
281                    1360, 1440, 0, 800, 803, 809, 847, 0,
282                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
283         /* 0x20 - 1280x960@60Hz */
284         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
285                    1488, 1800, 0, 960, 961, 964, 1000, 0,
286                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
287         /* 0x21 - 1280x960@85Hz */
288         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
289                    1504, 1728, 0, 960, 961, 964, 1011, 0,
290                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
291         /* 0x22 - 1280x960@120Hz RB */
292         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
293                    1360, 1440, 0, 960, 963, 967, 1017, 0,
294                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
295         /* 0x23 - 1280x1024@60Hz */
296         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
297                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
298                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
299         /* 0x24 - 1280x1024@75Hz */
300         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
301                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
302                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
303         /* 0x25 - 1280x1024@85Hz */
304         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
305                    1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
306                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
307         /* 0x26 - 1280x1024@120Hz RB */
308         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
309                    1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
310                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
311         /* 0x27 - 1360x768@60Hz */
312         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
313                    1536, 1792, 0, 768, 771, 777, 795, 0,
314                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
315         /* 0x28 - 1360x768@120Hz RB */
316         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
317                    1440, 1520, 0, 768, 771, 776, 813, 0,
318                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
319         /* 0x51 - 1366x768@60Hz */
320         { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 85500, 1366, 1436,
321                    1579, 1792, 0, 768, 771, 774, 798, 0,
322                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
323         /* 0x56 - 1366x768@60Hz */
324         { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 72000, 1366, 1380,
325                    1436, 1500, 0, 768, 769, 772, 800, 0,
326                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
327         /* 0x29 - 1400x1050@60Hz RB */
328         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
329                    1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
330                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
331         /* 0x2a - 1400x1050@60Hz */
332         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
333                    1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
334                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
335         /* 0x2b - 1400x1050@75Hz */
336         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
337                    1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
338                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
339         /* 0x2c - 1400x1050@85Hz */
340         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
341                    1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
342                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
343         /* 0x2d - 1400x1050@120Hz RB */
344         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
345                    1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
346                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
347         /* 0x2e - 1440x900@60Hz RB */
348         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
349                    1520, 1600, 0, 900, 903, 909, 926, 0,
350                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
351         /* 0x2f - 1440x900@60Hz */
352         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
353                    1672, 1904, 0, 900, 903, 909, 934, 0,
354                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
355         /* 0x30 - 1440x900@75Hz */
356         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
357                    1688, 1936, 0, 900, 903, 909, 942, 0,
358                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
359         /* 0x31 - 1440x900@85Hz */
360         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
361                    1696, 1952, 0, 900, 903, 909, 948, 0,
362                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
363         /* 0x32 - 1440x900@120Hz RB */
364         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
365                    1520, 1600, 0, 900, 903, 909, 953, 0,
366                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
367         /* 0x53 - 1600x900@60Hz */
368         { DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER, 108000, 1600, 1624,
369                    1704, 1800, 0, 900, 901, 904, 1000, 0,
370                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
371         /* 0x33 - 1600x1200@60Hz */
372         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
373                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
374                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
375         /* 0x34 - 1600x1200@65Hz */
376         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
377                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
378                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
379         /* 0x35 - 1600x1200@70Hz */
380         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
381                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
382                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
383         /* 0x36 - 1600x1200@75Hz */
384         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
385                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
386                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
387         /* 0x37 - 1600x1200@85Hz */
388         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
389                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
390                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
391         /* 0x38 - 1600x1200@120Hz RB */
392         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
393                    1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
394                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
395         /* 0x39 - 1680x1050@60Hz RB */
396         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
397                    1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
398                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
399         /* 0x3a - 1680x1050@60Hz */
400         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
401                    1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
402                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
403         /* 0x3b - 1680x1050@75Hz */
404         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
405                    1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
406                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
407         /* 0x3c - 1680x1050@85Hz */
408         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
409                    1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
410                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
411         /* 0x3d - 1680x1050@120Hz RB */
412         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
413                    1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
414                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
415         /* 0x3e - 1792x1344@60Hz */
416         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
417                    2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
418                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
419         /* 0x3f - 1792x1344@75Hz */
420         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
421                    2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
422                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
423         /* 0x40 - 1792x1344@120Hz RB */
424         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
425                    1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
426                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
427         /* 0x41 - 1856x1392@60Hz */
428         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
429                    2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
430                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
431         /* 0x42 - 1856x1392@75Hz */
432         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
433                    2208, 2560, 0, 1392, 1393, 1396, 1500, 0,
434                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
435         /* 0x43 - 1856x1392@120Hz RB */
436         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
437                    1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
438                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
439         /* 0x52 - 1920x1080@60Hz */
440         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
441                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
442                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
443         /* 0x44 - 1920x1200@60Hz RB */
444         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
445                    2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
446                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
447         /* 0x45 - 1920x1200@60Hz */
448         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
449                    2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
450                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
451         /* 0x46 - 1920x1200@75Hz */
452         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
453                    2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
454                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
455         /* 0x47 - 1920x1200@85Hz */
456         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
457                    2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
458                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
459         /* 0x48 - 1920x1200@120Hz RB */
460         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
461                    2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
462                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
463         /* 0x49 - 1920x1440@60Hz */
464         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
465                    2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
466                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
467         /* 0x4a - 1920x1440@75Hz */
468         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
469                    2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
470                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
471         /* 0x4b - 1920x1440@120Hz RB */
472         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
473                    2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
474                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
475         /* 0x54 - 2048x1152@60Hz */
476         { DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER, 162000, 2048, 2074,
477                    2154, 2250, 0, 1152, 1153, 1156, 1200, 0,
478                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
479         /* 0x4c - 2560x1600@60Hz RB */
480         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
481                    2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
482                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
483         /* 0x4d - 2560x1600@60Hz */
484         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
485                    3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
486                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
487         /* 0x4e - 2560x1600@75Hz */
488         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
489                    3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
490                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
491         /* 0x4f - 2560x1600@85Hz */
492         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
493                    3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
494                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
495         /* 0x50 - 2560x1600@120Hz RB */
496         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
497                    2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
498                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
499         /* 0x57 - 4096x2160@60Hz RB */
500         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556744, 4096, 4104,
501                    4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
502                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
503         /* 0x58 - 4096x2160@59.94Hz RB */
504         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556188, 4096, 4104,
505                    4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
506                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
507 };
508
509 /*
510  * These more or less come from the DMT spec.  The 720x400 modes are
511  * inferred from historical 80x25 practice.  The 640x480@67 and 832x624@75
512  * modes are old-school Mac modes.  The EDID spec says the 1152x864@75 mode
513  * should be 1152x870, again for the Mac, but instead we use the x864 DMT
514  * mode.
515  *
516  * The DMT modes have been fact-checked; the rest are mild guesses.
517  */
518 static const struct drm_display_mode edid_est_modes[] = {
519         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
520                    968, 1056, 0, 600, 601, 605, 628, 0,
521                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
522         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
523                    896, 1024, 0, 600, 601, 603,  625, 0,
524                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
525         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
526                    720, 840, 0, 480, 481, 484, 500, 0,
527                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
528         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
529                    704,  832, 0, 480, 489, 491, 520, 0,
530                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
531         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
532                    768,  864, 0, 480, 483, 486, 525, 0,
533                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
534         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
535                    752, 800, 0, 480, 490, 492, 525, 0,
536                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
537         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
538                    846, 900, 0, 400, 421, 423,  449, 0,
539                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
540         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
541                    846,  900, 0, 400, 412, 414, 449, 0,
542                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
543         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
544                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
545                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
546         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
547                    1136, 1312, 0,  768, 769, 772, 800, 0,
548                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
549         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
550                    1184, 1328, 0,  768, 771, 777, 806, 0,
551                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
552         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
553                    1184, 1344, 0,  768, 771, 777, 806, 0,
554                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
555         { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
556                    1208, 1264, 0, 768, 768, 776, 817, 0,
557                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
558         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
559                    928, 1152, 0, 624, 625, 628, 667, 0,
560                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
561         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
562                    896, 1056, 0, 600, 601, 604,  625, 0,
563                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
564         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
565                    976, 1040, 0, 600, 637, 643, 666, 0,
566                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
567         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
568                    1344, 1600, 0,  864, 865, 868, 900, 0,
569                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
570 };
571
572 struct minimode {
573         short w;
574         short h;
575         short r;
576         short rb;
577 };
578
579 static const struct minimode est3_modes[] = {
580         /* byte 6 */
581         { 640, 350, 85, 0 },
582         { 640, 400, 85, 0 },
583         { 720, 400, 85, 0 },
584         { 640, 480, 85, 0 },
585         { 848, 480, 60, 0 },
586         { 800, 600, 85, 0 },
587         { 1024, 768, 85, 0 },
588         { 1152, 864, 75, 0 },
589         /* byte 7 */
590         { 1280, 768, 60, 1 },
591         { 1280, 768, 60, 0 },
592         { 1280, 768, 75, 0 },
593         { 1280, 768, 85, 0 },
594         { 1280, 960, 60, 0 },
595         { 1280, 960, 85, 0 },
596         { 1280, 1024, 60, 0 },
597         { 1280, 1024, 85, 0 },
598         /* byte 8 */
599         { 1360, 768, 60, 0 },
600         { 1440, 900, 60, 1 },
601         { 1440, 900, 60, 0 },
602         { 1440, 900, 75, 0 },
603         { 1440, 900, 85, 0 },
604         { 1400, 1050, 60, 1 },
605         { 1400, 1050, 60, 0 },
606         { 1400, 1050, 75, 0 },
607         /* byte 9 */
608         { 1400, 1050, 85, 0 },
609         { 1680, 1050, 60, 1 },
610         { 1680, 1050, 60, 0 },
611         { 1680, 1050, 75, 0 },
612         { 1680, 1050, 85, 0 },
613         { 1600, 1200, 60, 0 },
614         { 1600, 1200, 65, 0 },
615         { 1600, 1200, 70, 0 },
616         /* byte 10 */
617         { 1600, 1200, 75, 0 },
618         { 1600, 1200, 85, 0 },
619         { 1792, 1344, 60, 0 },
620         { 1792, 1344, 75, 0 },
621         { 1856, 1392, 60, 0 },
622         { 1856, 1392, 75, 0 },
623         { 1920, 1200, 60, 1 },
624         { 1920, 1200, 60, 0 },
625         /* byte 11 */
626         { 1920, 1200, 75, 0 },
627         { 1920, 1200, 85, 0 },
628         { 1920, 1440, 60, 0 },
629         { 1920, 1440, 75, 0 },
630 };
631
632 static const struct minimode extra_modes[] = {
633         { 1024, 576,  60, 0 },
634         { 1366, 768,  60, 0 },
635         { 1600, 900,  60, 0 },
636         { 1680, 945,  60, 0 },
637         { 1920, 1080, 60, 0 },
638         { 2048, 1152, 60, 0 },
639         { 2048, 1536, 60, 0 },
640 };
641
642 /*
643  * Probably taken from CEA-861 spec.
644  * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
645  *
646  * Index using the VIC.
647  */
648 static const struct drm_display_mode edid_cea_modes[] = {
649         /* 0 - dummy, VICs start at 1 */
650         { },
651         /* 1 - 640x480@60Hz */
652         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
653                    752, 800, 0, 480, 490, 492, 525, 0,
654                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
655           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
656         /* 2 - 720x480@60Hz */
657         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
658                    798, 858, 0, 480, 489, 495, 525, 0,
659                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
660           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
661         /* 3 - 720x480@60Hz */
662         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
663                    798, 858, 0, 480, 489, 495, 525, 0,
664                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
665           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
666         /* 4 - 1280x720@60Hz */
667         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
668                    1430, 1650, 0, 720, 725, 730, 750, 0,
669                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
670           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
671         /* 5 - 1920x1080i@60Hz */
672         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
673                    2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
674                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
675                         DRM_MODE_FLAG_INTERLACE),
676           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
677         /* 6 - 720(1440)x480i@60Hz */
678         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
679                    801, 858, 0, 480, 488, 494, 525, 0,
680                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
681                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
682           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
683         /* 7 - 720(1440)x480i@60Hz */
684         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
685                    801, 858, 0, 480, 488, 494, 525, 0,
686                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
687                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
688           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
689         /* 8 - 720(1440)x240@60Hz */
690         { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
691                    801, 858, 0, 240, 244, 247, 262, 0,
692                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
693                         DRM_MODE_FLAG_DBLCLK),
694           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
695         /* 9 - 720(1440)x240@60Hz */
696         { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
697                    801, 858, 0, 240, 244, 247, 262, 0,
698                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
699                         DRM_MODE_FLAG_DBLCLK),
700           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
701         /* 10 - 2880x480i@60Hz */
702         { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
703                    3204, 3432, 0, 480, 488, 494, 525, 0,
704                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
705                         DRM_MODE_FLAG_INTERLACE),
706           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
707         /* 11 - 2880x480i@60Hz */
708         { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
709                    3204, 3432, 0, 480, 488, 494, 525, 0,
710                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
711                         DRM_MODE_FLAG_INTERLACE),
712           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
713         /* 12 - 2880x240@60Hz */
714         { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
715                    3204, 3432, 0, 240, 244, 247, 262, 0,
716                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
717           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
718         /* 13 - 2880x240@60Hz */
719         { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
720                    3204, 3432, 0, 240, 244, 247, 262, 0,
721                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
722           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
723         /* 14 - 1440x480@60Hz */
724         { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
725                    1596, 1716, 0, 480, 489, 495, 525, 0,
726                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
727           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
728         /* 15 - 1440x480@60Hz */
729         { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
730                    1596, 1716, 0, 480, 489, 495, 525, 0,
731                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
732           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
733         /* 16 - 1920x1080@60Hz */
734         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
735                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
736                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
737           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
738         /* 17 - 720x576@50Hz */
739         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
740                    796, 864, 0, 576, 581, 586, 625, 0,
741                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
742           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
743         /* 18 - 720x576@50Hz */
744         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
745                    796, 864, 0, 576, 581, 586, 625, 0,
746                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
747           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
748         /* 19 - 1280x720@50Hz */
749         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
750                    1760, 1980, 0, 720, 725, 730, 750, 0,
751                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
752           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
753         /* 20 - 1920x1080i@50Hz */
754         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
755                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
756                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
757                         DRM_MODE_FLAG_INTERLACE),
758           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
759         /* 21 - 720(1440)x576i@50Hz */
760         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
761                    795, 864, 0, 576, 580, 586, 625, 0,
762                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
763                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
764           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
765         /* 22 - 720(1440)x576i@50Hz */
766         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
767                    795, 864, 0, 576, 580, 586, 625, 0,
768                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
769                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
770           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
771         /* 23 - 720(1440)x288@50Hz */
772         { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
773                    795, 864, 0, 288, 290, 293, 312, 0,
774                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
775                         DRM_MODE_FLAG_DBLCLK),
776           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
777         /* 24 - 720(1440)x288@50Hz */
778         { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
779                    795, 864, 0, 288, 290, 293, 312, 0,
780                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
781                         DRM_MODE_FLAG_DBLCLK),
782           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
783         /* 25 - 2880x576i@50Hz */
784         { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
785                    3180, 3456, 0, 576, 580, 586, 625, 0,
786                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
787                         DRM_MODE_FLAG_INTERLACE),
788           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
789         /* 26 - 2880x576i@50Hz */
790         { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
791                    3180, 3456, 0, 576, 580, 586, 625, 0,
792                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
793                         DRM_MODE_FLAG_INTERLACE),
794           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
795         /* 27 - 2880x288@50Hz */
796         { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
797                    3180, 3456, 0, 288, 290, 293, 312, 0,
798                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
799           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
800         /* 28 - 2880x288@50Hz */
801         { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
802                    3180, 3456, 0, 288, 290, 293, 312, 0,
803                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
804           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
805         /* 29 - 1440x576@50Hz */
806         { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
807                    1592, 1728, 0, 576, 581, 586, 625, 0,
808                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
809           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
810         /* 30 - 1440x576@50Hz */
811         { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
812                    1592, 1728, 0, 576, 581, 586, 625, 0,
813                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
814           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
815         /* 31 - 1920x1080@50Hz */
816         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
817                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
818                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
819           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
820         /* 32 - 1920x1080@24Hz */
821         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
822                    2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
823                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
824           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
825         /* 33 - 1920x1080@25Hz */
826         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
827                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
828                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
829           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
830         /* 34 - 1920x1080@30Hz */
831         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
832                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
833                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
834           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
835         /* 35 - 2880x480@60Hz */
836         { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
837                    3192, 3432, 0, 480, 489, 495, 525, 0,
838                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
839           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
840         /* 36 - 2880x480@60Hz */
841         { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
842                    3192, 3432, 0, 480, 489, 495, 525, 0,
843                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
844           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
845         /* 37 - 2880x576@50Hz */
846         { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
847                    3184, 3456, 0, 576, 581, 586, 625, 0,
848                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
849           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
850         /* 38 - 2880x576@50Hz */
851         { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
852                    3184, 3456, 0, 576, 581, 586, 625, 0,
853                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
854           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
855         /* 39 - 1920x1080i@50Hz */
856         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
857                    2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
858                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
859                         DRM_MODE_FLAG_INTERLACE),
860           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
861         /* 40 - 1920x1080i@100Hz */
862         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
863                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
864                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
865                         DRM_MODE_FLAG_INTERLACE),
866           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
867         /* 41 - 1280x720@100Hz */
868         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
869                    1760, 1980, 0, 720, 725, 730, 750, 0,
870                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
871           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
872         /* 42 - 720x576@100Hz */
873         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
874                    796, 864, 0, 576, 581, 586, 625, 0,
875                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
876           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
877         /* 43 - 720x576@100Hz */
878         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
879                    796, 864, 0, 576, 581, 586, 625, 0,
880                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
881           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
882         /* 44 - 720(1440)x576i@100Hz */
883         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
884                    795, 864, 0, 576, 580, 586, 625, 0,
885                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
886                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
887           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
888         /* 45 - 720(1440)x576i@100Hz */
889         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
890                    795, 864, 0, 576, 580, 586, 625, 0,
891                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
892                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
893           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
894         /* 46 - 1920x1080i@120Hz */
895         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
896                    2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
897                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
898                         DRM_MODE_FLAG_INTERLACE),
899           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
900         /* 47 - 1280x720@120Hz */
901         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
902                    1430, 1650, 0, 720, 725, 730, 750, 0,
903                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
904           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
905         /* 48 - 720x480@120Hz */
906         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
907                    798, 858, 0, 480, 489, 495, 525, 0,
908                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
909           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
910         /* 49 - 720x480@120Hz */
911         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
912                    798, 858, 0, 480, 489, 495, 525, 0,
913                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
914           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
915         /* 50 - 720(1440)x480i@120Hz */
916         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
917                    801, 858, 0, 480, 488, 494, 525, 0,
918                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
919                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
920           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
921         /* 51 - 720(1440)x480i@120Hz */
922         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
923                    801, 858, 0, 480, 488, 494, 525, 0,
924                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
925                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
926           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
927         /* 52 - 720x576@200Hz */
928         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
929                    796, 864, 0, 576, 581, 586, 625, 0,
930                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
931           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
932         /* 53 - 720x576@200Hz */
933         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
934                    796, 864, 0, 576, 581, 586, 625, 0,
935                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
936           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
937         /* 54 - 720(1440)x576i@200Hz */
938         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
939                    795, 864, 0, 576, 580, 586, 625, 0,
940                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
941                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
942           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
943         /* 55 - 720(1440)x576i@200Hz */
944         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
945                    795, 864, 0, 576, 580, 586, 625, 0,
946                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
947                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
948           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
949         /* 56 - 720x480@240Hz */
950         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
951                    798, 858, 0, 480, 489, 495, 525, 0,
952                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
953           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
954         /* 57 - 720x480@240Hz */
955         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
956                    798, 858, 0, 480, 489, 495, 525, 0,
957                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
958           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
959         /* 58 - 720(1440)x480i@240 */
960         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
961                    801, 858, 0, 480, 488, 494, 525, 0,
962                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
963                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
964           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
965         /* 59 - 720(1440)x480i@240 */
966         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
967                    801, 858, 0, 480, 488, 494, 525, 0,
968                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
969                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
970           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
971         /* 60 - 1280x720@24Hz */
972         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
973                    3080, 3300, 0, 720, 725, 730, 750, 0,
974                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
975           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
976         /* 61 - 1280x720@25Hz */
977         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
978                    3740, 3960, 0, 720, 725, 730, 750, 0,
979                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
980           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
981         /* 62 - 1280x720@30Hz */
982         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
983                    3080, 3300, 0, 720, 725, 730, 750, 0,
984                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
985           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
986         /* 63 - 1920x1080@120Hz */
987         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
988                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
989                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
990          .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
991         /* 64 - 1920x1080@100Hz */
992         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
993                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
994                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
995          .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
996         /* 65 - 1280x720@24Hz */
997         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
998                    3080, 3300, 0, 720, 725, 730, 750, 0,
999                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1000           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1001         /* 66 - 1280x720@25Hz */
1002         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
1003                    3740, 3960, 0, 720, 725, 730, 750, 0,
1004                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1005           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1006         /* 67 - 1280x720@30Hz */
1007         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
1008                    3080, 3300, 0, 720, 725, 730, 750, 0,
1009                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1010           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1011         /* 68 - 1280x720@50Hz */
1012         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
1013                    1760, 1980, 0, 720, 725, 730, 750, 0,
1014                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1015           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1016         /* 69 - 1280x720@60Hz */
1017         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
1018                    1430, 1650, 0, 720, 725, 730, 750, 0,
1019                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1020           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1021         /* 70 - 1280x720@100Hz */
1022         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
1023                    1760, 1980, 0, 720, 725, 730, 750, 0,
1024                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1025           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1026         /* 71 - 1280x720@120Hz */
1027         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
1028                    1430, 1650, 0, 720, 725, 730, 750, 0,
1029                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1030           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1031         /* 72 - 1920x1080@24Hz */
1032         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
1033                    2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
1034                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1035           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1036         /* 73 - 1920x1080@25Hz */
1037         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
1038                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1039                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1040           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1041         /* 74 - 1920x1080@30Hz */
1042         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
1043                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1044                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1045           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1046         /* 75 - 1920x1080@50Hz */
1047         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
1048                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1049                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1050           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1051         /* 76 - 1920x1080@60Hz */
1052         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
1053                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1054                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1055           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1056         /* 77 - 1920x1080@100Hz */
1057         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
1058                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
1059                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1060          .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1061         /* 78 - 1920x1080@120Hz */
1062         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
1063                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1064                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1065          .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1066         /* 79 - 1680x720@24Hz */
1067         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 3040,
1068                 3080, 3300, 0, 720, 725, 730, 750, 0,
1069                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1070         .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1071         /* 80 - 1680x720@25Hz */
1072         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 2908,
1073                 2948, 3168, 0, 720, 725, 730, 750, 0,
1074                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1075         .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1076         /* 81 - 1680x720@30Hz */
1077         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 2380,
1078                 2420, 2640, 0, 720, 725, 730, 750, 0,
1079                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1080         .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1081         /* 82 - 1680x720@50Hz */
1082         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 82500, 1680, 1940,
1083                 1980, 2200, 0, 720, 725, 730, 750, 0,
1084                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1085         .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1086         /* 83 - 1680x720@60Hz */
1087         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 99000, 1680, 1940,
1088                 1980, 2200, 0, 720, 725, 730, 750, 0,
1089                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1090         .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1091         /* 84 - 1680x720@100Hz */
1092         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 165000, 1680, 1740,
1093                 1780, 2000, 0, 720, 725, 730, 825, 0,
1094                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1095         .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1096         /* 85 - 1680x720@120Hz */
1097         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 198000, 1680, 1740,
1098                 1780, 2000, 0, 720, 725, 730, 825, 0,
1099                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1100         .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1101         /* 86 - 2560x1080@24Hz */
1102         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 99000, 2560, 3558,
1103                 3602, 3750, 0, 1080, 1084, 1089, 1100, 0,
1104                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1105         .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1106         /* 87 - 2560x1080@25Hz */
1107         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 90000, 2560, 3008,
1108                 3052, 3200, 0, 1080, 1084, 1089, 1125, 0,
1109                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1110         .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1111         /* 88 - 2560x1080@30Hz */
1112         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 118800, 2560, 3328,
1113                 3372, 3520, 0, 1080, 1084, 1089, 1125, 0,
1114                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1115         .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1116         /* 89 - 2560x1080@50Hz */
1117         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 185625, 2560, 3108,
1118                 3152, 3300, 0, 1080, 1084, 1089, 1125, 0,
1119                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1120         .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1121         /* 90 - 2560x1080@60Hz */
1122         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 198000, 2560, 2808,
1123                 2852, 3000, 0, 1080, 1084, 1089, 1100, 0,
1124                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1125         .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1126         /* 91 - 2560x1080@100Hz */
1127         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 371250, 2560, 2778,
1128                 2822, 2970, 0, 1080, 1084, 1089, 1250, 0,
1129                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1130         .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1131         /* 92 - 2560x1080@120Hz */
1132         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 495000, 2560, 3108,
1133                 3152, 3300, 0, 1080, 1084, 1089, 1250, 0,
1134                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1135         .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1136         /* 93 - 3840x2160p@24Hz 16:9 */
1137         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
1138                 5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1139                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1140         .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9,},
1141         /* 94 - 3840x2160p@25Hz 16:9 */
1142         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896,
1143                 4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1144                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1145         .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9},
1146         /* 95 - 3840x2160p@30Hz 16:9 */
1147         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
1148                 4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1149                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1150         .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9},
1151         /* 96 - 3840x2160p@50Hz 16:9 */
1152         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
1153                 4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1154                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1155         .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9},
1156         /* 97 - 3840x2160p@60Hz 16:9 */
1157         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
1158                 4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1159                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1160         .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9},
1161         /* 98 - 4096x2160p@24Hz 256:135 */
1162         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5116,
1163                 5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1164                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1165         .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135},
1166         /* 99 - 4096x2160p@25Hz 256:135 */
1167         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5064,
1168                 5152, 5280, 0, 2160, 2168, 2178, 2250, 0,
1169                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1170         .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135},
1171         /* 100 - 4096x2160p@30Hz 256:135 */
1172         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 4184,
1173                 4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
1174                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1175         .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135},
1176         /* 101 - 4096x2160p@50Hz 256:135 */
1177         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 5064,
1178                 5152, 5280, 0, 2160, 2168, 2178, 2250, 0,
1179                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1180         .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135},
1181         /* 102 - 4096x2160p@60Hz 256:135 */
1182         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 4184,
1183                 4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
1184                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1185         .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135},
1186         /* 103 - 3840x2160p@24Hz 64:27 */
1187         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
1188                 5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1189                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1190         .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27},
1191         /* 104 - 3840x2160p@25Hz 64:27 */
1192         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
1193                 4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1194                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1195         .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27},
1196         /* 105 - 3840x2160p@30Hz 64:27 */
1197         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
1198                 4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1199                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1200         .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27},
1201         /* 106 - 3840x2160p@50Hz 64:27 */
1202         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
1203                 4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1204                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1205         .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27},
1206         /* 107 - 3840x2160p@60Hz 64:27 */
1207         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
1208                 4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1209                 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1210         .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27},
1211 };
1212
1213 /*
1214  * HDMI 1.4 4k modes. Index using the VIC.
1215  */
1216 static const struct drm_display_mode edid_4k_modes[] = {
1217         /* 0 - dummy, VICs start at 1 */
1218         { },
1219         /* 1 - 3840x2160@30Hz */
1220         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1221                    3840, 4016, 4104, 4400, 0,
1222                    2160, 2168, 2178, 2250, 0,
1223                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1224           .vrefresh = 30, },
1225         /* 2 - 3840x2160@25Hz */
1226         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1227                    3840, 4896, 4984, 5280, 0,
1228                    2160, 2168, 2178, 2250, 0,
1229                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1230           .vrefresh = 25, },
1231         /* 3 - 3840x2160@24Hz */
1232         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1233                    3840, 5116, 5204, 5500, 0,
1234                    2160, 2168, 2178, 2250, 0,
1235                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1236           .vrefresh = 24, },
1237         /* 4 - 4096x2160@24Hz (SMPTE) */
1238         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
1239                    4096, 5116, 5204, 5500, 0,
1240                    2160, 2168, 2178, 2250, 0,
1241                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1242           .vrefresh = 24, },
1243 };
1244
1245 /*** DDC fetch and block validation ***/
1246
1247 static const u8 edid_header[] = {
1248         0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1249 };
1250
1251 /**
1252  * drm_edid_header_is_valid - sanity check the header of the base EDID block
1253  * @raw_edid: pointer to raw base EDID block
1254  *
1255  * Sanity check the header of the base EDID block.
1256  *
1257  * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1258  */
1259 int drm_edid_header_is_valid(const u8 *raw_edid)
1260 {
1261         int i, score = 0;
1262
1263         for (i = 0; i < sizeof(edid_header); i++)
1264                 if (raw_edid[i] == edid_header[i])
1265                         score++;
1266
1267         return score;
1268 }
1269 EXPORT_SYMBOL(drm_edid_header_is_valid);
1270
1271 static int edid_fixup __read_mostly = 6;
1272 module_param_named(edid_fixup, edid_fixup, int, 0400);
1273 MODULE_PARM_DESC(edid_fixup,
1274                  "Minimum number of valid EDID header bytes (0-8, default 6)");
1275
1276 static void drm_get_displayid(struct drm_connector *connector,
1277                               struct edid *edid);
1278
1279 static int drm_edid_block_checksum(const u8 *raw_edid)
1280 {
1281         int i;
1282         u8 csum = 0;
1283         for (i = 0; i < EDID_LENGTH; i++)
1284                 csum += raw_edid[i];
1285
1286         return csum;
1287 }
1288
1289 static bool drm_edid_is_zero(const u8 *in_edid, int length)
1290 {
1291         if (memchr_inv(in_edid, 0, length))
1292                 return false;
1293
1294         return true;
1295 }
1296
1297 /**
1298  * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1299  * @raw_edid: pointer to raw EDID block
1300  * @block: type of block to validate (0 for base, extension otherwise)
1301  * @print_bad_edid: if true, dump bad EDID blocks to the console
1302  * @edid_corrupt: if true, the header or checksum is invalid
1303  *
1304  * Validate a base or extension EDID block and optionally dump bad blocks to
1305  * the console.
1306  *
1307  * Return: True if the block is valid, false otherwise.
1308  */
1309 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
1310                           bool *edid_corrupt)
1311 {
1312         u8 csum;
1313         struct edid *edid = (struct edid *)raw_edid;
1314
1315         if (WARN_ON(!raw_edid))
1316                 return false;
1317
1318         if (edid_fixup > 8 || edid_fixup < 0)
1319                 edid_fixup = 6;
1320
1321         if (block == 0) {
1322                 int score = drm_edid_header_is_valid(raw_edid);
1323                 if (score == 8) {
1324                         if (edid_corrupt)
1325                                 *edid_corrupt = false;
1326                 } else if (score >= edid_fixup) {
1327                         /* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
1328                          * The corrupt flag needs to be set here otherwise, the
1329                          * fix-up code here will correct the problem, the
1330                          * checksum is correct and the test fails
1331                          */
1332                         if (edid_corrupt)
1333                                 *edid_corrupt = true;
1334                         DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1335                         memcpy(raw_edid, edid_header, sizeof(edid_header));
1336                 } else {
1337                         if (edid_corrupt)
1338                                 *edid_corrupt = true;
1339                         goto bad;
1340                 }
1341         }
1342
1343         csum = drm_edid_block_checksum(raw_edid);
1344         if (csum) {
1345                 if (print_bad_edid) {
1346                         DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1347                 }
1348
1349                 if (edid_corrupt)
1350                         *edid_corrupt = true;
1351
1352                 /* allow CEA to slide through, switches mangle this */
1353                 if (raw_edid[0] != 0x02)
1354                         goto bad;
1355         }
1356
1357         /* per-block-type checks */
1358         switch (raw_edid[0]) {
1359         case 0: /* base */
1360                 if (edid->version != 1) {
1361                         DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1362                         goto bad;
1363                 }
1364
1365                 if (edid->revision > 4)
1366                         DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1367                 break;
1368
1369         default:
1370                 break;
1371         }
1372
1373         return true;
1374
1375 bad:
1376         if (print_bad_edid) {
1377                 if (drm_edid_is_zero(raw_edid, EDID_LENGTH)) {
1378                         printk(KERN_ERR "EDID block is all zeroes\n");
1379                 } else {
1380                         printk(KERN_ERR "Raw EDID:\n");
1381                         print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
1382                                raw_edid, EDID_LENGTH, false);
1383                 }
1384         }
1385         return false;
1386 }
1387 EXPORT_SYMBOL(drm_edid_block_valid);
1388
1389 /**
1390  * drm_edid_is_valid - sanity check EDID data
1391  * @edid: EDID data
1392  *
1393  * Sanity-check an entire EDID record (including extensions)
1394  *
1395  * Return: True if the EDID data is valid, false otherwise.
1396  */
1397 bool drm_edid_is_valid(struct edid *edid)
1398 {
1399         int i;
1400         u8 *raw = (u8 *)edid;
1401
1402         if (!edid)
1403                 return false;
1404
1405         for (i = 0; i <= edid->extensions; i++)
1406                 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
1407                         return false;
1408
1409         return true;
1410 }
1411 EXPORT_SYMBOL(drm_edid_is_valid);
1412
1413 #define DDC_SEGMENT_ADDR 0x30
1414 /**
1415  * drm_do_probe_ddc_edid() - get EDID information via I2C
1416  * @data: I2C device adapter
1417  * @buf: EDID data buffer to be filled
1418  * @block: 128 byte EDID block to start fetching from
1419  * @len: EDID data buffer length to fetch
1420  *
1421  * Try to fetch EDID information by calling I2C driver functions.
1422  *
1423  * Return: 0 on success or -1 on failure.
1424  */
1425 static int
1426 drm_do_probe_ddc_edid(void *data, u8 *buf, unsigned int block, size_t len)
1427 {
1428         struct i2c_adapter *adapter = data;
1429         unsigned char start = block * EDID_LENGTH;
1430         unsigned char segment = block >> 1;
1431         unsigned char xfers = segment ? 3 : 2;
1432         int ret, retries = 5;
1433
1434         /*
1435          * The core I2C driver will automatically retry the transfer if the
1436          * adapter reports EAGAIN. However, we find that bit-banging transfers
1437          * are susceptible to errors under a heavily loaded machine and
1438          * generate spurious NAKs and timeouts. Retrying the transfer
1439          * of the individual block a few times seems to overcome this.
1440          */
1441         do {
1442                 struct i2c_msg msgs[] = {
1443                         {
1444                                 .addr   = DDC_SEGMENT_ADDR,
1445                                 .flags  = 0,
1446                                 .len    = 1,
1447                                 .buf    = &segment,
1448                         }, {
1449                                 .addr   = DDC_ADDR,
1450                                 .flags  = 0,
1451                                 .len    = 1,
1452                                 .buf    = &start,
1453                         }, {
1454                                 .addr   = DDC_ADDR,
1455                                 .flags  = I2C_M_RD,
1456                                 .len    = len,
1457                                 .buf    = buf,
1458                         }
1459                 };
1460
1461                 /*
1462                  * Avoid sending the segment addr to not upset non-compliant
1463                  * DDC monitors.
1464                  */
1465                 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1466
1467                 if (ret == -ENXIO) {
1468                         DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1469                                         adapter->name);
1470                         break;
1471                 }
1472         } while (ret != xfers && --retries);
1473
1474         return ret == xfers ? 0 : -1;
1475 }
1476
1477 /**
1478  * drm_do_get_edid - get EDID data using a custom EDID block read function
1479  * @connector: connector we're probing
1480  * @get_edid_block: EDID block read function
1481  * @data: private data passed to the block read function
1482  *
1483  * When the I2C adapter connected to the DDC bus is hidden behind a device that
1484  * exposes a different interface to read EDID blocks this function can be used
1485  * to get EDID data using a custom block read function.
1486  *
1487  * As in the general case the DDC bus is accessible by the kernel at the I2C
1488  * level, drivers must make all reasonable efforts to expose it as an I2C
1489  * adapter and use drm_get_edid() instead of abusing this function.
1490  *
1491  * Return: Pointer to valid EDID or NULL if we couldn't find any.
1492  */
1493 struct edid *drm_do_get_edid(struct drm_connector *connector,
1494         int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
1495                               size_t len),
1496         void *data)
1497 {
1498         int i, j = 0, valid_extensions = 0;
1499         u8 *block, *new;
1500         bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1501
1502         if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1503                 return NULL;
1504
1505         /* base block fetch */
1506         for (i = 0; i < 4; i++) {
1507                 if (get_edid_block(data, block, 0, EDID_LENGTH))
1508                         goto out;
1509                 if (drm_edid_block_valid(block, 0, print_bad_edid,
1510                                          &connector->edid_corrupt))
1511                         break;
1512                 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1513                         connector->null_edid_counter++;
1514                         goto carp;
1515                 }
1516         }
1517         if (i == 4)
1518                 goto carp;
1519
1520         /* if there's no extensions, we're done */
1521         if (block[0x7e] == 0)
1522                 return (struct edid *)block;
1523
1524         new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1525         if (!new)
1526                 goto out;
1527         block = new;
1528
1529         for (j = 1; j <= block[0x7e]; j++) {
1530                 for (i = 0; i < 4; i++) {
1531                         if (get_edid_block(data,
1532                                   block + (valid_extensions + 1) * EDID_LENGTH,
1533                                   j, EDID_LENGTH))
1534                                 goto out;
1535                         if (drm_edid_block_valid(block + (valid_extensions + 1)
1536                                                  * EDID_LENGTH, j,
1537                                                  print_bad_edid,
1538                                                  NULL)) {
1539                                 valid_extensions++;
1540                                 break;
1541                         }
1542                 }
1543
1544                 if (i == 4 && print_bad_edid) {
1545                         dev_warn(connector->dev->dev,
1546                          "%s: Ignoring invalid EDID block %d.\n",
1547                          connector->name, j);
1548
1549                         connector->bad_edid_counter++;
1550                 }
1551         }
1552
1553         if (valid_extensions != block[0x7e]) {
1554                 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1555                 block[0x7e] = valid_extensions;
1556                 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1557                 if (!new)
1558                         goto out;
1559                 block = new;
1560         }
1561
1562         return (struct edid *)block;
1563
1564 carp:
1565         if (print_bad_edid) {
1566                 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1567                          connector->name, j);
1568         }
1569         connector->bad_edid_counter++;
1570
1571 out:
1572         kfree(block);
1573         return NULL;
1574 }
1575 EXPORT_SYMBOL_GPL(drm_do_get_edid);
1576
1577 /**
1578  * drm_probe_ddc() - probe DDC presence
1579  * @adapter: I2C adapter to probe
1580  *
1581  * Return: True on success, false on failure.
1582  */
1583 bool
1584 drm_probe_ddc(struct i2c_adapter *adapter)
1585 {
1586         unsigned char out;
1587
1588         return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1589 }
1590 EXPORT_SYMBOL(drm_probe_ddc);
1591
1592 /**
1593  * drm_get_edid - get EDID data, if available
1594  * @connector: connector we're probing
1595  * @adapter: I2C adapter to use for DDC
1596  *
1597  * Poke the given I2C channel to grab EDID data if possible.  If found,
1598  * attach it to the connector.
1599  *
1600  * Return: Pointer to valid EDID or NULL if we couldn't find any.
1601  */
1602 struct edid *drm_get_edid(struct drm_connector *connector,
1603                           struct i2c_adapter *adapter)
1604 {
1605         struct edid *edid;
1606
1607         if (!drm_probe_ddc(adapter))
1608                 return NULL;
1609
1610         edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
1611         if (edid)
1612                 drm_get_displayid(connector, edid);
1613         return edid;
1614 }
1615 EXPORT_SYMBOL(drm_get_edid);
1616
1617 /**
1618  * drm_edid_duplicate - duplicate an EDID and the extensions
1619  * @edid: EDID to duplicate
1620  *
1621  * Return: Pointer to duplicated EDID or NULL on allocation failure.
1622  */
1623 struct edid *drm_edid_duplicate(const struct edid *edid)
1624 {
1625         return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1626 }
1627 EXPORT_SYMBOL(drm_edid_duplicate);
1628
1629 /*** EDID parsing ***/
1630
1631 /**
1632  * edid_vendor - match a string against EDID's obfuscated vendor field
1633  * @edid: EDID to match
1634  * @vendor: vendor string
1635  *
1636  * Returns true if @vendor is in @edid, false otherwise
1637  */
1638 static bool edid_vendor(struct edid *edid, char *vendor)
1639 {
1640         char edid_vendor[3];
1641
1642         edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1643         edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1644                           ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1645         edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1646
1647         return !strncmp(edid_vendor, vendor, 3);
1648 }
1649
1650 /**
1651  * edid_get_quirks - return quirk flags for a given EDID
1652  * @edid: EDID to process
1653  *
1654  * This tells subsequent routines what fixes they need to apply.
1655  */
1656 static u32 edid_get_quirks(struct edid *edid)
1657 {
1658         struct edid_quirk *quirk;
1659         int i;
1660
1661         for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1662                 quirk = &edid_quirk_list[i];
1663
1664                 if (edid_vendor(edid, quirk->vendor) &&
1665                     (EDID_PRODUCT_ID(edid) == quirk->product_id))
1666                         return quirk->quirks;
1667         }
1668
1669         return 0;
1670 }
1671
1672 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1673 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1674
1675 /**
1676  * edid_fixup_preferred - set preferred modes based on quirk list
1677  * @connector: has mode list to fix up
1678  * @quirks: quirks list
1679  *
1680  * Walk the mode list for @connector, clearing the preferred status
1681  * on existing modes and setting it anew for the right mode ala @quirks.
1682  */
1683 static void edid_fixup_preferred(struct drm_connector *connector,
1684                                  u32 quirks)
1685 {
1686         struct drm_display_mode *t, *cur_mode, *preferred_mode;
1687         int target_refresh = 0;
1688         int cur_vrefresh, preferred_vrefresh;
1689
1690         if (list_empty(&connector->probed_modes))
1691                 return;
1692
1693         if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1694                 target_refresh = 60;
1695         if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1696                 target_refresh = 75;
1697
1698         preferred_mode = list_first_entry(&connector->probed_modes,
1699                                           struct drm_display_mode, head);
1700
1701         list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1702                 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1703
1704                 if (cur_mode == preferred_mode)
1705                         continue;
1706
1707                 /* Largest mode is preferred */
1708                 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1709                         preferred_mode = cur_mode;
1710
1711                 cur_vrefresh = cur_mode->vrefresh ?
1712                         cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1713                 preferred_vrefresh = preferred_mode->vrefresh ?
1714                         preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1715                 /* At a given size, try to get closest to target refresh */
1716                 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1717                     MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1718                     MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1719                         preferred_mode = cur_mode;
1720                 }
1721         }
1722
1723         preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1724 }
1725
1726 static bool
1727 mode_is_rb(const struct drm_display_mode *mode)
1728 {
1729         return (mode->htotal - mode->hdisplay == 160) &&
1730                (mode->hsync_end - mode->hdisplay == 80) &&
1731                (mode->hsync_end - mode->hsync_start == 32) &&
1732                (mode->vsync_start - mode->vdisplay == 3);
1733 }
1734
1735 /*
1736  * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1737  * @dev: Device to duplicate against
1738  * @hsize: Mode width
1739  * @vsize: Mode height
1740  * @fresh: Mode refresh rate
1741  * @rb: Mode reduced-blanking-ness
1742  *
1743  * Walk the DMT mode list looking for a match for the given parameters.
1744  *
1745  * Return: A newly allocated copy of the mode, or NULL if not found.
1746  */
1747 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1748                                            int hsize, int vsize, int fresh,
1749                                            bool rb)
1750 {
1751         int i;
1752
1753         for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1754                 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1755                 if (hsize != ptr->hdisplay)
1756                         continue;
1757                 if (vsize != ptr->vdisplay)
1758                         continue;
1759                 if (fresh != drm_mode_vrefresh(ptr))
1760                         continue;
1761                 if (rb != mode_is_rb(ptr))
1762                         continue;
1763
1764                 return drm_mode_duplicate(dev, ptr);
1765         }
1766
1767         return NULL;
1768 }
1769 EXPORT_SYMBOL(drm_mode_find_dmt);
1770
1771 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1772
1773 static void
1774 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1775 {
1776         int i, n = 0;
1777         u8 d = ext[0x02];
1778         u8 *det_base = ext + d;
1779
1780         n = (127 - d) / 18;
1781         for (i = 0; i < n; i++)
1782                 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1783 }
1784
1785 static void
1786 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1787 {
1788         unsigned int i, n = min((int)ext[0x02], 6);
1789         u8 *det_base = ext + 5;
1790
1791         if (ext[0x01] != 1)
1792                 return; /* unknown version */
1793
1794         for (i = 0; i < n; i++)
1795                 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1796 }
1797
1798 static void
1799 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1800 {
1801         int i;
1802         struct edid *edid = (struct edid *)raw_edid;
1803
1804         if (edid == NULL)
1805                 return;
1806
1807         for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1808                 cb(&(edid->detailed_timings[i]), closure);
1809
1810         for (i = 1; i <= raw_edid[0x7e]; i++) {
1811                 u8 *ext = raw_edid + (i * EDID_LENGTH);
1812                 switch (*ext) {
1813                 case CEA_EXT:
1814                         cea_for_each_detailed_block(ext, cb, closure);
1815                         break;
1816                 case VTB_EXT:
1817                         vtb_for_each_detailed_block(ext, cb, closure);
1818                         break;
1819                 default:
1820                         break;
1821                 }
1822         }
1823 }
1824
1825 static void
1826 is_rb(struct detailed_timing *t, void *data)
1827 {
1828         u8 *r = (u8 *)t;
1829         if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1830                 if (r[15] & 0x10)
1831                         *(bool *)data = true;
1832 }
1833
1834 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
1835 static bool
1836 drm_monitor_supports_rb(struct edid *edid)
1837 {
1838         if (edid->revision >= 4) {
1839                 bool ret = false;
1840                 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1841                 return ret;
1842         }
1843
1844         return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1845 }
1846
1847 static void
1848 find_gtf2(struct detailed_timing *t, void *data)
1849 {
1850         u8 *r = (u8 *)t;
1851         if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1852                 *(u8 **)data = r;
1853 }
1854
1855 /* Secondary GTF curve kicks in above some break frequency */
1856 static int
1857 drm_gtf2_hbreak(struct edid *edid)
1858 {
1859         u8 *r = NULL;
1860         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1861         return r ? (r[12] * 2) : 0;
1862 }
1863
1864 static int
1865 drm_gtf2_2c(struct edid *edid)
1866 {
1867         u8 *r = NULL;
1868         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1869         return r ? r[13] : 0;
1870 }
1871
1872 static int
1873 drm_gtf2_m(struct edid *edid)
1874 {
1875         u8 *r = NULL;
1876         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1877         return r ? (r[15] << 8) + r[14] : 0;
1878 }
1879
1880 static int
1881 drm_gtf2_k(struct edid *edid)
1882 {
1883         u8 *r = NULL;
1884         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1885         return r ? r[16] : 0;
1886 }
1887
1888 static int
1889 drm_gtf2_2j(struct edid *edid)
1890 {
1891         u8 *r = NULL;
1892         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1893         return r ? r[17] : 0;
1894 }
1895
1896 /**
1897  * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1898  * @edid: EDID block to scan
1899  */
1900 static int standard_timing_level(struct edid *edid)
1901 {
1902         if (edid->revision >= 2) {
1903                 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1904                         return LEVEL_CVT;
1905                 if (drm_gtf2_hbreak(edid))
1906                         return LEVEL_GTF2;
1907                 return LEVEL_GTF;
1908         }
1909         return LEVEL_DMT;
1910 }
1911
1912 /*
1913  * 0 is reserved.  The spec says 0x01 fill for unused timings.  Some old
1914  * monitors fill with ascii space (0x20) instead.
1915  */
1916 static int
1917 bad_std_timing(u8 a, u8 b)
1918 {
1919         return (a == 0x00 && b == 0x00) ||
1920                (a == 0x01 && b == 0x01) ||
1921                (a == 0x20 && b == 0x20);
1922 }
1923
1924 /**
1925  * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1926  * @connector: connector of for the EDID block
1927  * @edid: EDID block to scan
1928  * @t: standard timing params
1929  *
1930  * Take the standard timing params (in this case width, aspect, and refresh)
1931  * and convert them into a real mode using CVT/GTF/DMT.
1932  */
1933 static struct drm_display_mode *
1934 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1935              struct std_timing *t)
1936 {
1937         struct drm_device *dev = connector->dev;
1938         struct drm_display_mode *m, *mode = NULL;
1939         int hsize, vsize;
1940         int vrefresh_rate;
1941         unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1942                 >> EDID_TIMING_ASPECT_SHIFT;
1943         unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1944                 >> EDID_TIMING_VFREQ_SHIFT;
1945         int timing_level = standard_timing_level(edid);
1946
1947         if (bad_std_timing(t->hsize, t->vfreq_aspect))
1948                 return NULL;
1949
1950         /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1951         hsize = t->hsize * 8 + 248;
1952         /* vrefresh_rate = vfreq + 60 */
1953         vrefresh_rate = vfreq + 60;
1954         /* the vdisplay is calculated based on the aspect ratio */
1955         if (aspect_ratio == 0) {
1956                 if (edid->revision < 3)
1957                         vsize = hsize;
1958                 else
1959                         vsize = (hsize * 10) / 16;
1960         } else if (aspect_ratio == 1)
1961                 vsize = (hsize * 3) / 4;
1962         else if (aspect_ratio == 2)
1963                 vsize = (hsize * 4) / 5;
1964         else
1965                 vsize = (hsize * 9) / 16;
1966
1967         /* HDTV hack, part 1 */
1968         if (vrefresh_rate == 60 &&
1969             ((hsize == 1360 && vsize == 765) ||
1970              (hsize == 1368 && vsize == 769))) {
1971                 hsize = 1366;
1972                 vsize = 768;
1973         }
1974
1975         /*
1976          * If this connector already has a mode for this size and refresh
1977          * rate (because it came from detailed or CVT info), use that
1978          * instead.  This way we don't have to guess at interlace or
1979          * reduced blanking.
1980          */
1981         list_for_each_entry(m, &connector->probed_modes, head)
1982                 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1983                     drm_mode_vrefresh(m) == vrefresh_rate)
1984                         return NULL;
1985
1986         /* HDTV hack, part 2 */
1987         if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1988                 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1989                                     false);
1990                 mode->hdisplay = 1366;
1991                 mode->hsync_start = mode->hsync_start - 1;
1992                 mode->hsync_end = mode->hsync_end - 1;
1993                 return mode;
1994         }
1995
1996         /* check whether it can be found in default mode table */
1997         if (drm_monitor_supports_rb(edid)) {
1998                 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1999                                          true);
2000                 if (mode)
2001                         return mode;
2002         }
2003         mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
2004         if (mode)
2005                 return mode;
2006
2007         /* okay, generate it */
2008         switch (timing_level) {
2009         case LEVEL_DMT:
2010                 break;
2011         case LEVEL_GTF:
2012                 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
2013                 break;
2014         case LEVEL_GTF2:
2015                 /*
2016                  * This is potentially wrong if there's ever a monitor with
2017                  * more than one ranges section, each claiming a different
2018                  * secondary GTF curve.  Please don't do that.
2019                  */
2020                 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
2021                 if (!mode)
2022                         return NULL;
2023                 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
2024                         drm_mode_destroy(dev, mode);
2025                         mode = drm_gtf_mode_complex(dev, hsize, vsize,
2026                                                     vrefresh_rate, 0, 0,
2027                                                     drm_gtf2_m(edid),
2028                                                     drm_gtf2_2c(edid),
2029                                                     drm_gtf2_k(edid),
2030                                                     drm_gtf2_2j(edid));
2031                 }
2032                 break;
2033         case LEVEL_CVT:
2034                 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
2035                                     false);
2036                 break;
2037         }
2038         return mode;
2039 }
2040
2041 /*
2042  * EDID is delightfully ambiguous about how interlaced modes are to be
2043  * encoded.  Our internal representation is of frame height, but some
2044  * HDTV detailed timings are encoded as field height.
2045  *
2046  * The format list here is from CEA, in frame size.  Technically we
2047  * should be checking refresh rate too.  Whatever.
2048  */
2049 static void
2050 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
2051                             struct detailed_pixel_timing *pt)
2052 {
2053         int i;
2054         static const struct {
2055                 int w, h;
2056         } cea_interlaced[] = {
2057                 { 1920, 1080 },
2058                 {  720,  480 },
2059                 { 1440,  480 },
2060                 { 2880,  480 },
2061                 {  720,  576 },
2062                 { 1440,  576 },
2063                 { 2880,  576 },
2064         };
2065
2066         if (!(pt->misc & DRM_EDID_PT_INTERLACED))
2067                 return;
2068
2069         for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
2070                 if ((mode->hdisplay == cea_interlaced[i].w) &&
2071                     (mode->vdisplay == cea_interlaced[i].h / 2)) {
2072                         mode->vdisplay *= 2;
2073                         mode->vsync_start *= 2;
2074                         mode->vsync_end *= 2;
2075                         mode->vtotal *= 2;
2076                         mode->vtotal |= 1;
2077                 }
2078         }
2079
2080         mode->flags |= DRM_MODE_FLAG_INTERLACE;
2081 }
2082
2083 /**
2084  * drm_mode_detailed - create a new mode from an EDID detailed timing section
2085  * @dev: DRM device (needed to create new mode)
2086  * @edid: EDID block
2087  * @timing: EDID detailed timing info
2088  * @quirks: quirks to apply
2089  *
2090  * An EDID detailed timing block contains enough info for us to create and
2091  * return a new struct drm_display_mode.
2092  */
2093 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
2094                                                   struct edid *edid,
2095                                                   struct detailed_timing *timing,
2096                                                   u32 quirks)
2097 {
2098         struct drm_display_mode *mode;
2099         struct detailed_pixel_timing *pt = &timing->data.pixel_data;
2100         unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
2101         unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
2102         unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
2103         unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
2104         unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
2105         unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
2106         unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
2107         unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
2108
2109         /* ignore tiny modes */
2110         if (hactive < 64 || vactive < 64)
2111                 return NULL;
2112
2113         if (pt->misc & DRM_EDID_PT_STEREO) {
2114                 DRM_DEBUG_KMS("stereo mode not supported\n");
2115                 return NULL;
2116         }
2117         if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
2118                 DRM_DEBUG_KMS("composite sync not supported\n");
2119         }
2120
2121         /* it is incorrect if hsync/vsync width is zero */
2122         if (!hsync_pulse_width || !vsync_pulse_width) {
2123                 DRM_DEBUG_KMS("Incorrect Detailed timing. "
2124                                 "Wrong Hsync/Vsync pulse width\n");
2125                 return NULL;
2126         }
2127
2128         if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
2129                 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
2130                 if (!mode)
2131                         return NULL;
2132
2133                 goto set_size;
2134         }
2135
2136         mode = drm_mode_create(dev);
2137         if (!mode)
2138                 return NULL;
2139
2140         if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
2141                 timing->pixel_clock = cpu_to_le16(1088);
2142
2143         mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
2144
2145         mode->hdisplay = hactive;
2146         mode->hsync_start = mode->hdisplay + hsync_offset;
2147         mode->hsync_end = mode->hsync_start + hsync_pulse_width;
2148         mode->htotal = mode->hdisplay + hblank;
2149
2150         mode->vdisplay = vactive;
2151         mode->vsync_start = mode->vdisplay + vsync_offset;
2152         mode->vsync_end = mode->vsync_start + vsync_pulse_width;
2153         mode->vtotal = mode->vdisplay + vblank;
2154
2155         /* Some EDIDs have bogus h/vtotal values */
2156         if (mode->hsync_end > mode->htotal)
2157                 mode->htotal = mode->hsync_end + 1;
2158         if (mode->vsync_end > mode->vtotal)
2159                 mode->vtotal = mode->vsync_end + 1;
2160
2161         drm_mode_do_interlace_quirk(mode, pt);
2162
2163         if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
2164                 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
2165         }
2166
2167         mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
2168                 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
2169         mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
2170                 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
2171
2172 set_size:
2173         mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
2174         mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
2175
2176         if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
2177                 mode->width_mm *= 10;
2178                 mode->height_mm *= 10;
2179         }
2180
2181         if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
2182                 mode->width_mm = edid->width_cm * 10;
2183                 mode->height_mm = edid->height_cm * 10;
2184         }
2185
2186         mode->type = DRM_MODE_TYPE_DRIVER;
2187         mode->vrefresh = drm_mode_vrefresh(mode);
2188         drm_mode_set_name(mode);
2189
2190         return mode;
2191 }
2192
2193 static bool
2194 mode_in_hsync_range(const struct drm_display_mode *mode,
2195                     struct edid *edid, u8 *t)
2196 {
2197         int hsync, hmin, hmax;
2198
2199         hmin = t[7];
2200         if (edid->revision >= 4)
2201             hmin += ((t[4] & 0x04) ? 255 : 0);
2202         hmax = t[8];
2203         if (edid->revision >= 4)
2204             hmax += ((t[4] & 0x08) ? 255 : 0);
2205         hsync = drm_mode_hsync(mode);
2206
2207         return (hsync <= hmax && hsync >= hmin);
2208 }
2209
2210 static bool
2211 mode_in_vsync_range(const struct drm_display_mode *mode,
2212                     struct edid *edid, u8 *t)
2213 {
2214         int vsync, vmin, vmax;
2215
2216         vmin = t[5];
2217         if (edid->revision >= 4)
2218             vmin += ((t[4] & 0x01) ? 255 : 0);
2219         vmax = t[6];
2220         if (edid->revision >= 4)
2221             vmax += ((t[4] & 0x02) ? 255 : 0);
2222         vsync = drm_mode_vrefresh(mode);
2223
2224         return (vsync <= vmax && vsync >= vmin);
2225 }
2226
2227 static u32
2228 range_pixel_clock(struct edid *edid, u8 *t)
2229 {
2230         /* unspecified */
2231         if (t[9] == 0 || t[9] == 255)
2232                 return 0;
2233
2234         /* 1.4 with CVT support gives us real precision, yay */
2235         if (edid->revision >= 4 && t[10] == 0x04)
2236                 return (t[9] * 10000) - ((t[12] >> 2) * 250);
2237
2238         /* 1.3 is pathetic, so fuzz up a bit */
2239         return t[9] * 10000 + 5001;
2240 }
2241
2242 static bool
2243 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
2244               struct detailed_timing *timing)
2245 {
2246         u32 max_clock;
2247         u8 *t = (u8 *)timing;
2248
2249         if (!mode_in_hsync_range(mode, edid, t))
2250                 return false;
2251
2252         if (!mode_in_vsync_range(mode, edid, t))
2253                 return false;
2254
2255         if ((max_clock = range_pixel_clock(edid, t)))
2256                 if (mode->clock > max_clock)
2257                         return false;
2258
2259         /* 1.4 max horizontal check */
2260         if (edid->revision >= 4 && t[10] == 0x04)
2261                 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
2262                         return false;
2263
2264         if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
2265                 return false;
2266
2267         return true;
2268 }
2269
2270 static bool valid_inferred_mode(const struct drm_connector *connector,
2271                                 const struct drm_display_mode *mode)
2272 {
2273         const struct drm_display_mode *m;
2274         bool ok = false;
2275
2276         list_for_each_entry(m, &connector->probed_modes, head) {
2277                 if (mode->hdisplay == m->hdisplay &&
2278                     mode->vdisplay == m->vdisplay &&
2279                     drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
2280                         return false; /* duplicated */
2281                 if (mode->hdisplay <= m->hdisplay &&
2282                     mode->vdisplay <= m->vdisplay)
2283                         ok = true;
2284         }
2285         return ok;
2286 }
2287
2288 static int
2289 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2290                         struct detailed_timing *timing)
2291 {
2292         int i, modes = 0;
2293         struct drm_display_mode *newmode;
2294         struct drm_device *dev = connector->dev;
2295
2296         for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
2297                 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
2298                     valid_inferred_mode(connector, drm_dmt_modes + i)) {
2299                         newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
2300                         if (newmode) {
2301                                 drm_mode_probed_add(connector, newmode);
2302                                 modes++;
2303                         }
2304                 }
2305         }
2306
2307         return modes;
2308 }
2309
2310 /* fix up 1366x768 mode from 1368x768;
2311  * GFT/CVT can't express 1366 width which isn't dividable by 8
2312  */
2313 static void fixup_mode_1366x768(struct drm_display_mode *mode)
2314 {
2315         if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2316                 mode->hdisplay = 1366;
2317                 mode->hsync_start--;
2318                 mode->hsync_end--;
2319                 drm_mode_set_name(mode);
2320         }
2321 }
2322
2323 static int
2324 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2325                         struct detailed_timing *timing)
2326 {
2327         int i, modes = 0;
2328         struct drm_display_mode *newmode;
2329         struct drm_device *dev = connector->dev;
2330
2331         for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2332                 const struct minimode *m = &extra_modes[i];
2333                 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2334                 if (!newmode)
2335                         return modes;
2336
2337                 fixup_mode_1366x768(newmode);
2338                 if (!mode_in_range(newmode, edid, timing) ||
2339                     !valid_inferred_mode(connector, newmode)) {
2340                         drm_mode_destroy(dev, newmode);
2341                         continue;
2342                 }
2343
2344                 drm_mode_probed_add(connector, newmode);
2345                 modes++;
2346         }
2347
2348         return modes;
2349 }
2350
2351 static int
2352 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2353                         struct detailed_timing *timing)
2354 {
2355         int i, modes = 0;
2356         struct drm_display_mode *newmode;
2357         struct drm_device *dev = connector->dev;
2358         bool rb = drm_monitor_supports_rb(edid);
2359
2360         for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2361                 const struct minimode *m = &extra_modes[i];
2362                 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2363                 if (!newmode)
2364                         return modes;
2365
2366                 fixup_mode_1366x768(newmode);
2367                 if (!mode_in_range(newmode, edid, timing) ||
2368                     !valid_inferred_mode(connector, newmode)) {
2369                         drm_mode_destroy(dev, newmode);
2370                         continue;
2371                 }
2372
2373                 drm_mode_probed_add(connector, newmode);
2374                 modes++;
2375         }
2376
2377         return modes;
2378 }
2379
2380 static void
2381 do_inferred_modes(struct detailed_timing *timing, void *c)
2382 {
2383         struct detailed_mode_closure *closure = c;
2384         struct detailed_non_pixel *data = &timing->data.other_data;
2385         struct detailed_data_monitor_range *range = &data->data.range;
2386
2387         if (data->type != EDID_DETAIL_MONITOR_RANGE)
2388                 return;
2389
2390         closure->modes += drm_dmt_modes_for_range(closure->connector,
2391                                                   closure->edid,
2392                                                   timing);
2393         
2394         if (!version_greater(closure->edid, 1, 1))
2395                 return; /* GTF not defined yet */
2396
2397         switch (range->flags) {
2398         case 0x02: /* secondary gtf, XXX could do more */
2399         case 0x00: /* default gtf */
2400                 closure->modes += drm_gtf_modes_for_range(closure->connector,
2401                                                           closure->edid,
2402                                                           timing);
2403                 break;
2404         case 0x04: /* cvt, only in 1.4+ */
2405                 if (!version_greater(closure->edid, 1, 3))
2406                         break;
2407
2408                 closure->modes += drm_cvt_modes_for_range(closure->connector,
2409                                                           closure->edid,
2410                                                           timing);
2411                 break;
2412         case 0x01: /* just the ranges, no formula */
2413         default:
2414                 break;
2415         }
2416 }
2417
2418 static int
2419 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2420 {
2421         struct detailed_mode_closure closure = {
2422                 .connector = connector,
2423                 .edid = edid,
2424         };
2425
2426         if (version_greater(edid, 1, 0))
2427                 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2428                                             &closure);
2429
2430         return closure.modes;
2431 }
2432
2433 static int
2434 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2435 {
2436         int i, j, m, modes = 0;
2437         struct drm_display_mode *mode;
2438         u8 *est = ((u8 *)timing) + 5;
2439
2440         for (i = 0; i < 6; i++) {
2441                 for (j = 7; j >= 0; j--) {
2442                         m = (i * 8) + (7 - j);
2443                         if (m >= ARRAY_SIZE(est3_modes))
2444                                 break;
2445                         if (est[i] & (1 << j)) {
2446                                 mode = drm_mode_find_dmt(connector->dev,
2447                                                          est3_modes[m].w,
2448                                                          est3_modes[m].h,
2449                                                          est3_modes[m].r,
2450                                                          est3_modes[m].rb);
2451                                 if (mode) {
2452                                         drm_mode_probed_add(connector, mode);
2453                                         modes++;
2454                                 }
2455                         }
2456                 }
2457         }
2458
2459         return modes;
2460 }
2461
2462 static void
2463 do_established_modes(struct detailed_timing *timing, void *c)
2464 {
2465         struct detailed_mode_closure *closure = c;
2466         struct detailed_non_pixel *data = &timing->data.other_data;
2467
2468         if (data->type == EDID_DETAIL_EST_TIMINGS)
2469                 closure->modes += drm_est3_modes(closure->connector, timing);
2470 }
2471
2472 /**
2473  * add_established_modes - get est. modes from EDID and add them
2474  * @connector: connector to add mode(s) to
2475  * @edid: EDID block to scan
2476  *
2477  * Each EDID block contains a bitmap of the supported "established modes" list
2478  * (defined above).  Tease them out and add them to the global modes list.
2479  */
2480 static int
2481 add_established_modes(struct drm_connector *connector, struct edid *edid)
2482 {
2483         struct drm_device *dev = connector->dev;
2484         unsigned long est_bits = edid->established_timings.t1 |
2485                 (edid->established_timings.t2 << 8) |
2486                 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2487         int i, modes = 0;
2488         struct detailed_mode_closure closure = {
2489                 .connector = connector,
2490                 .edid = edid,
2491         };
2492
2493         for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2494                 if (est_bits & (1<<i)) {
2495                         struct drm_display_mode *newmode;
2496                         newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2497                         if (newmode) {
2498                                 drm_mode_probed_add(connector, newmode);
2499                                 modes++;
2500                         }
2501                 }
2502         }
2503
2504         if (version_greater(edid, 1, 0))
2505                     drm_for_each_detailed_block((u8 *)edid,
2506                                                 do_established_modes, &closure);
2507
2508         return modes + closure.modes;
2509 }
2510
2511 static void
2512 do_standard_modes(struct detailed_timing *timing, void *c)
2513 {
2514         struct detailed_mode_closure *closure = c;
2515         struct detailed_non_pixel *data = &timing->data.other_data;
2516         struct drm_connector *connector = closure->connector;
2517         struct edid *edid = closure->edid;
2518
2519         if (data->type == EDID_DETAIL_STD_MODES) {
2520                 int i;
2521                 for (i = 0; i < 6; i++) {
2522                         struct std_timing *std;
2523                         struct drm_display_mode *newmode;
2524
2525                         std = &data->data.timings[i];
2526                         newmode = drm_mode_std(connector, edid, std);
2527                         if (newmode) {
2528                                 drm_mode_probed_add(connector, newmode);
2529                                 closure->modes++;
2530                         }
2531                 }
2532         }
2533 }
2534
2535 /**
2536  * add_standard_modes - get std. modes from EDID and add them
2537  * @connector: connector to add mode(s) to
2538  * @edid: EDID block to scan
2539  *
2540  * Standard modes can be calculated using the appropriate standard (DMT,
2541  * GTF or CVT. Grab them from @edid and add them to the list.
2542  */
2543 static int
2544 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2545 {
2546         int i, modes = 0;
2547         struct detailed_mode_closure closure = {
2548                 .connector = connector,
2549                 .edid = edid,
2550         };
2551
2552         for (i = 0; i < EDID_STD_TIMINGS; i++) {
2553                 struct drm_display_mode *newmode;
2554
2555                 newmode = drm_mode_std(connector, edid,
2556                                        &edid->standard_timings[i]);
2557                 if (newmode) {
2558                         drm_mode_probed_add(connector, newmode);
2559                         modes++;
2560                 }
2561         }
2562
2563         if (version_greater(edid, 1, 0))
2564                 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2565                                             &closure);
2566
2567         /* XXX should also look for standard codes in VTB blocks */
2568
2569         return modes + closure.modes;
2570 }
2571
2572 static int drm_cvt_modes(struct drm_connector *connector,
2573                          struct detailed_timing *timing)
2574 {
2575         int i, j, modes = 0;
2576         struct drm_display_mode *newmode;
2577         struct drm_device *dev = connector->dev;
2578         struct cvt_timing *cvt;
2579         const int rates[] = { 60, 85, 75, 60, 50 };
2580         const u8 empty[3] = { 0, 0, 0 };
2581
2582         for (i = 0; i < 4; i++) {
2583                 int uninitialized_var(width), height;
2584                 cvt = &(timing->data.other_data.data.cvt[i]);
2585
2586                 if (!memcmp(cvt->code, empty, 3))
2587                         continue;
2588
2589                 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2590                 switch (cvt->code[1] & 0x0c) {
2591                 case 0x00:
2592                         width = height * 4 / 3;
2593                         break;
2594                 case 0x04:
2595                         width = height * 16 / 9;
2596                         break;
2597                 case 0x08:
2598                         width = height * 16 / 10;
2599                         break;
2600                 case 0x0c:
2601                         width = height * 15 / 9;
2602                         break;
2603                 }
2604
2605                 for (j = 1; j < 5; j++) {
2606                         if (cvt->code[2] & (1 << j)) {
2607                                 newmode = drm_cvt_mode(dev, width, height,
2608                                                        rates[j], j == 0,
2609                                                        false, false);
2610                                 if (newmode) {
2611                                         drm_mode_probed_add(connector, newmode);
2612                                         modes++;
2613                                 }
2614                         }
2615                 }
2616         }
2617
2618         return modes;
2619 }
2620
2621 static void
2622 do_cvt_mode(struct detailed_timing *timing, void *c)
2623 {
2624         struct detailed_mode_closure *closure = c;
2625         struct detailed_non_pixel *data = &timing->data.other_data;
2626
2627         if (data->type == EDID_DETAIL_CVT_3BYTE)
2628                 closure->modes += drm_cvt_modes(closure->connector, timing);
2629 }
2630
2631 static int
2632 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2633 {       
2634         struct detailed_mode_closure closure = {
2635                 .connector = connector,
2636                 .edid = edid,
2637         };
2638
2639         if (version_greater(edid, 1, 2))
2640                 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2641
2642         /* XXX should also look for CVT codes in VTB blocks */
2643
2644         return closure.modes;
2645 }
2646
2647 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
2648
2649 static void
2650 do_detailed_mode(struct detailed_timing *timing, void *c)
2651 {
2652         struct detailed_mode_closure *closure = c;
2653         struct drm_display_mode *newmode;
2654
2655         if (timing->pixel_clock) {
2656                 newmode = drm_mode_detailed(closure->connector->dev,
2657                                             closure->edid, timing,
2658                                             closure->quirks);
2659                 if (!newmode)
2660                         return;
2661
2662                 if (closure->preferred)
2663                         newmode->type |= DRM_MODE_TYPE_PREFERRED;
2664
2665                 /*
2666                  * Detailed modes are limited to 10kHz pixel clock resolution,
2667                  * so fix up anything that looks like CEA/HDMI mode, but the clock
2668                  * is just slightly off.
2669                  */
2670                 fixup_detailed_cea_mode_clock(newmode);
2671
2672                 drm_mode_probed_add(closure->connector, newmode);
2673                 closure->modes++;
2674                 closure->preferred = 0;
2675         }
2676 }
2677
2678 /*
2679  * add_detailed_modes - Add modes from detailed timings
2680  * @connector: attached connector
2681  * @edid: EDID block to scan
2682  * @quirks: quirks to apply
2683  */
2684 static int
2685 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2686                    u32 quirks)
2687 {
2688         struct detailed_mode_closure closure = {
2689                 .connector = connector,
2690                 .edid = edid,
2691                 .preferred = 1,
2692                 .quirks = quirks,
2693         };
2694
2695         if (closure.preferred && !version_greater(edid, 1, 3))
2696                 closure.preferred =
2697                     (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2698
2699         drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2700
2701         return closure.modes;
2702 }
2703
2704 #define AUDIO_BLOCK     0x01
2705 #define VIDEO_BLOCK     0x02
2706 #define VENDOR_BLOCK    0x03
2707 #define SPEAKER_BLOCK   0x04
2708 #define VIDEO_CAPABILITY_BLOCK  0x07
2709 #define VIDEO_DATA_BLOCK_420    0x0E
2710 #define VIDEO_CAP_BLOCK_420     0x0F
2711 #define EDID_BASIC_AUDIO        (1 << 6)
2712 #define EDID_CEA_YCRCB444       (1 << 5)
2713 #define EDID_CEA_YCRCB422       (1 << 4)
2714 #define EDID_CEA_VCDB_QS        (1 << 6)
2715
2716 /*
2717  * Search EDID for CEA extension block.
2718  */
2719 static u8 *drm_find_edid_extension(struct edid *edid, int ext_id)
2720 {
2721         u8 *edid_ext = NULL;
2722         int i;
2723
2724         /* No EDID or EDID extensions */
2725         if (edid == NULL || edid->extensions == 0)
2726                 return NULL;
2727
2728         /* Find CEA extension */
2729         for (i = 0; i < edid->extensions; i++) {
2730                 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2731                 if (edid_ext[0] == ext_id)
2732                         break;
2733         }
2734
2735         if (i == edid->extensions)
2736                 return NULL;
2737
2738         return edid_ext;
2739 }
2740
2741 static u8 *drm_find_cea_extension(struct edid *edid)
2742 {
2743         return drm_find_edid_extension(edid, CEA_EXT);
2744 }
2745
2746 static u8 *drm_find_displayid_extension(struct edid *edid)
2747 {
2748         return drm_find_edid_extension(edid, DISPLAYID_EXT);
2749 }
2750
2751 /*
2752  * Calculate the alternate clock for the CEA mode
2753  * (60Hz vs. 59.94Hz etc.)
2754  */
2755 static unsigned int
2756 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2757 {
2758         unsigned int clock = cea_mode->clock;
2759
2760         if (cea_mode->vrefresh % 6 != 0)
2761                 return clock;
2762
2763         /*
2764          * edid_cea_modes contains the 59.94Hz
2765          * variant for 240 and 480 line modes,
2766          * and the 60Hz variant otherwise.
2767          */
2768         if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2769                 clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
2770         else
2771                 clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
2772
2773         return clock;
2774 }
2775
2776 static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_match,
2777                                              unsigned int clock_tolerance)
2778 {
2779         u8 vic;
2780
2781         if (!to_match->clock)
2782                 return 0;
2783
2784         for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
2785                 const struct drm_display_mode *cea_mode = &edid_cea_modes[vic];
2786                 unsigned int clock1, clock2;
2787
2788                 /* Check both 60Hz and 59.94Hz */
2789                 clock1 = cea_mode->clock;
2790                 clock2 = cea_mode_alternate_clock(cea_mode);
2791
2792                 if (abs(to_match->clock - clock1) > clock_tolerance &&
2793                     abs(to_match->clock - clock2) > clock_tolerance)
2794                         continue;
2795
2796                 if (drm_mode_equal_no_clocks(to_match, cea_mode))
2797                         return vic;
2798         }
2799
2800         return 0;
2801 }
2802
2803 /**
2804  * drm_match_cea_mode - look for a CEA mode matching given mode
2805  * @to_match: display mode
2806  *
2807  * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2808  * mode.
2809  */
2810 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2811 {
2812         u8 vic;
2813
2814         if (!to_match->clock)
2815                 return 0;
2816
2817         for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
2818                 const struct drm_display_mode *cea_mode = &edid_cea_modes[vic];
2819                 unsigned int clock1, clock2;
2820
2821                 /* Check both 60Hz and 59.94Hz */
2822                 clock1 = cea_mode->clock;
2823                 clock2 = cea_mode_alternate_clock(cea_mode);
2824
2825                 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2826                      KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2827                     drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
2828                         return vic;
2829         }
2830         return 0;
2831 }
2832 EXPORT_SYMBOL(drm_match_cea_mode);
2833
2834 static bool drm_valid_cea_vic(u8 vic)
2835 {
2836         return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes);
2837 }
2838
2839 /**
2840  * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2841  * the input VIC from the CEA mode list
2842  * @video_code: ID given to each of the CEA modes
2843  *
2844  * Returns picture aspect ratio
2845  */
2846 enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
2847 {
2848         return edid_cea_modes[video_code].picture_aspect_ratio;
2849 }
2850 EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
2851
2852 /*
2853  * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2854  * specific block).
2855  *
2856  * It's almost like cea_mode_alternate_clock(), we just need to add an
2857  * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2858  * one.
2859  */
2860 static unsigned int
2861 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
2862 {
2863         if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
2864                 return hdmi_mode->clock;
2865
2866         return cea_mode_alternate_clock(hdmi_mode);
2867 }
2868
2869 static u8 drm_match_hdmi_mode_clock_tolerance(const struct drm_display_mode *to_match,
2870                                               unsigned int clock_tolerance)
2871 {
2872         u8 vic;
2873
2874         if (!to_match->clock)
2875                 return 0;
2876
2877         for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
2878                 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
2879                 unsigned int clock1, clock2;
2880
2881                 /* Make sure to also match alternate clocks */
2882                 clock1 = hdmi_mode->clock;
2883                 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2884
2885                 if (abs(to_match->clock - clock1) > clock_tolerance &&
2886                     abs(to_match->clock - clock2) > clock_tolerance)
2887                         continue;
2888
2889                 if (drm_mode_equal_no_clocks(to_match, hdmi_mode))
2890                         return vic;
2891         }
2892
2893         return 0;
2894 }
2895
2896 /*
2897  * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2898  * @to_match: display mode
2899  *
2900  * An HDMI mode is one defined in the HDMI vendor specific block.
2901  *
2902  * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2903  */
2904 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
2905 {
2906         u8 vic;
2907
2908         if (!to_match->clock)
2909                 return 0;
2910
2911         for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
2912                 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
2913                 unsigned int clock1, clock2;
2914
2915                 /* Make sure to also match alternate clocks */
2916                 clock1 = hdmi_mode->clock;
2917                 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2918
2919                 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2920                      KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2921                     drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
2922                         return vic;
2923         }
2924         return 0;
2925 }
2926
2927 static bool drm_valid_hdmi_vic(u8 vic)
2928 {
2929         return vic > 0 && vic < ARRAY_SIZE(edid_4k_modes);
2930 }
2931
2932 static int
2933 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
2934 {
2935         struct drm_device *dev = connector->dev;
2936         struct drm_display_mode *mode, *tmp;
2937         LIST_HEAD(list);
2938         int modes = 0;
2939
2940         /* Don't add CEA modes if the CEA extension block is missing */
2941         if (!drm_find_cea_extension(edid))
2942                 return 0;
2943
2944         /*
2945          * Go through all probed modes and create a new mode
2946          * with the alternate clock for certain CEA modes.
2947          */
2948         list_for_each_entry(mode, &connector->probed_modes, head) {
2949                 const struct drm_display_mode *cea_mode = NULL;
2950                 struct drm_display_mode *newmode;
2951                 u8 vic = drm_match_cea_mode(mode);
2952                 unsigned int clock1, clock2;
2953
2954                 if (drm_valid_cea_vic(vic)) {
2955                         cea_mode = &edid_cea_modes[vic];
2956                         clock2 = cea_mode_alternate_clock(cea_mode);
2957                 } else {
2958                         vic = drm_match_hdmi_mode(mode);
2959                         if (drm_valid_hdmi_vic(vic)) {
2960                                 cea_mode = &edid_4k_modes[vic];
2961                                 clock2 = hdmi_mode_alternate_clock(cea_mode);
2962                         }
2963                 }
2964
2965                 if (!cea_mode)
2966                         continue;
2967
2968                 clock1 = cea_mode->clock;
2969
2970                 if (clock1 == clock2)
2971                         continue;
2972
2973                 if (mode->clock != clock1 && mode->clock != clock2)
2974                         continue;
2975
2976                 newmode = drm_mode_duplicate(dev, cea_mode);
2977                 if (!newmode)
2978                         continue;
2979
2980                 /* Carry over the stereo flags */
2981                 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
2982
2983                 /*
2984                  * The current mode could be either variant. Make
2985                  * sure to pick the "other" clock for the new mode.
2986                  */
2987                 if (mode->clock != clock1)
2988                         newmode->clock = clock1;
2989                 else
2990                         newmode->clock = clock2;
2991
2992                 list_add_tail(&newmode->head, &list);
2993         }
2994
2995         list_for_each_entry_safe(mode, tmp, &list, head) {
2996                 list_del(&mode->head);
2997                 drm_mode_probed_add(connector, mode);
2998                 modes++;
2999         }
3000
3001         return modes;
3002 }
3003
3004 static struct drm_display_mode *
3005 drm_display_mode_from_vic_index(struct drm_connector *connector,