drivers/gpu/arm/midgard/mali_kbase_gator_hwcnt_names.h

   1 /*
   2  *
   3  * (C) COPYRIGHT 2014-2016 ARM Limited. All rights reserved.
   4  *
   5  * This program is free software and is provided to you under the terms of the
   6  * GNU General Public License version 2 as published by the Free Software
   7  * Foundation, and any use by you of this program is subject to the terms
   8  * of such GNU licence.
   9  *
  10  * A copy of the licence is included with the program, and can also be obtained
  11  * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
  12  * Boston, MA  02110-1301, USA.
  13  *
  14  */
  15
  16
  17
  18 #ifndef _KBASE_GATOR_HWCNT_NAMES_H_
  19 #define _KBASE_GATOR_HWCNT_NAMES_H_
  20
  21 /*
  22  * "Short names" for hardware counters used by Streamline. Counters names are
  23  * stored in accordance with their memory layout in the binary counter block
  24  * emitted by the Mali GPU. Each "master" in the GPU emits a fixed-size block
  25  * of 64 counters, and each GPU implements the same set of "masters" although
  26  * the counters each master exposes within its block of 64 may vary.
  27  *
  28  * Counters which are an empty string are simply "holes" in the counter memory
  29  * where no counter exists.
  30  */
  31
  32 static const char * const hardware_counters_mali_t60x[] = {
  33         /* Job Manager */
  34         "",
  35         "",
  36         "",
  37         "",
  38         "T60x_MESSAGES_SENT",
  39         "T60x_MESSAGES_RECEIVED",
  40         "T60x_GPU_ACTIVE",
  41         "T60x_IRQ_ACTIVE",
  42         "T60x_JS0_JOBS",
  43         "T60x_JS0_TASKS",
  44         "T60x_JS0_ACTIVE",
  45         "",
  46         "T60x_JS0_WAIT_READ",
  47         "T60x_JS0_WAIT_ISSUE",
  48         "T60x_JS0_WAIT_DEPEND",
  49         "T60x_JS0_WAIT_FINISH",
  50         "T60x_JS1_JOBS",
  51         "T60x_JS1_TASKS",
  52         "T60x_JS1_ACTIVE",
  53         "",
  54         "T60x_JS1_WAIT_READ",
  55         "T60x_JS1_WAIT_ISSUE",
  56         "T60x_JS1_WAIT_DEPEND",
  57         "T60x_JS1_WAIT_FINISH",
  58         "T60x_JS2_JOBS",
  59         "T60x_JS2_TASKS",
  60         "T60x_JS2_ACTIVE",
  61         "",
  62         "T60x_JS2_WAIT_READ",
  63         "T60x_JS2_WAIT_ISSUE",
  64         "T60x_JS2_WAIT_DEPEND",
  65         "T60x_JS2_WAIT_FINISH",
  66         "",
  67         "",
  68         "",
  69         "",
  70         "",
  71         "",
  72         "",
  73         "",
  74         "",
  75         "",
  76         "",
  77         "",
  78         "",
  79         "",
  80         "",
  81         "",
  82         "",
  83         "",
  84         "",
  85         "",
  86         "",
  87         "",
  88         "",
  89         "",
  90         "",
  91         "",
  92         "",
  93         "",
  94         "",
  95         "",
  96         "",
  97         "",
  98
  99         /*Tiler */
 100         "",
 101         "",
 102         "",
 103         "T60x_TI_JOBS_PROCESSED",
 104         "T60x_TI_TRIANGLES",
 105         "T60x_TI_QUADS",
 106         "T60x_TI_POLYGONS",
 107         "T60x_TI_POINTS",
 108         "T60x_TI_LINES",
 109         "T60x_TI_VCACHE_HIT",
 110         "T60x_TI_VCACHE_MISS",
 111         "T60x_TI_FRONT_FACING",
 112         "T60x_TI_BACK_FACING",
 113         "T60x_TI_PRIM_VISIBLE",
 114         "T60x_TI_PRIM_CULLED",
 115         "T60x_TI_PRIM_CLIPPED",
 116         "T60x_TI_LEVEL0",
 117         "T60x_TI_LEVEL1",
 118         "T60x_TI_LEVEL2",
 119         "T60x_TI_LEVEL3",
 120         "T60x_TI_LEVEL4",
 121         "T60x_TI_LEVEL5",
 122         "T60x_TI_LEVEL6",
 123         "T60x_TI_LEVEL7",
 124         "T60x_TI_COMMAND_1",
 125         "T60x_TI_COMMAND_2",
 126         "T60x_TI_COMMAND_3",
 127         "T60x_TI_COMMAND_4",
 128         "T60x_TI_COMMAND_4_7",
 129         "T60x_TI_COMMAND_8_15",
 130         "T60x_TI_COMMAND_16_63",
 131         "T60x_TI_COMMAND_64",
 132         "T60x_TI_COMPRESS_IN",
 133         "T60x_TI_COMPRESS_OUT",
 134         "T60x_TI_COMPRESS_FLUSH",
 135         "T60x_TI_TIMESTAMPS",
 136         "T60x_TI_PCACHE_HIT",
 137         "T60x_TI_PCACHE_MISS",
 138         "T60x_TI_PCACHE_LINE",
 139         "T60x_TI_PCACHE_STALL",
 140         "T60x_TI_WRBUF_HIT",
 141         "T60x_TI_WRBUF_MISS",
 142         "T60x_TI_WRBUF_LINE",
 143         "T60x_TI_WRBUF_PARTIAL",
 144         "T60x_TI_WRBUF_STALL",
 145         "T60x_TI_ACTIVE",
 146         "T60x_TI_LOADING_DESC",
 147         "T60x_TI_INDEX_WAIT",
 148         "T60x_TI_INDEX_RANGE_WAIT",
 149         "T60x_TI_VERTEX_WAIT",
 150         "T60x_TI_PCACHE_WAIT",
 151         "T60x_TI_WRBUF_WAIT",
 152         "T60x_TI_BUS_READ",
 153         "T60x_TI_BUS_WRITE",
 154         "",
 155         "",
 156         "",
 157         "",
 158         "",
 159         "T60x_TI_UTLB_STALL",
 160         "T60x_TI_UTLB_REPLAY_MISS",
 161         "T60x_TI_UTLB_REPLAY_FULL",
 162         "T60x_TI_UTLB_NEW_MISS",
 163         "T60x_TI_UTLB_HIT",
 164
 165         /* Shader Core */
 166         "",
 167         "",
 168         "",
 169         "",
 170         "T60x_FRAG_ACTIVE",
 171         "T60x_FRAG_PRIMITIVES",
 172         "T60x_FRAG_PRIMITIVES_DROPPED",
 173         "T60x_FRAG_CYCLES_DESC",
 174         "T60x_FRAG_CYCLES_PLR",
 175         "T60x_FRAG_CYCLES_VERT",
 176         "T60x_FRAG_CYCLES_TRISETUP",
 177         "T60x_FRAG_CYCLES_RAST",
 178         "T60x_FRAG_THREADS",
 179         "T60x_FRAG_DUMMY_THREADS",
 180         "T60x_FRAG_QUADS_RAST",
 181         "T60x_FRAG_QUADS_EZS_TEST",
 182         "T60x_FRAG_QUADS_EZS_KILLED",
 183         "T60x_FRAG_THREADS_LZS_TEST",
 184         "T60x_FRAG_THREADS_LZS_KILLED",
 185         "T60x_FRAG_CYCLES_NO_TILE",
 186         "T60x_FRAG_NUM_TILES",
 187         "T60x_FRAG_TRANS_ELIM",
 188         "T60x_COMPUTE_ACTIVE",
 189         "T60x_COMPUTE_TASKS",
 190         "T60x_COMPUTE_THREADS",
 191         "T60x_COMPUTE_CYCLES_DESC",
 192         "T60x_TRIPIPE_ACTIVE",
 193         "T60x_ARITH_WORDS",
 194         "T60x_ARITH_CYCLES_REG",
 195         "T60x_ARITH_CYCLES_L0",
 196         "T60x_ARITH_FRAG_DEPEND",
 197         "T60x_LS_WORDS",
 198         "T60x_LS_ISSUES",
 199         "T60x_LS_RESTARTS",
 200         "T60x_LS_REISSUES_MISS",
 201         "T60x_LS_REISSUES_VD",
 202         "T60x_LS_REISSUE_ATTRIB_MISS",
 203         "T60x_LS_NO_WB",
 204         "T60x_TEX_WORDS",
 205         "T60x_TEX_BUBBLES",
 206         "T60x_TEX_WORDS_L0",
 207         "T60x_TEX_WORDS_DESC",
 208         "T60x_TEX_ISSUES",
 209         "T60x_TEX_RECIRC_FMISS",
 210         "T60x_TEX_RECIRC_DESC",
 211         "T60x_TEX_RECIRC_MULTI",
 212         "T60x_TEX_RECIRC_PMISS",
 213         "T60x_TEX_RECIRC_CONF",
 214         "T60x_LSC_READ_HITS",
 215         "T60x_LSC_READ_MISSES",
 216         "T60x_LSC_WRITE_HITS",
 217         "T60x_LSC_WRITE_MISSES",
 218         "T60x_LSC_ATOMIC_HITS",
 219         "T60x_LSC_ATOMIC_MISSES",
 220         "T60x_LSC_LINE_FETCHES",
 221         "T60x_LSC_DIRTY_LINE",
 222         "T60x_LSC_SNOOPS",
 223         "T60x_AXI_TLB_STALL",
 224         "T60x_AXI_TLB_MISS",
 225         "T60x_AXI_TLB_TRANSACTION",
 226         "T60x_LS_TLB_MISS",
 227         "T60x_LS_TLB_HIT",
 228         "T60x_AXI_BEATS_READ",
 229         "T60x_AXI_BEATS_WRITTEN",
 230
 231         /*L2 and MMU */
 232         "",
 233         "",
 234         "",
 235         "",
 236         "T60x_MMU_HIT",
 237         "T60x_MMU_NEW_MISS",
 238         "T60x_MMU_REPLAY_FULL",
 239         "T60x_MMU_REPLAY_MISS",
 240         "T60x_MMU_TABLE_WALK",
 241         "",
 242         "",
 243         "",
 244         "",
 245         "",
 246         "",
 247         "",
 248         "T60x_UTLB_HIT",
 249         "T60x_UTLB_NEW_MISS",
 250         "T60x_UTLB_REPLAY_FULL",
 251         "T60x_UTLB_REPLAY_MISS",
 252         "T60x_UTLB_STALL",
 253         "",
 254         "",
 255         "",
 256         "",
 257         "",
 258         "",
 259         "",
 260         "",
 261         "",
 262         "T60x_L2_EXT_WRITE_BEATS",
 263         "T60x_L2_EXT_READ_BEATS",
 264         "T60x_L2_ANY_LOOKUP",
 265         "T60x_L2_READ_LOOKUP",
 266         "T60x_L2_SREAD_LOOKUP",
 267         "T60x_L2_READ_REPLAY",
 268         "T60x_L2_READ_SNOOP",
 269         "T60x_L2_READ_HIT",
 270         "T60x_L2_CLEAN_MISS",
 271         "T60x_L2_WRITE_LOOKUP",
 272         "T60x_L2_SWRITE_LOOKUP",
 273         "T60x_L2_WRITE_REPLAY",
 274         "T60x_L2_WRITE_SNOOP",
 275         "T60x_L2_WRITE_HIT",
 276         "T60x_L2_EXT_READ_FULL",
 277         "T60x_L2_EXT_READ_HALF",
 278         "T60x_L2_EXT_WRITE_FULL",
 279         "T60x_L2_EXT_WRITE_HALF",
 280         "T60x_L2_EXT_READ",
 281         "T60x_L2_EXT_READ_LINE",
 282         "T60x_L2_EXT_WRITE",
 283         "T60x_L2_EXT_WRITE_LINE",
 284         "T60x_L2_EXT_WRITE_SMALL",
 285         "T60x_L2_EXT_BARRIER",
 286         "T60x_L2_EXT_AR_STALL",
 287         "T60x_L2_EXT_R_BUF_FULL",
 288         "T60x_L2_EXT_RD_BUF_FULL",
 289         "T60x_L2_EXT_R_RAW",
 290         "T60x_L2_EXT_W_STALL",
 291         "T60x_L2_EXT_W_BUF_FULL",
 292         "T60x_L2_EXT_R_W_HAZARD",
 293         "T60x_L2_TAG_HAZARD",
 294         "T60x_L2_SNOOP_FULL",
 295         "T60x_L2_REPLAY_FULL"
 296 };
 297 static const char * const hardware_counters_mali_t62x[] = {
 298         /* Job Manager */
 299         "",
 300         "",
 301         "",
 302         "",
 303         "T62x_MESSAGES_SENT",
 304         "T62x_MESSAGES_RECEIVED",
 305         "T62x_GPU_ACTIVE",
 306         "T62x_IRQ_ACTIVE",
 307         "T62x_JS0_JOBS",
 308         "T62x_JS0_TASKS",
 309         "T62x_JS0_ACTIVE",
 310         "",
 311         "T62x_JS0_WAIT_READ",
 312         "T62x_JS0_WAIT_ISSUE",
 313         "T62x_JS0_WAIT_DEPEND",
 314         "T62x_JS0_WAIT_FINISH",
 315         "T62x_JS1_JOBS",
 316         "T62x_JS1_TASKS",
 317         "T62x_JS1_ACTIVE",
 318         "",
 319         "T62x_JS1_WAIT_READ",
 320         "T62x_JS1_WAIT_ISSUE",
 321         "T62x_JS1_WAIT_DEPEND",
 322         "T62x_JS1_WAIT_FINISH",
 323         "T62x_JS2_JOBS",
 324         "T62x_JS2_TASKS",
 325         "T62x_JS2_ACTIVE",
 326         "",
 327         "T62x_JS2_WAIT_READ",
 328         "T62x_JS2_WAIT_ISSUE",
 329         "T62x_JS2_WAIT_DEPEND",
 330         "T62x_JS2_WAIT_FINISH",
 331         "",
 332         "",
 333         "",
 334         "",
 335         "",
 336         "",
 337         "",
 338         "",
 339         "",
 340         "",
 341         "",
 342         "",
 343         "",
 344         "",
 345         "",
 346         "",
 347         "",
 348         "",
 349         "",
 350         "",
 351         "",
 352         "",
 353         "",
 354         "",
 355         "",
 356         "",
 357         "",
 358         "",
 359         "",
 360         "",
 361         "",
 362         "",
 363
 364         /*Tiler */
 365         "",
 366         "",
 367         "",
 368         "T62x_TI_JOBS_PROCESSED",
 369         "T62x_TI_TRIANGLES",
 370         "T62x_TI_QUADS",
 371         "T62x_TI_POLYGONS",
 372         "T62x_TI_POINTS",
 373         "T62x_TI_LINES",
 374         "T62x_TI_VCACHE_HIT",
 375         "T62x_TI_VCACHE_MISS",
 376         "T62x_TI_FRONT_FACING",
 377         "T62x_TI_BACK_FACING",
 378         "T62x_TI_PRIM_VISIBLE",
 379         "T62x_TI_PRIM_CULLED",
 380         "T62x_TI_PRIM_CLIPPED",
 381         "T62x_TI_LEVEL0",
 382         "T62x_TI_LEVEL1",
 383         "T62x_TI_LEVEL2",
 384         "T62x_TI_LEVEL3",
 385         "T62x_TI_LEVEL4",
 386         "T62x_TI_LEVEL5",
 387         "T62x_TI_LEVEL6",
 388         "T62x_TI_LEVEL7",
 389         "T62x_TI_COMMAND_1",
 390         "T62x_TI_COMMAND_2",
 391         "T62x_TI_COMMAND_3",
 392         "T62x_TI_COMMAND_4",
 393         "T62x_TI_COMMAND_5_7",
 394         "T62x_TI_COMMAND_8_15",
 395         "T62x_TI_COMMAND_16_63",
 396         "T62x_TI_COMMAND_64",
 397         "T62x_TI_COMPRESS_IN",
 398         "T62x_TI_COMPRESS_OUT",
 399         "T62x_TI_COMPRESS_FLUSH",
 400         "T62x_TI_TIMESTAMPS",
 401         "T62x_TI_PCACHE_HIT",
 402         "T62x_TI_PCACHE_MISS",
 403         "T62x_TI_PCACHE_LINE",
 404         "T62x_TI_PCACHE_STALL",
 405         "T62x_TI_WRBUF_HIT",
 406         "T62x_TI_WRBUF_MISS",
 407         "T62x_TI_WRBUF_LINE",
 408         "T62x_TI_WRBUF_PARTIAL",
 409         "T62x_TI_WRBUF_STALL",
 410         "T62x_TI_ACTIVE",
 411         "T62x_TI_LOADING_DESC",
 412         "T62x_TI_INDEX_WAIT",
 413         "T62x_TI_INDEX_RANGE_WAIT",
 414         "T62x_TI_VERTEX_WAIT",
 415         "T62x_TI_PCACHE_WAIT",
 416         "T62x_TI_WRBUF_WAIT",
 417         "T62x_TI_BUS_READ",
 418         "T62x_TI_BUS_WRITE",
 419         "",
 420         "",
 421         "",
 422         "",
 423         "",
 424         "T62x_TI_UTLB_STALL",
 425         "T62x_TI_UTLB_REPLAY_MISS",
 426         "T62x_TI_UTLB_REPLAY_FULL",
 427         "T62x_TI_UTLB_NEW_MISS",
 428         "T62x_TI_UTLB_HIT",
 429
 430         /* Shader Core */
 431         "",
 432         "",
 433         "",
 434         "T62x_SHADER_CORE_ACTIVE",
 435         "T62x_FRAG_ACTIVE",
 436         "T62x_FRAG_PRIMITIVES",
 437         "T62x_FRAG_PRIMITIVES_DROPPED",
 438         "T62x_FRAG_CYCLES_DESC",
 439         "T62x_FRAG_CYCLES_FPKQ_ACTIVE",
 440         "T62x_FRAG_CYCLES_VERT",
 441         "T62x_FRAG_CYCLES_TRISETUP",
 442         "T62x_FRAG_CYCLES_EZS_ACTIVE",
 443         "T62x_FRAG_THREADS",
 444         "T62x_FRAG_DUMMY_THREADS",
 445         "T62x_FRAG_QUADS_RAST",
 446         "T62x_FRAG_QUADS_EZS_TEST",
 447         "T62x_FRAG_QUADS_EZS_KILLED",
 448         "T62x_FRAG_THREADS_LZS_TEST",
 449         "T62x_FRAG_THREADS_LZS_KILLED",
 450         "T62x_FRAG_CYCLES_NO_TILE",
 451         "T62x_FRAG_NUM_TILES",
 452         "T62x_FRAG_TRANS_ELIM",
 453         "T62x_COMPUTE_ACTIVE",
 454         "T62x_COMPUTE_TASKS",
 455         "T62x_COMPUTE_THREADS",
 456         "T62x_COMPUTE_CYCLES_DESC",
 457         "T62x_TRIPIPE_ACTIVE",
 458         "T62x_ARITH_WORDS",
 459         "T62x_ARITH_CYCLES_REG",
 460         "T62x_ARITH_CYCLES_L0",
 461         "T62x_ARITH_FRAG_DEPEND",
 462         "T62x_LS_WORDS",
 463         "T62x_LS_ISSUES",
 464         "T62x_LS_RESTARTS",
 465         "T62x_LS_REISSUES_MISS",
 466         "T62x_LS_REISSUES_VD",
 467         "T62x_LS_REISSUE_ATTRIB_MISS",
 468         "T62x_LS_NO_WB",
 469         "T62x_TEX_WORDS",
 470         "T62x_TEX_BUBBLES",
 471         "T62x_TEX_WORDS_L0",
 472         "T62x_TEX_WORDS_DESC",
 473         "T62x_TEX_ISSUES",
 474         "T62x_TEX_RECIRC_FMISS",
 475         "T62x_TEX_RECIRC_DESC",
 476         "T62x_TEX_RECIRC_MULTI",
 477         "T62x_TEX_RECIRC_PMISS",
 478         "T62x_TEX_RECIRC_CONF",
 479         "T62x_LSC_READ_HITS",
 480         "T62x_LSC_READ_MISSES",
 481         "T62x_LSC_WRITE_HITS",
 482         "T62x_LSC_WRITE_MISSES",
 483         "T62x_LSC_ATOMIC_HITS",
 484         "T62x_LSC_ATOMIC_MISSES",
 485         "T62x_LSC_LINE_FETCHES",
 486         "T62x_LSC_DIRTY_LINE",
 487         "T62x_LSC_SNOOPS",
 488         "T62x_AXI_TLB_STALL",
 489         "T62x_AXI_TLB_MISS",
 490         "T62x_AXI_TLB_TRANSACTION",
 491         "T62x_LS_TLB_MISS",
 492         "T62x_LS_TLB_HIT",
 493         "T62x_AXI_BEATS_READ",
 494         "T62x_AXI_BEATS_WRITTEN",
 495
 496         /*L2 and MMU */
 497         "",
 498         "",
 499         "",
 500         "",
 501         "T62x_MMU_HIT",
 502         "T62x_MMU_NEW_MISS",
 503         "T62x_MMU_REPLAY_FULL",
 504         "T62x_MMU_REPLAY_MISS",
 505         "T62x_MMU_TABLE_WALK",
 506         "",
 507         "",
 508         "",
 509         "",
 510         "",
 511         "",
 512         "",
 513         "T62x_UTLB_HIT",
 514         "T62x_UTLB_NEW_MISS",
 515         "T62x_UTLB_REPLAY_FULL",
 516         "T62x_UTLB_REPLAY_MISS",
 517         "T62x_UTLB_STALL",
 518         "",
 519         "",
 520         "",
 521         "",
 522         "",
 523         "",
 524         "",
 525         "",
 526         "",
 527         "T62x_L2_EXT_WRITE_BEATS",
 528         "T62x_L2_EXT_READ_BEATS",
 529         "T62x_L2_ANY_LOOKUP",
 530         "T62x_L2_READ_LOOKUP",
 531         "T62x_L2_SREAD_LOOKUP",
 532         "T62x_L2_READ_REPLAY",
 533         "T62x_L2_READ_SNOOP",
 534         "T62x_L2_READ_HIT",
 535         "T62x_L2_CLEAN_MISS",
 536         "T62x_L2_WRITE_LOOKUP",
 537         "T62x_L2_SWRITE_LOOKUP",
 538         "T62x_L2_WRITE_REPLAY",
 539         "T62x_L2_WRITE_SNOOP",
 540         "T62x_L2_WRITE_HIT",
 541         "T62x_L2_EXT_READ_FULL",
 542         "T62x_L2_EXT_READ_HALF",
 543         "T62x_L2_EXT_WRITE_FULL",
 544         "T62x_L2_EXT_WRITE_HALF",
 545         "T62x_L2_EXT_READ",
 546         "T62x_L2_EXT_READ_LINE",
 547         "T62x_L2_EXT_WRITE",
 548         "T62x_L2_EXT_WRITE_LINE",
 549         "T62x_L2_EXT_WRITE_SMALL",
 550         "T62x_L2_EXT_BARRIER",
 551         "T62x_L2_EXT_AR_STALL",
 552         "T62x_L2_EXT_R_BUF_FULL",
 553         "T62x_L2_EXT_RD_BUF_FULL",
 554         "T62x_L2_EXT_R_RAW",
 555         "T62x_L2_EXT_W_STALL",
 556         "T62x_L2_EXT_W_BUF_FULL",
 557         "T62x_L2_EXT_R_W_HAZARD",
 558         "T62x_L2_TAG_HAZARD",
 559         "T62x_L2_SNOOP_FULL",
 560         "T62x_L2_REPLAY_FULL"
 561 };
 562
 563 static const char * const hardware_counters_mali_t72x[] = {
 564         /* Job Manager */
 565         "",
 566         "",
 567         "",
 568         "",
 569         "T72x_GPU_ACTIVE",
 570         "T72x_IRQ_ACTIVE",
 571         "T72x_JS0_JOBS",
 572         "T72x_JS0_TASKS",
 573         "T72x_JS0_ACTIVE",
 574         "T72x_JS1_JOBS",
 575         "T72x_JS1_TASKS",
 576         "T72x_JS1_ACTIVE",
 577         "T72x_JS2_JOBS",
 578         "T72x_JS2_TASKS",
 579         "T72x_JS2_ACTIVE",
 580         "",
 581         "",
 582         "",
 583         "",
 584         "",
 585         "",
 586         "",
 587         "",
 588         "",
 589         "",
 590         "",
 591         "",
 592         "",
 593         "",
 594         "",
 595         "",
 596         "",
 597         "",
 598         "",
 599         "",
 600         "",
 601         "",
 602         "",
 603         "",
 604         "",
 605         "",
 606         "",
 607         "",
 608         "",
 609         "",
 610         "",
 611         "",
 612         "",
 613         "",
 614         "",
 615         "",
 616         "",
 617         "",
 618         "",
 619         "",
 620         "",
 621         "",
 622         "",
 623         "",
 624         "",
 625         "",
 626         "",
 627         "",
 628         "",
 629
 630         /*Tiler */
 631         "",
 632         "",
 633         "",
 634         "T72x_TI_JOBS_PROCESSED",
 635         "T72x_TI_TRIANGLES",
 636         "T72x_TI_QUADS",
 637         "T72x_TI_POLYGONS",
 638         "T72x_TI_POINTS",
 639         "T72x_TI_LINES",
 640         "T72x_TI_FRONT_FACING",
 641         "T72x_TI_BACK_FACING",
 642         "T72x_TI_PRIM_VISIBLE",
 643         "T72x_TI_PRIM_CULLED",
 644         "T72x_TI_PRIM_CLIPPED",
 645         "",
 646         "",
 647         "",
 648         "",
 649         "",
 650         "",
 651         "",
 652         "",
 653         "T72x_TI_ACTIVE",
 654         "",
 655         "",
 656         "",
 657         "",
 658         "",
 659         "",
 660         "",
 661         "",
 662         "",
 663         "",
 664         "",
 665         "",
 666         "",
 667         "",
 668         "",
 669         "",
 670         "",
 671         "",
 672         "",
 673         "",
 674         "",
 675         "",
 676         "",
 677         "",
 678         "",
 679         "",
 680         "",
 681         "",
 682         "",
 683         "",
 684         "",
 685         "",
 686         "",
 687         "",
 688         "",
 689         "",
 690         "",
 691         "",
 692         "",
 693         "",
 694         "",
 695
 696         /* Shader Core */
 697         "",
 698         "",
 699         "",
 700         "",
 701         "T72x_FRAG_ACTIVE",
 702         "T72x_FRAG_PRIMITIVES",
 703         "T72x_FRAG_PRIMITIVES_DROPPED",
 704         "T72x_FRAG_THREADS",
 705         "T72x_FRAG_DUMMY_THREADS",
 706         "T72x_FRAG_QUADS_RAST",
 707         "T72x_FRAG_QUADS_EZS_TEST",
 708         "T72x_FRAG_QUADS_EZS_KILLED",
 709         "T72x_FRAG_THREADS_LZS_TEST",
 710         "T72x_FRAG_THREADS_LZS_KILLED",
 711         "T72x_FRAG_CYCLES_NO_TILE",
 712         "T72x_FRAG_NUM_TILES",
 713         "T72x_FRAG_TRANS_ELIM",
 714         "T72x_COMPUTE_ACTIVE",
 715         "T72x_COMPUTE_TASKS",
 716         "T72x_COMPUTE_THREADS",
 717         "T72x_TRIPIPE_ACTIVE",
 718         "T72x_ARITH_WORDS",
 719         "T72x_ARITH_CYCLES_REG",
 720         "T72x_LS_WORDS",
 721         "T72x_LS_ISSUES",
 722         "T72x_LS_RESTARTS",
 723         "T72x_LS_REISSUES_MISS",
 724         "T72x_TEX_WORDS",
 725         "T72x_TEX_BUBBLES",
 726         "T72x_TEX_ISSUES",
 727         "T72x_LSC_READ_HITS",
 728         "T72x_LSC_READ_MISSES",
 729         "T72x_LSC_WRITE_HITS",
 730         "T72x_LSC_WRITE_MISSES",
 731         "T72x_LSC_ATOMIC_HITS",
 732         "T72x_LSC_ATOMIC_MISSES",
 733         "T72x_LSC_LINE_FETCHES",
 734         "T72x_LSC_DIRTY_LINE",
 735         "T72x_LSC_SNOOPS",
 736         "",
 737         "",
 738         "",
 739         "",
 740         "",
 741         "",
 742         "",
 743         "",
 744         "",
 745         "",
 746         "",
 747         "",
 748         "",
 749         "",
 750         "",
 751         "",
 752         "",
 753         "",
 754         "",
 755         "",
 756         "",
 757         "",
 758         "",
 759         "",
 760         "",
 761
 762         /*L2 and MMU */
 763         "",
 764         "",
 765         "",
 766         "",
 767         "T72x_L2_EXT_WRITE_BEAT",
 768         "T72x_L2_EXT_READ_BEAT",
 769         "T72x_L2_READ_SNOOP",
 770         "T72x_L2_READ_HIT",
 771         "T72x_L2_WRITE_SNOOP",
 772         "T72x_L2_WRITE_HIT",
 773         "T72x_L2_EXT_WRITE_SMALL",
 774         "T72x_L2_EXT_BARRIER",
 775         "T72x_L2_EXT_AR_STALL",
 776         "T72x_L2_EXT_W_STALL",
 777         "T72x_L2_SNOOP_FULL",
 778         "",
 779         "",
 780         "",
 781         "",
 782         "",
 783         "",
 784         "",
 785         "",
 786         "",
 787         "",
 788         "",
 789         "",
 790         "",
 791         "",
 792         "",
 793         "",
 794         "",
 795         "",
 796         "",
 797         "",
 798         "",
 799         "",
 800         "",
 801         "",
 802         "",
 803         "",
 804         "",
 805         "",
 806         "",
 807         "",
 808         "",
 809         "",
 810         "",
 811         "",
 812         "",
 813         "",
 814         "",
 815         "",
 816         "",
 817         "",
 818         "",
 819         "",
 820         "",
 821         "",
 822         "",
 823         "",
 824         "",
 825         "",
 826         ""
 827 };
 828
 829 static const char * const hardware_counters_mali_t76x[] = {
 830         /* Job Manager */
 831         "",
 832         "",
 833         "",
 834         "",
 835         "T76x_MESSAGES_SENT",
 836         "T76x_MESSAGES_RECEIVED",
 837         "T76x_GPU_ACTIVE",
 838         "T76x_IRQ_ACTIVE",
 839         "T76x_JS0_JOBS",
 840         "T76x_JS0_TASKS",
 841         "T76x_JS0_ACTIVE",
 842         "",
 843         "T76x_JS0_WAIT_READ",
 844         "T76x_JS0_WAIT_ISSUE",
 845         "T76x_JS0_WAIT_DEPEND",
 846         "T76x_JS0_WAIT_FINISH",
 847         "T76x_JS1_JOBS",
 848         "T76x_JS1_TASKS",
 849         "T76x_JS1_ACTIVE",
 850         "",
 851         "T76x_JS1_WAIT_READ",
 852         "T76x_JS1_WAIT_ISSUE",
 853         "T76x_JS1_WAIT_DEPEND",
 854         "T76x_JS1_WAIT_FINISH",
 855         "T76x_JS2_JOBS",
 856         "T76x_JS2_TASKS",
 857         "T76x_JS2_ACTIVE",
 858         "",
 859         "T76x_JS2_WAIT_READ",
 860         "T76x_JS2_WAIT_ISSUE",
 861         "T76x_JS2_WAIT_DEPEND",
 862         "T76x_JS2_WAIT_FINISH",
 863         "",
 864         "",
 865         "",
 866         "",
 867         "",
 868         "",
 869         "",
 870         "",
 871         "",
 872         "",
 873         "",
 874         "",
 875         "",
 876         "",
 877         "",
 878         "",
 879         "",
 880         "",
 881         "",
 882         "",
 883         "",
 884         "",
 885         "",
 886         "",
 887         "",
 888         "",
 889         "",
 890         "",
 891         "",
 892         "",
 893         "",
 894         "",
 895
 896         /*Tiler */
 897         "",
 898         "",
 899         "",
 900         "T76x_TI_JOBS_PROCESSED",
 901         "T76x_TI_TRIANGLES",
 902         "T76x_TI_QUADS",
 903         "T76x_TI_POLYGONS",
 904         "T76x_TI_POINTS",
 905         "T76x_TI_LINES",
 906         "T76x_TI_VCACHE_HIT",
 907         "T76x_TI_VCACHE_MISS",
 908         "T76x_TI_FRONT_FACING",
 909         "T76x_TI_BACK_FACING",
 910         "T76x_TI_PRIM_VISIBLE",
 911         "T76x_TI_PRIM_CULLED",
 912         "T76x_TI_PRIM_CLIPPED",
 913         "T76x_TI_LEVEL0",
 914         "T76x_TI_LEVEL1",
 915         "T76x_TI_LEVEL2",
 916         "T76x_TI_LEVEL3",
 917         "T76x_TI_LEVEL4",
 918         "T76x_TI_LEVEL5",
 919         "T76x_TI_LEVEL6",
 920         "T76x_TI_LEVEL7",
 921         "T76x_TI_COMMAND_1",
 922         "T76x_TI_COMMAND_2",
 923         "T76x_TI_COMMAND_3",
 924         "T76x_TI_COMMAND_4",
 925         "T76x_TI_COMMAND_5_7",
 926         "T76x_TI_COMMAND_8_15",
 927         "T76x_TI_COMMAND_16_63",
 928         "T76x_TI_COMMAND_64",
 929         "T76x_TI_COMPRESS_IN",
 930         "T76x_TI_COMPRESS_OUT",
 931         "T76x_TI_COMPRESS_FLUSH",
 932         "T76x_TI_TIMESTAMPS",
 933         "T76x_TI_PCACHE_HIT",
 934         "T76x_TI_PCACHE_MISS",
 935         "T76x_TI_PCACHE_LINE",
 936         "T76x_TI_PCACHE_STALL",
 937         "T76x_TI_WRBUF_HIT",
 938         "T76x_TI_WRBUF_MISS",
 939         "T76x_TI_WRBUF_LINE",
 940         "T76x_TI_WRBUF_PARTIAL",
 941         "T76x_TI_WRBUF_STALL",
 942         "T76x_TI_ACTIVE",
 943         "T76x_TI_LOADING_DESC",
 944         "T76x_TI_INDEX_WAIT",
 945         "T76x_TI_INDEX_RANGE_WAIT",
 946         "T76x_TI_VERTEX_WAIT",
 947         "T76x_TI_PCACHE_WAIT",
 948         "T76x_TI_WRBUF_WAIT",
 949         "T76x_TI_BUS_READ",
 950         "T76x_TI_BUS_WRITE",
 951         "",
 952         "",
 953         "",
 954         "",
 955         "",
 956         "T76x_TI_UTLB_HIT",
 957         "T76x_TI_UTLB_NEW_MISS",
 958         "T76x_TI_UTLB_REPLAY_FULL",
 959         "T76x_TI_UTLB_REPLAY_MISS",
 960         "T76x_TI_UTLB_STALL",
 961
 962         /* Shader Core */
 963         "",
 964         "",
 965         "",
 966         "",
 967         "T76x_FRAG_ACTIVE",
 968         "T76x_FRAG_PRIMITIVES",
 969         "T76x_FRAG_PRIMITIVES_DROPPED",
 970         "T76x_FRAG_CYCLES_DESC",
 971         "T76x_FRAG_CYCLES_FPKQ_ACTIVE",
 972         "T76x_FRAG_CYCLES_VERT",
 973         "T76x_FRAG_CYCLES_TRISETUP",
 974         "T76x_FRAG_CYCLES_EZS_ACTIVE",
 975         "T76x_FRAG_THREADS",
 976         "T76x_FRAG_DUMMY_THREADS",
 977         "T76x_FRAG_QUADS_RAST",
 978         "T76x_FRAG_QUADS_EZS_TEST",
 979         "T76x_FRAG_QUADS_EZS_KILLED",
 980         "T76x_FRAG_THREADS_LZS_TEST",
 981         "T76x_FRAG_THREADS_LZS_KILLED",
 982         "T76x_FRAG_CYCLES_NO_TILE",
 983         "T76x_FRAG_NUM_TILES",
 984         "T76x_FRAG_TRANS_ELIM",
 985         "T76x_COMPUTE_ACTIVE",
 986         "T76x_COMPUTE_TASKS",
 987         "T76x_COMPUTE_THREADS",
 988         "T76x_COMPUTE_CYCLES_DESC",
 989         "T76x_TRIPIPE_ACTIVE",
 990         "T76x_ARITH_WORDS",
 991         "T76x_ARITH_CYCLES_REG",
 992         "T76x_ARITH_CYCLES_L0",
 993         "T76x_ARITH_FRAG_DEPEND",
 994         "T76x_LS_WORDS",
 995         "T76x_LS_ISSUES",
 996         "T76x_LS_REISSUE_ATTR",
 997         "T76x_LS_REISSUES_VARY",
 998         "T76x_LS_VARY_RV_MISS",
 999         "T76x_LS_VARY_RV_HIT",
1000         "T76x_LS_NO_UNPARK",
1001         "T76x_TEX_WORDS",
1002         "T76x_TEX_BUBBLES",
1003         "T76x_TEX_WORDS_L0",
1004         "T76x_TEX_WORDS_DESC",
1005         "T76x_TEX_ISSUES",
1006         "T76x_TEX_RECIRC_FMISS",
1007         "T76x_TEX_RECIRC_DESC",
1008         "T76x_TEX_RECIRC_MULTI",
1009         "T76x_TEX_RECIRC_PMISS",
1010         "T76x_TEX_RECIRC_CONF",
1011         "T76x_LSC_READ_HITS",
1012         "T76x_LSC_READ_OP",
1013         "T76x_LSC_WRITE_HITS",
1014         "T76x_LSC_WRITE_OP",
1015         "T76x_LSC_ATOMIC_HITS",
1016         "T76x_LSC_ATOMIC_OP",
1017         "T76x_LSC_LINE_FETCHES",
1018         "T76x_LSC_DIRTY_LINE",
1019         "T76x_LSC_SNOOPS",
1020         "T76x_AXI_TLB_STALL",
1021         "T76x_AXI_TLB_MISS",
1022         "T76x_AXI_TLB_TRANSACTION",
1023         "T76x_LS_TLB_MISS",
1024         "T76x_LS_TLB_HIT",
1025         "T76x_AXI_BEATS_READ",
1026         "T76x_AXI_BEATS_WRITTEN",
1027
1028         /*L2 and MMU */
1029         "",
1030         "",
1031         "",
1032         "",
1033         "T76x_MMU_HIT",
1034         "T76x_MMU_NEW_MISS",
1035         "T76x_MMU_REPLAY_FULL",
1036         "T76x_MMU_REPLAY_MISS",
1037         "T76x_MMU_TABLE_WALK",
1038         "T76x_MMU_REQUESTS",
1039         "",
1040         "",
1041         "T76x_UTLB_HIT",
1042         "T76x_UTLB_NEW_MISS",
1043         "T76x_UTLB_REPLAY_FULL",
1044         "T76x_UTLB_REPLAY_MISS",
1045         "T76x_UTLB_STALL",
1046         "",
1047         "",
1048         "",
1049         "",
1050         "",
1051         "",
1052         "",
1053         "",
1054         "",
1055         "",
1056         "",
1057         "",
1058         "",
1059         "T76x_L2_EXT_WRITE_BEATS",
1060         "T76x_L2_EXT_READ_BEATS",
1061         "T76x_L2_ANY_LOOKUP",
1062         "T76x_L2_READ_LOOKUP",
1063         "T76x_L2_SREAD_LOOKUP",
1064         "T76x_L2_READ_REPLAY",
1065         "T76x_L2_READ_SNOOP",
1066         "T76x_L2_READ_HIT",
1067         "T76x_L2_CLEAN_MISS",
1068         "T76x_L2_WRITE_LOOKUP",
1069         "T76x_L2_SWRITE_LOOKUP",
1070         "T76x_L2_WRITE_REPLAY",
1071         "T76x_L2_WRITE_SNOOP",
1072         "T76x_L2_WRITE_HIT",
1073         "T76x_L2_EXT_READ_FULL",
1074         "",
1075         "T76x_L2_EXT_WRITE_FULL",
1076         "T76x_L2_EXT_R_W_HAZARD",
1077         "T76x_L2_EXT_READ",
1078         "T76x_L2_EXT_READ_LINE",
1079         "T76x_L2_EXT_WRITE",
1080         "T76x_L2_EXT_WRITE_LINE",
1081         "T76x_L2_EXT_WRITE_SMALL",
1082         "T76x_L2_EXT_BARRIER",
1083         "T76x_L2_EXT_AR_STALL",
1084         "T76x_L2_EXT_R_BUF_FULL",
1085         "T76x_L2_EXT_RD_BUF_FULL",
1086         "T76x_L2_EXT_R_RAW",
1087         "T76x_L2_EXT_W_STALL",
1088         "T76x_L2_EXT_W_BUF_FULL",
1089         "T76x_L2_EXT_R_BUF_FULL",
1090         "T76x_L2_TAG_HAZARD",
1091         "T76x_L2_SNOOP_FULL",
1092         "T76x_L2_REPLAY_FULL"
1093 };
1094
1095 static const char * const hardware_counters_mali_t82x[] = {
1096         /* Job Manager */
1097         "",
1098         "",
1099         "",
1100         "",
1101         "T82x_MESSAGES_SENT",
1102         "T82x_MESSAGES_RECEIVED",
1103         "T82x_GPU_ACTIVE",
1104         "T82x_IRQ_ACTIVE",
1105         "T82x_JS0_JOBS",
1106         "T82x_JS0_TASKS",
1107         "T82x_JS0_ACTIVE",
1108         "",
1109         "T82x_JS0_WAIT_READ",
1110         "T82x_JS0_WAIT_ISSUE",
1111         "T82x_JS0_WAIT_DEPEND",
1112         "T82x_JS0_WAIT_FINISH",
1113         "T82x_JS1_JOBS",
1114         "T82x_JS1_TASKS",
1115         "T82x_JS1_ACTIVE",
1116         "",
1117         "T82x_JS1_WAIT_READ",
1118         "T82x_JS1_WAIT_ISSUE",
1119         "T82x_JS1_WAIT_DEPEND",
1120         "T82x_JS1_WAIT_FINISH",
1121         "T82x_JS2_JOBS",
1122         "T82x_JS2_TASKS",
1123         "T82x_JS2_ACTIVE",
1124         "",
1125         "T82x_JS2_WAIT_READ",
1126         "T82x_JS2_WAIT_ISSUE",
1127         "T82x_JS2_WAIT_DEPEND",
1128         "T82x_JS2_WAIT_FINISH",
1129         "",
1130         "",
1131         "",
1132         "",
1133         "",
1134         "",
1135         "",
1136         "",
1137         "",
1138         "",
1139         "",
1140         "",
1141         "",
1142         "",
1143         "",
1144         "",
1145         "",
1146         "",
1147         "",
1148         "",
1149         "",
1150         "",
1151         "",
1152         "",
1153         "",
1154         "",
1155         "",
1156         "",
1157         "",
1158         "",
1159         "",
1160         "",
1161
1162         /*Tiler */
1163         "",
1164         "",
1165         "",
1166         "T82x_TI_JOBS_PROCESSED",
1167         "T82x_TI_TRIANGLES",
1168         "T82x_TI_QUADS",
1169         "T82x_TI_POLYGONS",
1170         "T82x_TI_POINTS",
1171         "T82x_TI_LINES",
1172         "T82x_TI_FRONT_FACING",
1173         "T82x_TI_BACK_FACING",
1174         "T82x_TI_PRIM_VISIBLE",
1175         "T82x_TI_PRIM_CULLED",
1176         "T82x_TI_PRIM_CLIPPED",
1177         "",
1178         "",
1179         "",
1180         "",
1181         "",
1182         "",
1183         "",
1184         "",
1185         "T82x_TI_ACTIVE",
1186         "",
1187         "",
1188         "",
1189         "",
1190         "",
1191         "",
1192         "",
1193         "",
1194         "",
1195         "",
1196         "",
1197         "",
1198         "",
1199         "",
1200         "",
1201         "",
1202         "",
1203         "",
1204         "",
1205         "",
1206         "",
1207         "",
1208         "",
1209         "",
1210         "",
1211         "",
1212         "",
1213         "",
1214         "",
1215         "",
1216         "",
1217         "",
1218         "",
1219         "",
1220         "",
1221         "",
1222         "",
1223         "",
1224         "",
1225         "",
1226         "",
1227
1228         /* Shader Core */
1229         "",
1230         "",
1231         "",
1232         "",
1233         "T82x_FRAG_ACTIVE",
1234         "T82x_FRAG_PRIMITIVES",
1235         "T82x_FRAG_PRIMITIVES_DROPPED",
1236         "T82x_FRAG_CYCLES_DESC",
1237         "T82x_FRAG_CYCLES_FPKQ_ACTIVE",
1238         "T82x_FRAG_CYCLES_VERT",
1239         "T82x_FRAG_CYCLES_TRISETUP",
1240         "T82x_FRAG_CYCLES_EZS_ACTIVE",
1241         "T82x_FRAG_THREADS",
1242         "T82x_FRAG_DUMMY_THREADS",
1243         "T82x_FRAG_QUADS_RAST",
1244         "T82x_FRAG_QUADS_EZS_TEST",
1245         "T82x_FRAG_QUADS_EZS_KILLED",
1246         "T82x_FRAG_THREADS_LZS_TEST",
1247         "T82x_FRAG_THREADS_LZS_KILLED",
1248         "T82x_FRAG_CYCLES_NO_TILE",
1249         "T82x_FRAG_NUM_TILES",
1250         "T82x_FRAG_TRANS_ELIM",
1251         "T82x_COMPUTE_ACTIVE",
1252         "T82x_COMPUTE_TASKS",
1253         "T82x_COMPUTE_THREADS",
1254         "T82x_COMPUTE_CYCLES_DESC",
1255         "T82x_TRIPIPE_ACTIVE",
1256         "T82x_ARITH_WORDS",
1257         "T82x_ARITH_CYCLES_REG",
1258         "T82x_ARITH_CYCLES_L0",
1259         "T82x_ARITH_FRAG_DEPEND",
1260         "T82x_LS_WORDS",
1261         "T82x_LS_ISSUES",
1262         "T82x_LS_REISSUE_ATTR",
1263         "T82x_LS_REISSUES_VARY",
1264         "T82x_LS_VARY_RV_MISS",
1265         "T82x_LS_VARY_RV_HIT",
1266         "T82x_LS_NO_UNPARK",
1267         "T82x_TEX_WORDS",
1268         "T82x_TEX_BUBBLES",
1269         "T82x_TEX_WORDS_L0",
1270         "T82x_TEX_WORDS_DESC",
1271         "T82x_TEX_ISSUES",
1272         "T82x_TEX_RECIRC_FMISS",
1273         "T82x_TEX_RECIRC_DESC",
1274         "T82x_TEX_RECIRC_MULTI",
1275         "T82x_TEX_RECIRC_PMISS",
1276         "T82x_TEX_RECIRC_CONF",
1277         "T82x_LSC_READ_HITS",
1278         "T82x_LSC_READ_OP",
1279         "T82x_LSC_WRITE_HITS",
1280         "T82x_LSC_WRITE_OP",
1281         "T82x_LSC_ATOMIC_HITS",
1282         "T82x_LSC_ATOMIC_OP",
1283         "T82x_LSC_LINE_FETCHES",
1284         "T82x_LSC_DIRTY_LINE",
1285         "T82x_LSC_SNOOPS",
1286         "T82x_AXI_TLB_STALL",
1287         "T82x_AXI_TLB_MISS",
1288         "T82x_AXI_TLB_TRANSACTION",
1289         "T82x_LS_TLB_MISS",
1290         "T82x_LS_TLB_HIT",
1291         "T82x_AXI_BEATS_READ",
1292         "T82x_AXI_BEATS_WRITTEN",
1293
1294         /*L2 and MMU */
1295         "",
1296         "",
1297         "",
1298         "",
1299         "T82x_MMU_HIT",
1300         "T82x_MMU_NEW_MISS",
1301         "T82x_MMU_REPLAY_FULL",
1302         "T82x_MMU_REPLAY_MISS",
1303         "T82x_MMU_TABLE_WALK",
1304         "T82x_MMU_REQUESTS",
1305         "",
1306         "",
1307         "T82x_UTLB_HIT",
1308         "T82x_UTLB_NEW_MISS",
1309         "T82x_UTLB_REPLAY_FULL",
1310         "T82x_UTLB_REPLAY_MISS",
1311         "T82x_UTLB_STALL",
1312         "",
1313         "",
1314         "",
1315         "",
1316         "",
1317         "",
1318         "",
1319         "",
1320         "",
1321         "",
1322         "",
1323         "",
1324         "",
1325         "T82x_L2_EXT_WRITE_BEATS",
1326         "T82x_L2_EXT_READ_BEATS",
1327         "T82x_L2_ANY_LOOKUP",
1328         "T82x_L2_READ_LOOKUP",
1329         "T82x_L2_SREAD_LOOKUP",
1330         "T82x_L2_READ_REPLAY",
1331         "T82x_L2_READ_SNOOP",
1332         "T82x_L2_READ_HIT",
1333         "T82x_L2_CLEAN_MISS",
1334         "T82x_L2_WRITE_LOOKUP",
1335         "T82x_L2_SWRITE_LOOKUP",
1336         "T82x_L2_WRITE_REPLAY",
1337         "T82x_L2_WRITE_SNOOP",
1338         "T82x_L2_WRITE_HIT",
1339         "T82x_L2_EXT_READ_FULL",
1340         "",
1341         "T82x_L2_EXT_WRITE_FULL",
1342         "T82x_L2_EXT_R_W_HAZARD",
1343         "T82x_L2_EXT_READ",
1344         "T82x_L2_EXT_READ_LINE",
1345         "T82x_L2_EXT_WRITE",
1346         "T82x_L2_EXT_WRITE_LINE",
1347         "T82x_L2_EXT_WRITE_SMALL",
1348         "T82x_L2_EXT_BARRIER",
1349         "T82x_L2_EXT_AR_STALL",
1350         "T82x_L2_EXT_R_BUF_FULL",
1351         "T82x_L2_EXT_RD_BUF_FULL",
1352         "T82x_L2_EXT_R_RAW",
1353         "T82x_L2_EXT_W_STALL",
1354         "T82x_L2_EXT_W_BUF_FULL",
1355         "T82x_L2_EXT_R_BUF_FULL",
1356         "T82x_L2_TAG_HAZARD",
1357         "T82x_L2_SNOOP_FULL",
1358         "T82x_L2_REPLAY_FULL"
1359 };
1360
1361 static const char * const hardware_counters_mali_t83x[] = {
1362         /* Job Manager */
1363         "",
1364         "",
1365         "",
1366         "",
1367         "T83x_MESSAGES_SENT",
1368         "T83x_MESSAGES_RECEIVED",
1369         "T83x_GPU_ACTIVE",
1370         "T83x_IRQ_ACTIVE",
1371         "T83x_JS0_JOBS",
1372         "T83x_JS0_TASKS",
1373         "T83x_JS0_ACTIVE",
1374         "",
1375         "T83x_JS0_WAIT_READ",
1376         "T83x_JS0_WAIT_ISSUE",
1377         "T83x_JS0_WAIT_DEPEND",
1378         "T83x_JS0_WAIT_FINISH",
1379         "T83x_JS1_JOBS",
1380         "T83x_JS1_TASKS",
1381         "T83x_JS1_ACTIVE",
1382         "",
1383         "T83x_JS1_WAIT_READ",
1384         "T83x_JS1_WAIT_ISSUE",
1385         "T83x_JS1_WAIT_DEPEND",
1386         "T83x_JS1_WAIT_FINISH",
1387         "T83x_JS2_JOBS",
1388         "T83x_JS2_TASKS",
1389         "T83x_JS2_ACTIVE",
1390         "",
1391         "T83x_JS2_WAIT_READ",
1392         "T83x_JS2_WAIT_ISSUE",
1393         "T83x_JS2_WAIT_DEPEND",
1394         "T83x_JS2_WAIT_FINISH",
1395         "",
1396         "",
1397         "",
1398         "",
1399         "",
1400         "",
1401         "",
1402         "",
1403         "",
1404         "",
1405         "",
1406         "",
1407         "",
1408         "",
1409         "",
1410         "",
1411         "",
1412         "",
1413         "",
1414         "",
1415         "",
1416         "",
1417         "",
1418         "",
1419         "",
1420         "",
1421         "",
1422         "",
1423         "",
1424         "",
1425         "",
1426         "",
1427
1428         /*Tiler */
1429         "",
1430         "",
1431         "",
1432         "T83x_TI_JOBS_PROCESSED",
1433         "T83x_TI_TRIANGLES",
1434         "T83x_TI_QUADS",
1435         "T83x_TI_POLYGONS",
1436         "T83x_TI_POINTS",
1437         "T83x_TI_LINES",
1438         "T83x_TI_FRONT_FACING",
1439         "T83x_TI_BACK_FACING",
1440         "T83x_TI_PRIM_VISIBLE",
1441         "T83x_TI_PRIM_CULLED",
1442         "T83x_TI_PRIM_CLIPPED",
1443         "",
1444         "",
1445         "",
1446         "",
1447         "",
1448         "",
1449         "",
1450         "",
1451         "T83x_TI_ACTIVE",
1452         "",
1453         "",
1454         "",
1455         "",
1456         "",
1457         "",
1458         "",
1459         "",
1460         "",
1461         "",
1462         "",
1463         "",
1464         "",
1465         "",
1466         "",
1467         "",
1468         "",
1469         "",
1470         "",
1471         "",
1472         "",
1473         "",
1474         "",
1475         "",
1476         "",
1477         "",
1478         "",
1479         "",
1480         "",
1481         "",
1482         "",
1483         "",
1484         "",
1485         "",
1486         "",
1487         "",
1488         "",
1489         "",
1490         "",
1491         "",
1492         "",
1493
1494         /* Shader Core */
1495         "",
1496         "",
1497         "",
1498         "",
1499         "T83x_FRAG_ACTIVE",
1500         "T83x_FRAG_PRIMITIVES",
1501         "T83x_FRAG_PRIMITIVES_DROPPED",
1502         "T83x_FRAG_CYCLES_DESC",
1503         "T83x_FRAG_CYCLES_FPKQ_ACTIVE",
1504         "T83x_FRAG_CYCLES_VERT",
1505         "T83x_FRAG_CYCLES_TRISETUP",
1506         "T83x_FRAG_CYCLES_EZS_ACTIVE",
1507         "T83x_FRAG_THREADS",
1508         "T83x_FRAG_DUMMY_THREADS",
1509         "T83x_FRAG_QUADS_RAST",
1510         "T83x_FRAG_QUADS_EZS_TEST",
1511         "T83x_FRAG_QUADS_EZS_KILLED",
1512         "T83x_FRAG_THREADS_LZS_TEST",
1513         "T83x_FRAG_THREADS_LZS_KILLED",
1514         "T83x_FRAG_CYCLES_NO_TILE",
1515         "T83x_FRAG_NUM_TILES",
1516         "T83x_FRAG_TRANS_ELIM",
1517         "T83x_COMPUTE_ACTIVE",
1518         "T83x_COMPUTE_TASKS",
1519         "T83x_COMPUTE_THREADS",
1520         "T83x_COMPUTE_CYCLES_DESC",
1521         "T83x_TRIPIPE_ACTIVE",
1522         "T83x_ARITH_WORDS",
1523         "T83x_ARITH_CYCLES_REG",
1524         "T83x_ARITH_CYCLES_L0",
1525         "T83x_ARITH_FRAG_DEPEND",
1526         "T83x_LS_WORDS",
1527         "T83x_LS_ISSUES",
1528         "T83x_LS_REISSUE_ATTR",
1529         "T83x_LS_REISSUES_VARY",
1530         "T83x_LS_VARY_RV_MISS",
1531         "T83x_LS_VARY_RV_HIT",
1532         "T83x_LS_NO_UNPARK",
1533         "T83x_TEX_WORDS",
1534         "T83x_TEX_BUBBLES",
1535         "T83x_TEX_WORDS_L0",
1536         "T83x_TEX_WORDS_DESC",
1537         "T83x_TEX_ISSUES",
1538         "T83x_TEX_RECIRC_FMISS",
1539         "T83x_TEX_RECIRC_DESC",
1540         "T83x_TEX_RECIRC_MULTI",
1541         "T83x_TEX_RECIRC_PMISS",
1542         "T83x_TEX_RECIRC_CONF",
1543         "T83x_LSC_READ_HITS",
1544         "T83x_LSC_READ_OP",
1545         "T83x_LSC_WRITE_HITS",
1546         "T83x_LSC_WRITE_OP",
1547         "T83x_LSC_ATOMIC_HITS",
1548         "T83x_LSC_ATOMIC_OP",
1549         "T83x_LSC_LINE_FETCHES",
1550         "T83x_LSC_DIRTY_LINE",
1551         "T83x_LSC_SNOOPS",
1552         "T83x_AXI_TLB_STALL",
1553         "T83x_AXI_TLB_MISS",
1554         "T83x_AXI_TLB_TRANSACTION",
1555         "T83x_LS_TLB_MISS",
1556         "T83x_LS_TLB_HIT",
1557         "T83x_AXI_BEATS_READ",
1558         "T83x_AXI_BEATS_WRITTEN",
1559
1560         /*L2 and MMU */
1561         "",
1562         "",
1563         "",
1564         "",
1565         "T83x_MMU_HIT",
1566         "T83x_MMU_NEW_MISS",
1567         "T83x_MMU_REPLAY_FULL",
1568         "T83x_MMU_REPLAY_MISS",
1569         "T83x_MMU_TABLE_WALK",
1570         "T83x_MMU_REQUESTS",
1571         "",
1572         "",
1573         "T83x_UTLB_HIT",
1574         "T83x_UTLB_NEW_MISS",
1575         "T83x_UTLB_REPLAY_FULL",
1576         "T83x_UTLB_REPLAY_MISS",
1577         "T83x_UTLB_STALL",
1578         "",
1579         "",
1580         "",
1581         "",
1582         "",
1583         "",
1584         "",
1585         "",
1586         "",
1587         "",
1588         "",
1589         "",
1590         "",
1591         "T83x_L2_EXT_WRITE_BEATS",
1592         "T83x_L2_EXT_READ_BEATS",
1593         "T83x_L2_ANY_LOOKUP",
1594         "T83x_L2_READ_LOOKUP",
1595         "T83x_L2_SREAD_LOOKUP",
1596         "T83x_L2_READ_REPLAY",
1597         "T83x_L2_READ_SNOOP",
1598         "T83x_L2_READ_HIT",
1599         "T83x_L2_CLEAN_MISS",
1600         "T83x_L2_WRITE_LOOKUP",
1601         "T83x_L2_SWRITE_LOOKUP",
1602         "T83x_L2_WRITE_REPLAY",
1603         "T83x_L2_WRITE_SNOOP",
1604         "T83x_L2_WRITE_HIT",
1605         "T83x_L2_EXT_READ_FULL",
1606         "",
1607         "T83x_L2_EXT_WRITE_FULL",
1608         "T83x_L2_EXT_R_W_HAZARD",
1609         "T83x_L2_EXT_READ",
1610         "T83x_L2_EXT_READ_LINE",
1611         "T83x_L2_EXT_WRITE",
1612         "T83x_L2_EXT_WRITE_LINE",
1613         "T83x_L2_EXT_WRITE_SMALL",
1614         "T83x_L2_EXT_BARRIER",
1615         "T83x_L2_EXT_AR_STALL",
1616         "T83x_L2_EXT_R_BUF_FULL",
1617         "T83x_L2_EXT_RD_BUF_FULL",
1618         "T83x_L2_EXT_R_RAW",
1619         "T83x_L2_EXT_W_STALL",
1620         "T83x_L2_EXT_W_BUF_FULL",
1621         "T83x_L2_EXT_R_BUF_FULL",
1622         "T83x_L2_TAG_HAZARD",
1623         "T83x_L2_SNOOP_FULL",
1624         "T83x_L2_REPLAY_FULL"
1625 };
1626
1627 static const char * const hardware_counters_mali_t86x[] = {
1628         /* Job Manager */
1629         "",
1630         "",
1631         "",
1632         "",
1633         "T86x_MESSAGES_SENT",
1634         "T86x_MESSAGES_RECEIVED",
1635         "T86x_GPU_ACTIVE",
1636         "T86x_IRQ_ACTIVE",
1637         "T86x_JS0_JOBS",
1638         "T86x_JS0_TASKS",
1639         "T86x_JS0_ACTIVE",
1640         "",
1641         "T86x_JS0_WAIT_READ",
1642         "T86x_JS0_WAIT_ISSUE",
1643         "T86x_JS0_WAIT_DEPEND",
1644         "T86x_JS0_WAIT_FINISH",
1645         "T86x_JS1_JOBS",
1646         "T86x_JS1_TASKS",
1647         "T86x_JS1_ACTIVE",
1648         "",
1649         "T86x_JS1_WAIT_READ",
1650         "T86x_JS1_WAIT_ISSUE",
1651         "T86x_JS1_WAIT_DEPEND",
1652         "T86x_JS1_WAIT_FINISH",
1653         "T86x_JS2_JOBS",
1654         "T86x_JS2_TASKS",
1655         "T86x_JS2_ACTIVE",
1656         "",
1657         "T86x_JS2_WAIT_READ",
1658         "T86x_JS2_WAIT_ISSUE",
1659         "T86x_JS2_WAIT_DEPEND",
1660         "T86x_JS2_WAIT_FINISH",
1661         "",
1662         "",
1663         "",
1664         "",
1665         "",
1666         "",
1667         "",
1668         "",
1669         "",
1670         "",
1671         "",
1672         "",
1673         "",
1674         "",
1675         "",
1676         "",
1677         "",
1678         "",
1679         "",
1680         "",
1681         "",
1682         "",
1683         "",
1684         "",
1685         "",
1686         "",
1687         "",
1688         "",
1689         "",
1690         "",
1691         "",
1692         "",
1693
1694         /*Tiler */
1695         "",
1696         "",
1697         "",
1698         "T86x_TI_JOBS_PROCESSED",
1699         "T86x_TI_TRIANGLES",
1700         "T86x_TI_QUADS",
1701         "T86x_TI_POLYGONS",
1702         "T86x_TI_POINTS",
1703         "T86x_TI_LINES",
1704         "T86x_TI_VCACHE_HIT",
1705         "T86x_TI_VCACHE_MISS",
1706         "T86x_TI_FRONT_FACING",
1707         "T86x_TI_BACK_FACING",
1708         "T86x_TI_PRIM_VISIBLE",
1709         "T86x_TI_PRIM_CULLED",
1710         "T86x_TI_PRIM_CLIPPED",
1711         "T86x_TI_LEVEL0",
1712         "T86x_TI_LEVEL1",
1713         "T86x_TI_LEVEL2",
1714         "T86x_TI_LEVEL3",
1715         "T86x_TI_LEVEL4",
1716         "T86x_TI_LEVEL5",
1717         "T86x_TI_LEVEL6",
1718         "T86x_TI_LEVEL7",
1719         "T86x_TI_COMMAND_1",
1720         "T86x_TI_COMMAND_2",
1721         "T86x_TI_COMMAND_3",
1722         "T86x_TI_COMMAND_4",
1723         "T86x_TI_COMMAND_5_7",
1724         "T86x_TI_COMMAND_8_15",
1725         "T86x_TI_COMMAND_16_63",
1726         "T86x_TI_COMMAND_64",
1727         "T86x_TI_COMPRESS_IN",
1728         "T86x_TI_COMPRESS_OUT",
1729         "T86x_TI_COMPRESS_FLUSH",
1730         "T86x_TI_TIMESTAMPS",
1731         "T86x_TI_PCACHE_HIT",
1732         "T86x_TI_PCACHE_MISS",
1733         "T86x_TI_PCACHE_LINE",
1734         "T86x_TI_PCACHE_STALL",
1735         "T86x_TI_WRBUF_HIT",
1736         "T86x_TI_WRBUF_MISS",
1737         "T86x_TI_WRBUF_LINE",
1738         "T86x_TI_WRBUF_PARTIAL",
1739         "T86x_TI_WRBUF_STALL",
1740         "T86x_TI_ACTIVE",
1741         "T86x_TI_LOADING_DESC",
1742         "T86x_TI_INDEX_WAIT",
1743         "T86x_TI_INDEX_RANGE_WAIT",
1744         "T86x_TI_VERTEX_WAIT",
1745         "T86x_TI_PCACHE_WAIT",
1746         "T86x_TI_WRBUF_WAIT",
1747         "T86x_TI_BUS_READ",
1748         "T86x_TI_BUS_WRITE",
1749         "",
1750         "",
1751         "",
1752         "",
1753         "",
1754         "T86x_TI_UTLB_HIT",
1755         "T86x_TI_UTLB_NEW_MISS",
1756         "T86x_TI_UTLB_REPLAY_FULL",
1757         "T86x_TI_UTLB_REPLAY_MISS",
1758         "T86x_TI_UTLB_STALL",
1759
1760         /* Shader Core */
1761         "",
1762         "",
1763         "",
1764         "",
1765         "T86x_FRAG_ACTIVE",
1766         "T86x_FRAG_PRIMITIVES",
1767         "T86x_FRAG_PRIMITIVES_DROPPED",
1768         "T86x_FRAG_CYCLES_DESC",
1769         "T86x_FRAG_CYCLES_FPKQ_ACTIVE",
1770         "T86x_FRAG_CYCLES_VERT",
1771         "T86x_FRAG_CYCLES_TRISETUP",
1772         "T86x_FRAG_CYCLES_EZS_ACTIVE",
1773         "T86x_FRAG_THREADS",
1774         "T86x_FRAG_DUMMY_THREADS",
1775         "T86x_FRAG_QUADS_RAST",
1776         "T86x_FRAG_QUADS_EZS_TEST",
1777         "T86x_FRAG_QUADS_EZS_KILLED",
1778         "T86x_FRAG_THREADS_LZS_TEST",
1779         "T86x_FRAG_THREADS_LZS_KILLED",
1780         "T86x_FRAG_CYCLES_NO_TILE",
1781         "T86x_FRAG_NUM_TILES",
1782         "T86x_FRAG_TRANS_ELIM",
1783         "T86x_COMPUTE_ACTIVE",
1784         "T86x_COMPUTE_TASKS",
1785         "T86x_COMPUTE_THREADS",
1786         "T86x_COMPUTE_CYCLES_DESC",
1787         "T86x_TRIPIPE_ACTIVE",
1788         "T86x_ARITH_WORDS",
1789         "T86x_ARITH_CYCLES_REG",
1790         "T86x_ARITH_CYCLES_L0",
1791         "T86x_ARITH_FRAG_DEPEND",
1792         "T86x_LS_WORDS",
1793         "T86x_LS_ISSUES",
1794         "T86x_LS_REISSUE_ATTR",
1795         "T86x_LS_REISSUES_VARY",
1796         "T86x_LS_VARY_RV_MISS",
1797         "T86x_LS_VARY_RV_HIT",
1798         "T86x_LS_NO_UNPARK",
1799         "T86x_TEX_WORDS",
1800         "T86x_TEX_BUBBLES",
1801         "T86x_TEX_WORDS_L0",
1802         "T86x_TEX_WORDS_DESC",
1803         "T86x_TEX_ISSUES",
1804         "T86x_TEX_RECIRC_FMISS",
1805         "T86x_TEX_RECIRC_DESC",
1806         "T86x_TEX_RECIRC_MULTI",
1807         "T86x_TEX_RECIRC_PMISS",
1808         "T86x_TEX_RECIRC_CONF",
1809         "T86x_LSC_READ_HITS",
1810         "T86x_LSC_READ_OP",
1811         "T86x_LSC_WRITE_HITS",
1812         "T86x_LSC_WRITE_OP",
1813         "T86x_LSC_ATOMIC_HITS",
1814         "T86x_LSC_ATOMIC_OP",
1815         "T86x_LSC_LINE_FETCHES",
1816         "T86x_LSC_DIRTY_LINE",
1817         "T86x_LSC_SNOOPS",
1818         "T86x_AXI_TLB_STALL",
1819         "T86x_AXI_TLB_MISS",
1820         "T86x_AXI_TLB_TRANSACTION",
1821         "T86x_LS_TLB_MISS",
1822         "T86x_LS_TLB_HIT",
1823         "T86x_AXI_BEATS_READ",
1824         "T86x_AXI_BEATS_WRITTEN",
1825
1826         /*L2 and MMU */
1827         "",
1828         "",
1829         "",
1830         "",
1831         "T86x_MMU_HIT",
1832         "T86x_MMU_NEW_MISS",
1833         "T86x_MMU_REPLAY_FULL",
1834         "T86x_MMU_REPLAY_MISS",
1835         "T86x_MMU_TABLE_WALK",
1836         "T86x_MMU_REQUESTS",
1837         "",
1838         "",
1839         "T86x_UTLB_HIT",
1840         "T86x_UTLB_NEW_MISS",
1841         "T86x_UTLB_REPLAY_FULL",
1842         "T86x_UTLB_REPLAY_MISS",
1843         "T86x_UTLB_STALL",
1844         "",
1845         "",
1846         "",
1847         "",
1848         "",
1849         "",
1850         "",
1851         "",
1852         "",
1853         "",
1854         "",
1855         "",
1856         "",
1857         "T86x_L2_EXT_WRITE_BEATS",
1858         "T86x_L2_EXT_READ_BEATS",
1859         "T86x_L2_ANY_LOOKUP",
1860         "T86x_L2_READ_LOOKUP",
1861         "T86x_L2_SREAD_LOOKUP",
1862         "T86x_L2_READ_REPLAY",
1863         "T86x_L2_READ_SNOOP",
1864         "T86x_L2_READ_HIT",
1865         "T86x_L2_CLEAN_MISS",
1866         "T86x_L2_WRITE_LOOKUP",
1867         "T86x_L2_SWRITE_LOOKUP",
1868         "T86x_L2_WRITE_REPLAY",
1869         "T86x_L2_WRITE_SNOOP",
1870         "T86x_L2_WRITE_HIT",
1871         "T86x_L2_EXT_READ_FULL",
1872         "",
1873         "T86x_L2_EXT_WRITE_FULL",
1874         "T86x_L2_EXT_R_W_HAZARD",
1875         "T86x_L2_EXT_READ",
1876         "T86x_L2_EXT_READ_LINE",
1877         "T86x_L2_EXT_WRITE",
1878         "T86x_L2_EXT_WRITE_LINE",
1879         "T86x_L2_EXT_WRITE_SMALL",
1880         "T86x_L2_EXT_BARRIER",
1881         "T86x_L2_EXT_AR_STALL",
1882         "T86x_L2_EXT_R_BUF_FULL",
1883         "T86x_L2_EXT_RD_BUF_FULL",
1884         "T86x_L2_EXT_R_RAW",
1885         "T86x_L2_EXT_W_STALL",
1886         "T86x_L2_EXT_W_BUF_FULL",
1887         "T86x_L2_EXT_R_BUF_FULL",
1888         "T86x_L2_TAG_HAZARD",
1889         "T86x_L2_SNOOP_FULL",
1890         "T86x_L2_REPLAY_FULL"
1891 };
1892
1893 static const char * const hardware_counters_mali_t88x[] = {
1894         /* Job Manager */
1895         "",
1896         "",
1897         "",
1898         "",
1899         "T88x_MESSAGES_SENT",
1900         "T88x_MESSAGES_RECEIVED",
1901         "T88x_GPU_ACTIVE",
1902         "T88x_IRQ_ACTIVE",
1903         "T88x_JS0_JOBS",
1904         "T88x_JS0_TASKS",
1905         "T88x_JS0_ACTIVE",
1906         "",
1907         "T88x_JS0_WAIT_READ",
1908         "T88x_JS0_WAIT_ISSUE",
1909         "T88x_JS0_WAIT_DEPEND",
1910         "T88x_JS0_WAIT_FINISH",
1911         "T88x_JS1_JOBS",
1912         "T88x_JS1_TASKS",
1913         "T88x_JS1_ACTIVE",
1914         "",
1915         "T88x_JS1_WAIT_READ",
1916         "T88x_JS1_WAIT_ISSUE",
1917         "T88x_JS1_WAIT_DEPEND",
1918         "T88x_JS1_WAIT_FINISH",
1919         "T88x_JS2_JOBS",
1920         "T88x_JS2_TASKS",
1921         "T88x_JS2_ACTIVE",
1922         "",
1923         "T88x_JS2_WAIT_READ",
1924         "T88x_JS2_WAIT_ISSUE",
1925         "T88x_JS2_WAIT_DEPEND",
1926         "T88x_JS2_WAIT_FINISH",
1927         "",
1928         "",
1929         "",
1930         "",
1931         "",
1932         "",
1933         "",
1934         "",
1935         "",
1936         "",
1937         "",
1938         "",
1939         "",
1940         "",
1941         "",
1942         "",
1943         "",
1944         "",
1945         "",
1946         "",
1947         "",
1948         "",
1949         "",
1950         "",
1951         "",
1952         "",
1953         "",
1954         "",
1955         "",
1956         "",
1957         "",
1958         "",
1959
1960         /*Tiler */
1961         "",
1962         "",
1963         "",
1964         "T88x_TI_JOBS_PROCESSED",
1965         "T88x_TI_TRIANGLES",
1966         "T88x_TI_QUADS",
1967         "T88x_TI_POLYGONS",
1968         "T88x_TI_POINTS",
1969         "T88x_TI_LINES",
1970         "T88x_TI_VCACHE_HIT",
1971         "T88x_TI_VCACHE_MISS",
1972         "T88x_TI_FRONT_FACING",
1973         "T88x_TI_BACK_FACING",
1974         "T88x_TI_PRIM_VISIBLE",
1975         "T88x_TI_PRIM_CULLED",
1976         "T88x_TI_PRIM_CLIPPED",
1977         "T88x_TI_LEVEL0",
1978         "T88x_TI_LEVEL1",
1979         "T88x_TI_LEVEL2",
1980         "T88x_TI_LEVEL3",
1981         "T88x_TI_LEVEL4",
1982         "T88x_TI_LEVEL5",
1983         "T88x_TI_LEVEL6",
1984         "T88x_TI_LEVEL7",
1985         "T88x_TI_COMMAND_1",
1986         "T88x_TI_COMMAND_2",
1987         "T88x_TI_COMMAND_3",
1988         "T88x_TI_COMMAND_4",
1989         "T88x_TI_COMMAND_5_7",
1990         "T88x_TI_COMMAND_8_15",
1991         "T88x_TI_COMMAND_16_63",
1992         "T88x_TI_COMMAND_64",
1993         "T88x_TI_COMPRESS_IN",
1994         "T88x_TI_COMPRESS_OUT",
1995         "T88x_TI_COMPRESS_FLUSH",
1996         "T88x_TI_TIMESTAMPS",
1997         "T88x_TI_PCACHE_HIT",
1998         "T88x_TI_PCACHE_MISS",
1999         "T88x_TI_PCACHE_LINE",
2000         "T88x_TI_PCACHE_STALL",
2001         "T88x_TI_WRBUF_HIT",
2002         "T88x_TI_WRBUF_MISS",
2003         "T88x_TI_WRBUF_LINE",
2004         "T88x_TI_WRBUF_PARTIAL",
2005         "T88x_TI_WRBUF_STALL",
2006         "T88x_TI_ACTIVE",
2007         "T88x_TI_LOADING_DESC",
2008         "T88x_TI_INDEX_WAIT",
2009         "T88x_TI_INDEX_RANGE_WAIT",
2010         "T88x_TI_VERTEX_WAIT",
2011         "T88x_TI_PCACHE_WAIT",
2012         "T88x_TI_WRBUF_WAIT",
2013         "T88x_TI_BUS_READ",
2014         "T88x_TI_BUS_WRITE",
2015         "",
2016         "",
2017         "",
2018         "",
2019         "",
2020         "T88x_TI_UTLB_HIT",
2021         "T88x_TI_UTLB_NEW_MISS",
2022         "T88x_TI_UTLB_REPLAY_FULL",
2023         "T88x_TI_UTLB_REPLAY_MISS",
2024         "T88x_TI_UTLB_STALL",
2025
2026         /* Shader Core */
2027         "",
2028         "",
2029         "",
2030         "",
2031         "T88x_FRAG_ACTIVE",
2032         "T88x_FRAG_PRIMITIVES",
2033         "T88x_FRAG_PRIMITIVES_DROPPED",
2034         "T88x_FRAG_CYCLES_DESC",
2035         "T88x_FRAG_CYCLES_FPKQ_ACTIVE",
2036         "T88x_FRAG_CYCLES_VERT",
2037         "T88x_FRAG_CYCLES_TRISETUP",
2038         "T88x_FRAG_CYCLES_EZS_ACTIVE",
2039         "T88x_FRAG_THREADS",
2040         "T88x_FRAG_DUMMY_THREADS",
2041         "T88x_FRAG_QUADS_RAST",
2042         "T88x_FRAG_QUADS_EZS_TEST",
2043         "T88x_FRAG_QUADS_EZS_KILLED",
2044         "T88x_FRAG_THREADS_LZS_TEST",
2045         "T88x_FRAG_THREADS_LZS_KILLED",
2046         "T88x_FRAG_CYCLES_NO_TILE",
2047         "T88x_FRAG_NUM_TILES",
2048         "T88x_FRAG_TRANS_ELIM",
2049         "T88x_COMPUTE_ACTIVE",
2050         "T88x_COMPUTE_TASKS",
2051         "T88x_COMPUTE_THREADS",
2052         "T88x_COMPUTE_CYCLES_DESC",
2053         "T88x_TRIPIPE_ACTIVE",
2054         "T88x_ARITH_WORDS",
2055         "T88x_ARITH_CYCLES_REG",
2056         "T88x_ARITH_CYCLES_L0",
2057         "T88x_ARITH_FRAG_DEPEND",
2058         "T88x_LS_WORDS",
2059         "T88x_LS_ISSUES",
2060         "T88x_LS_REISSUE_ATTR",
2061         "T88x_LS_REISSUES_VARY",
2062         "T88x_LS_VARY_RV_MISS",
2063         "T88x_LS_VARY_RV_HIT",
2064         "T88x_LS_NO_UNPARK",
2065         "T88x_TEX_WORDS",
2066         "T88x_TEX_BUBBLES",
2067         "T88x_TEX_WORDS_L0",
2068         "T88x_TEX_WORDS_DESC",
2069         "T88x_TEX_ISSUES",
2070         "T88x_TEX_RECIRC_FMISS",
2071         "T88x_TEX_RECIRC_DESC",
2072         "T88x_TEX_RECIRC_MULTI",
2073         "T88x_TEX_RECIRC_PMISS",
2074         "T88x_TEX_RECIRC_CONF",
2075         "T88x_LSC_READ_HITS",
2076         "T88x_LSC_READ_OP",
2077         "T88x_LSC_WRITE_HITS",
2078         "T88x_LSC_WRITE_OP",
2079         "T88x_LSC_ATOMIC_HITS",
2080         "T88x_LSC_ATOMIC_OP",
2081         "T88x_LSC_LINE_FETCHES",
2082         "T88x_LSC_DIRTY_LINE",
2083         "T88x_LSC_SNOOPS",
2084         "T88x_AXI_TLB_STALL",
2085         "T88x_AXI_TLB_MISS",
2086         "T88x_AXI_TLB_TRANSACTION",
2087         "T88x_LS_TLB_MISS",
2088         "T88x_LS_TLB_HIT",
2089         "T88x_AXI_BEATS_READ",
2090         "T88x_AXI_BEATS_WRITTEN",
2091
2092         /*L2 and MMU */
2093         "",
2094         "",
2095         "",
2096         "",
2097         "T88x_MMU_HIT",
2098         "T88x_MMU_NEW_MISS",
2099         "T88x_MMU_REPLAY_FULL",
2100         "T88x_MMU_REPLAY_MISS",
2101         "T88x_MMU_TABLE_WALK",
2102         "T88x_MMU_REQUESTS",
2103         "",
2104         "",
2105         "T88x_UTLB_HIT",
2106         "T88x_UTLB_NEW_MISS",
2107         "T88x_UTLB_REPLAY_FULL",
2108         "T88x_UTLB_REPLAY_MISS",
2109         "T88x_UTLB_STALL",
2110         "",
2111         "",
2112         "",
2113         "",
2114         "",
2115         "",
2116         "",
2117         "",
2118         "",
2119         "",
2120         "",
2121         "",
2122         "",
2123         "T88x_L2_EXT_WRITE_BEATS",
2124         "T88x_L2_EXT_READ_BEATS",
2125         "T88x_L2_ANY_LOOKUP",
2126         "T88x_L2_READ_LOOKUP",
2127         "T88x_L2_SREAD_LOOKUP",
2128         "T88x_L2_READ_REPLAY",
2129         "T88x_L2_READ_SNOOP",
2130         "T88x_L2_READ_HIT",
2131         "T88x_L2_CLEAN_MISS",
2132         "T88x_L2_WRITE_LOOKUP",
2133         "T88x_L2_SWRITE_LOOKUP",
2134         "T88x_L2_WRITE_REPLAY",
2135         "T88x_L2_WRITE_SNOOP",
2136         "T88x_L2_WRITE_HIT",
2137         "T88x_L2_EXT_READ_FULL",
2138         "",
2139         "T88x_L2_EXT_WRITE_FULL",
2140         "T88x_L2_EXT_R_W_HAZARD",
2141         "T88x_L2_EXT_READ",
2142         "T88x_L2_EXT_READ_LINE",
2143         "T88x_L2_EXT_WRITE",
2144         "T88x_L2_EXT_WRITE_LINE",
2145         "T88x_L2_EXT_WRITE_SMALL",
2146         "T88x_L2_EXT_BARRIER",
2147         "T88x_L2_EXT_AR_STALL",
2148         "T88x_L2_EXT_R_BUF_FULL",
2149         "T88x_L2_EXT_RD_BUF_FULL",
2150         "T88x_L2_EXT_R_RAW",
2151         "T88x_L2_EXT_W_STALL",
2152         "T88x_L2_EXT_W_BUF_FULL",
2153         "T88x_L2_EXT_R_BUF_FULL",
2154         "T88x_L2_TAG_HAZARD",
2155         "T88x_L2_SNOOP_FULL",
2156         "T88x_L2_REPLAY_FULL"
2157 };
2158
2159 #include "mali_kbase_gator_hwcnt_names_tmix.h"
2160
2161 #include "mali_kbase_gator_hwcnt_names_thex.h"
2162
2163
2164 #endif