2 * Copyright (C) 2010, 2012-2015 ARM Limited. All rights reserved.
4 * This program is free software and is provided to you under the terms of the GNU General Public License version 2
5 * as published by the Free Software Foundation, and any use by you of this program is subject to the terms of such GNU licence.
7 * A copy of the licence is included with the program, and can also be obtained from Free Software
8 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
11 #ifndef _MALIGP2_CONROL_REGS_H_
12 #define _MALIGP2_CONROL_REGS_H_
15 * These are the different geometry processor control registers.
16 * Their usage is to control and monitor the operation of the
17 * Vertex Shader and the Polygon List Builder in the geometry processor.
18 * Addresses are in 32-bit word relative sizes.
19 * @see [P0081] "Geometry Processor Data Structures" for details
23 MALIGP2_REG_ADDR_MGMT_VSCL_START_ADDR = 0x00,
24 MALIGP2_REG_ADDR_MGMT_VSCL_END_ADDR = 0x04,
25 MALIGP2_REG_ADDR_MGMT_PLBUCL_START_ADDR = 0x08,
26 MALIGP2_REG_ADDR_MGMT_PLBUCL_END_ADDR = 0x0c,
27 MALIGP2_REG_ADDR_MGMT_PLBU_ALLOC_START_ADDR = 0x10,
28 MALIGP2_REG_ADDR_MGMT_PLBU_ALLOC_END_ADDR = 0x14,
29 MALIGP2_REG_ADDR_MGMT_CMD = 0x20,
30 MALIGP2_REG_ADDR_MGMT_INT_RAWSTAT = 0x24,
31 MALIGP2_REG_ADDR_MGMT_INT_CLEAR = 0x28,
32 MALIGP2_REG_ADDR_MGMT_INT_MASK = 0x2C,
33 MALIGP2_REG_ADDR_MGMT_INT_STAT = 0x30,
34 MALIGP2_REG_ADDR_MGMT_PERF_CNT_0_ENABLE = 0x3C,
35 MALIGP2_REG_ADDR_MGMT_PERF_CNT_1_ENABLE = 0x40,
36 MALIGP2_REG_ADDR_MGMT_PERF_CNT_0_SRC = 0x44,
37 MALIGP2_REG_ADDR_MGMT_PERF_CNT_1_SRC = 0x48,
38 MALIGP2_REG_ADDR_MGMT_PERF_CNT_0_VALUE = 0x4C,
39 MALIGP2_REG_ADDR_MGMT_PERF_CNT_1_VALUE = 0x50,
40 MALIGP2_REG_ADDR_MGMT_PERF_CNT_0_LIMIT = 0x54,
41 MALIGP2_REG_ADDR_MGMT_STATUS = 0x68,
42 MALIGP2_REG_ADDR_MGMT_VERSION = 0x6C,
43 MALIGP2_REG_ADDR_MGMT_VSCL_START_ADDR_READ = 0x80,
44 MALIGP2_REG_ADDR_MGMT_PLBCL_START_ADDR_READ = 0x84,
45 MALIGP2_CONTR_AXI_BUS_ERROR_STAT = 0x94,
46 MALIGP2_REGISTER_ADDRESS_SPACE_SIZE = 0x98,
47 } maligp_reg_addr_mgmt_addr;
49 #define MALIGP2_REG_VAL_PERF_CNT_ENABLE 1
52 * Commands to geometry processor.
53 * @see MALIGP2_CTRL_REG_CMD
56 MALIGP2_REG_VAL_CMD_START_VS = (1 << 0),
57 MALIGP2_REG_VAL_CMD_START_PLBU = (1 << 1),
58 MALIGP2_REG_VAL_CMD_UPDATE_PLBU_ALLOC = (1 << 4),
59 MALIGP2_REG_VAL_CMD_RESET = (1 << 5),
60 MALIGP2_REG_VAL_CMD_FORCE_HANG = (1 << 6),
61 MALIGP2_REG_VAL_CMD_STOP_BUS = (1 << 9),
62 MALI400GP_REG_VAL_CMD_SOFT_RESET = (1 << 10), /* only valid for Mali-300 and later */
63 } mgp_contr_reg_val_cmd;
66 /** @defgroup MALIGP2_IRQ
67 * Interrupt status of geometry processor.
68 * @see MALIGP2_CTRL_REG_INT_RAWSTAT, MALIGP2_REG_ADDR_MGMT_INT_CLEAR,
69 * MALIGP2_REG_ADDR_MGMT_INT_MASK, MALIGP2_REG_ADDR_MGMT_INT_STAT
72 #define MALIGP2_REG_VAL_IRQ_VS_END_CMD_LST (1 << 0)
73 #define MALIGP2_REG_VAL_IRQ_PLBU_END_CMD_LST (1 << 1)
74 #define MALIGP2_REG_VAL_IRQ_PLBU_OUT_OF_MEM (1 << 2)
75 #define MALIGP2_REG_VAL_IRQ_VS_SEM_IRQ (1 << 3)
76 #define MALIGP2_REG_VAL_IRQ_PLBU_SEM_IRQ (1 << 4)
77 #define MALIGP2_REG_VAL_IRQ_HANG (1 << 5)
78 #define MALIGP2_REG_VAL_IRQ_FORCE_HANG (1 << 6)
79 #define MALIGP2_REG_VAL_IRQ_PERF_CNT_0_LIMIT (1 << 7)
80 #define MALIGP2_REG_VAL_IRQ_PERF_CNT_1_LIMIT (1 << 8)
81 #define MALIGP2_REG_VAL_IRQ_WRITE_BOUND_ERR (1 << 9)
82 #define MALIGP2_REG_VAL_IRQ_SYNC_ERROR (1 << 10)
83 #define MALIGP2_REG_VAL_IRQ_AXI_BUS_ERROR (1 << 11)
84 #define MALI400GP_REG_VAL_IRQ_AXI_BUS_STOPPED (1 << 12)
85 #define MALI400GP_REG_VAL_IRQ_VS_INVALID_CMD (1 << 13)
86 #define MALI400GP_REG_VAL_IRQ_PLB_INVALID_CMD (1 << 14)
87 #define MALI400GP_REG_VAL_IRQ_RESET_COMPLETED (1 << 19)
88 #define MALI400GP_REG_VAL_IRQ_SEMAPHORE_UNDERFLOW (1 << 20)
89 #define MALI400GP_REG_VAL_IRQ_SEMAPHORE_OVERFLOW (1 << 21)
90 #define MALI400GP_REG_VAL_IRQ_PTR_ARRAY_OUT_OF_BOUNDS (1 << 22)
92 /* Mask defining all IRQs in Mali GP */
93 #define MALIGP2_REG_VAL_IRQ_MASK_ALL \
95 MALIGP2_REG_VAL_IRQ_VS_END_CMD_LST | \
96 MALIGP2_REG_VAL_IRQ_PLBU_END_CMD_LST | \
97 MALIGP2_REG_VAL_IRQ_PLBU_OUT_OF_MEM | \
98 MALIGP2_REG_VAL_IRQ_VS_SEM_IRQ | \
99 MALIGP2_REG_VAL_IRQ_PLBU_SEM_IRQ | \
100 MALIGP2_REG_VAL_IRQ_HANG | \
101 MALIGP2_REG_VAL_IRQ_FORCE_HANG | \
102 MALIGP2_REG_VAL_IRQ_PERF_CNT_0_LIMIT | \
103 MALIGP2_REG_VAL_IRQ_PERF_CNT_1_LIMIT | \
104 MALIGP2_REG_VAL_IRQ_WRITE_BOUND_ERR | \
105 MALIGP2_REG_VAL_IRQ_SYNC_ERROR | \
106 MALIGP2_REG_VAL_IRQ_AXI_BUS_ERROR | \
107 MALI400GP_REG_VAL_IRQ_AXI_BUS_STOPPED | \
108 MALI400GP_REG_VAL_IRQ_VS_INVALID_CMD | \
109 MALI400GP_REG_VAL_IRQ_PLB_INVALID_CMD | \
110 MALI400GP_REG_VAL_IRQ_RESET_COMPLETED | \
111 MALI400GP_REG_VAL_IRQ_SEMAPHORE_UNDERFLOW | \
112 MALI400GP_REG_VAL_IRQ_SEMAPHORE_OVERFLOW | \
113 MALI400GP_REG_VAL_IRQ_PTR_ARRAY_OUT_OF_BOUNDS)
115 /* Mask defining the IRQs in Mali GP which we use */
116 #define MALIGP2_REG_VAL_IRQ_MASK_USED \
118 MALIGP2_REG_VAL_IRQ_VS_END_CMD_LST | \
119 MALIGP2_REG_VAL_IRQ_PLBU_END_CMD_LST | \
120 MALIGP2_REG_VAL_IRQ_PLBU_OUT_OF_MEM | \
121 MALIGP2_REG_VAL_IRQ_FORCE_HANG | \
122 MALIGP2_REG_VAL_IRQ_WRITE_BOUND_ERR | \
123 MALIGP2_REG_VAL_IRQ_SYNC_ERROR | \
124 MALIGP2_REG_VAL_IRQ_AXI_BUS_ERROR | \
125 MALI400GP_REG_VAL_IRQ_VS_INVALID_CMD | \
126 MALI400GP_REG_VAL_IRQ_PLB_INVALID_CMD | \
127 MALI400GP_REG_VAL_IRQ_SEMAPHORE_UNDERFLOW | \
128 MALI400GP_REG_VAL_IRQ_SEMAPHORE_OVERFLOW | \
129 MALI400GP_REG_VAL_IRQ_PTR_ARRAY_OUT_OF_BOUNDS)
131 /* Mask defining non IRQs on MaliGP2*/
132 #define MALIGP2_REG_VAL_IRQ_MASK_NONE 0
134 /** }@ defgroup MALIGP2_IRQ*/
136 /** @defgroup MALIGP2_STATUS
137 * The different Status values to the geometry processor.
138 * @see MALIGP2_CTRL_REG_STATUS
141 #define MALIGP2_REG_VAL_STATUS_VS_ACTIVE 0x0002
142 #define MALIGP2_REG_VAL_STATUS_BUS_STOPPED 0x0004
143 #define MALIGP2_REG_VAL_STATUS_PLBU_ACTIVE 0x0008
144 #define MALIGP2_REG_VAL_STATUS_BUS_ERROR 0x0040
145 #define MALIGP2_REG_VAL_STATUS_WRITE_BOUND_ERR 0x0100
146 /** }@ defgroup MALIGP2_STATUS*/
148 #define MALIGP2_REG_VAL_STATUS_MASK_ACTIVE (\
149 MALIGP2_REG_VAL_STATUS_VS_ACTIVE|\
150 MALIGP2_REG_VAL_STATUS_PLBU_ACTIVE)
153 #define MALIGP2_REG_VAL_STATUS_MASK_ERROR (\
154 MALIGP2_REG_VAL_STATUS_BUS_ERROR |\
155 MALIGP2_REG_VAL_STATUS_WRITE_BOUND_ERR )
157 /* This should be in the top 16 bit of the version register of gp.*/
158 #define MALI200_GP_PRODUCT_ID 0xA07
159 #define MALI300_GP_PRODUCT_ID 0xC07
160 #define MALI400_GP_PRODUCT_ID 0xB07
161 #define MALI450_GP_PRODUCT_ID 0xD07
164 * The different sources for instrumented on the geometry processor.
165 * @see MALIGP2_REG_ADDR_MGMT_PERF_CNT_0_SRC
168 enum MALIGP2_cont_reg_perf_cnt_src {
169 MALIGP2_REG_VAL_PERF_CNT1_SRC_NUMBER_OF_VERTICES_PROCESSED = 0x0a,