arch/arm64/kernel/setup.c

   1 /*
   2  * Based on arch/arm/kernel/setup.c
   3  *
   4  * Copyright (C) 1995-2001 Russell King
   5  * Copyright (C) 2012 ARM Ltd.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/export.h>
  21 #include <linux/kernel.h>
  22 #include <linux/stddef.h>
  23 #include <linux/ioport.h>
  24 #include <linux/delay.h>
  25 #include <linux/utsname.h>
  26 #include <linux/initrd.h>
  27 #include <linux/console.h>
  28 #include <linux/bootmem.h>
  29 #include <linux/seq_file.h>
  30 #include <linux/screen_info.h>
  31 #include <linux/init.h>
  32 #include <linux/kexec.h>
  33 #include <linux/crash_dump.h>
  34 #include <linux/root_dev.h>
  35 #include <linux/clk-provider.h>
  36 #include <linux/cpu.h>
  37 #include <linux/interrupt.h>
  38 #include <linux/smp.h>
  39 #include <linux/fs.h>
  40 #include <linux/proc_fs.h>
  41 #include <linux/memblock.h>
  42 #include <linux/of_fdt.h>
  43 #include <linux/of_platform.h>
  44 #include <linux/efi.h>
  45 #include <linux/personality.h>
  46
  47 #include <asm/fixmap.h>
  48 #include <asm/cputype.h>
  49 #include <asm/elf.h>
  50 #include <asm/cputable.h>
  51 #include <asm/cpu_ops.h>
  52 #include <asm/sections.h>
  53 #include <asm/setup.h>
  54 #include <asm/smp_plat.h>
  55 #include <asm/cacheflush.h>
  56 #include <asm/tlbflush.h>
  57 #include <asm/traps.h>
  58 #include <asm/memblock.h>
  59 #include <asm/psci.h>
  60 #include <asm/efi.h>
  61
  62 unsigned int processor_id;
  63 EXPORT_SYMBOL(processor_id);
  64
  65 unsigned long elf_hwcap __read_mostly;
  66 EXPORT_SYMBOL_GPL(elf_hwcap);
  67
  68 #ifdef CONFIG_COMPAT
  69 #define COMPAT_ELF_HWCAP_DEFAULT        \
  70                                 (COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\
  71                                  COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\
  72                                  COMPAT_HWCAP_TLS|COMPAT_HWCAP_VFP|\
  73                                  COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\
  74                                  COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV)
  75 unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT;
  76 unsigned int compat_elf_hwcap2 __read_mostly;
  77 #endif
  78
  79 static const char *cpu_name;
  80 static const char *machine_name;
  81 phys_addr_t __fdt_pointer __initdata;
  82
  83 /*
  84  * Standard memory resources
  85  */
  86 static struct resource mem_res[] = {
  87         {
  88                 .name = "Kernel code",
  89                 .start = 0,
  90                 .end = 0,
  91                 .flags = IORESOURCE_MEM
  92         },
  93         {
  94                 .name = "Kernel data",
  95                 .start = 0,
  96                 .end = 0,
  97                 .flags = IORESOURCE_MEM
  98         }
  99 };
 100
 101 #define kernel_code mem_res[0]
 102 #define kernel_data mem_res[1]
 103
 104 void __init early_print(const char *str, ...)
 105 {
 106         char buf[256];
 107         va_list ap;
 108
 109         va_start(ap, str);
 110         vsnprintf(buf, sizeof(buf), str, ap);
 111         va_end(ap);
 112
 113         printk("%s", buf);
 114 }
 115
 116 struct cpuinfo_arm64 {
 117         struct cpu      cpu;
 118         u32             reg_midr;
 119 };
 120
 121 static DEFINE_PER_CPU(struct cpuinfo_arm64, cpu_data);
 122
 123 void cpuinfo_store_cpu(void)
 124 {
 125         struct cpuinfo_arm64 *info = this_cpu_ptr(&cpu_data);
 126         info->reg_midr = read_cpuid_id();
 127 }
 128
 129 void __init smp_setup_processor_id(void)
 130 {
 131         /*
 132          * clear __my_cpu_offset on boot CPU to avoid hang caused by
 133          * using percpu variable early, for example, lockdep will
 134          * access percpu variable inside lock_release
 135          */
 136         set_my_cpu_offset(0);
 137 }
 138
 139 bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
 140 {
 141         return phys_id == cpu_logical_map(cpu);
 142 }
 143
 144 struct mpidr_hash mpidr_hash;
 145 #ifdef CONFIG_SMP
 146 /**
 147  * smp_build_mpidr_hash - Pre-compute shifts required at each affinity
 148  *                        level in order to build a linear index from an
 149  *                        MPIDR value. Resulting algorithm is a collision
 150  *                        free hash carried out through shifting and ORing
 151  */
 152 static void __init smp_build_mpidr_hash(void)
 153 {
 154         u32 i, affinity, fs[4], bits[4], ls;
 155         u64 mask = 0;
 156         /*
 157          * Pre-scan the list of MPIDRS and filter out bits that do
 158          * not contribute to affinity levels, ie they never toggle.
 159          */
 160         for_each_possible_cpu(i)
 161                 mask |= (cpu_logical_map(i) ^ cpu_logical_map(0));
 162         pr_debug("mask of set bits %#llx\n", mask);
 163         /*
 164          * Find and stash the last and first bit set at all affinity levels to
 165          * check how many bits are required to represent them.
 166          */
 167         for (i = 0; i < 4; i++) {
 168                 affinity = MPIDR_AFFINITY_LEVEL(mask, i);
 169                 /*
 170                  * Find the MSB bit and LSB bits position
 171                  * to determine how many bits are required
 172                  * to express the affinity level.
 173                  */
 174                 ls = fls(affinity);
 175                 fs[i] = affinity ? ffs(affinity) - 1 : 0;
 176                 bits[i] = ls - fs[i];
 177         }
 178         /*
 179          * An index can be created from the MPIDR_EL1 by isolating the
 180          * significant bits at each affinity level and by shifting
 181          * them in order to compress the 32 bits values space to a
 182          * compressed set of values. This is equivalent to hashing
 183          * the MPIDR_EL1 through shifting and ORing. It is a collision free
 184          * hash though not minimal since some levels might contain a number
 185          * of CPUs that is not an exact power of 2 and their bit
 186          * representation might contain holes, eg MPIDR_EL1[7:0] = {0x2, 0x80}.
 187          */
 188         mpidr_hash.shift_aff[0] = MPIDR_LEVEL_SHIFT(0) + fs[0];
 189         mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0];
 190         mpidr_hash.shift_aff[2] = MPIDR_LEVEL_SHIFT(2) + fs[2] -
 191                                                 (bits[1] + bits[0]);
 192         mpidr_hash.shift_aff[3] = MPIDR_LEVEL_SHIFT(3) +
 193                                   fs[3] - (bits[2] + bits[1] + bits[0]);
 194         mpidr_hash.mask = mask;
 195         mpidr_hash.bits = bits[3] + bits[2] + bits[1] + bits[0];
 196         pr_debug("MPIDR hash: aff0[%u] aff1[%u] aff2[%u] aff3[%u] mask[%#llx] bits[%u]\n",
 197                 mpidr_hash.shift_aff[0],
 198                 mpidr_hash.shift_aff[1],
 199                 mpidr_hash.shift_aff[2],
 200                 mpidr_hash.shift_aff[3],
 201                 mpidr_hash.mask,
 202                 mpidr_hash.bits);
 203         /*
 204          * 4x is an arbitrary value used to warn on a hash table much bigger
 205          * than expected on most systems.
 206          */
 207         if (mpidr_hash_size() > 4 * num_possible_cpus())
 208                 pr_warn("Large number of MPIDR hash buckets detected\n");
 209         __flush_dcache_area(&mpidr_hash, sizeof(struct mpidr_hash));
 210 }
 211 #endif
 212
 213 static void __init setup_processor(void)
 214 {
 215         struct cpu_info *cpu_info;
 216         u64 features, block;
 217
 218         cpu_info = lookup_processor_type(read_cpuid_id());
 219         if (!cpu_info) {
 220                 printk("CPU configuration botched (ID %08x), unable to continue.\n",
 221                        read_cpuid_id());
 222                 while (1);
 223         }
 224
 225         cpu_name = cpu_info->cpu_name;
 226
 227         printk("CPU: %s [%08x] revision %d\n",
 228                cpu_name, read_cpuid_id(), read_cpuid_id() & 15);
 229
 230         sprintf(init_utsname()->machine, ELF_PLATFORM);
 231         elf_hwcap = 0;
 232
 233         /*
 234          * ID_AA64ISAR0_EL1 contains 4-bit wide signed feature blocks.
 235          * The blocks we test below represent incremental functionality
 236          * for non-negative values. Negative values are reserved.
 237          */
 238         features = read_cpuid(ID_AA64ISAR0_EL1);
 239         block = (features >> 4) & 0xf;
 240         if (!(block & 0x8)) {
 241                 switch (block) {
 242                 default:
 243                 case 2:
 244                         elf_hwcap |= HWCAP_PMULL;
 245                 case 1:
 246                         elf_hwcap |= HWCAP_AES;
 247                 case 0:
 248                         break;
 249                 }
 250         }
 251
 252         block = (features >> 8) & 0xf;
 253         if (block && !(block & 0x8))
 254                 elf_hwcap |= HWCAP_SHA1;
 255
 256         block = (features >> 12) & 0xf;
 257         if (block && !(block & 0x8))
 258                 elf_hwcap |= HWCAP_SHA2;
 259
 260         block = (features >> 16) & 0xf;
 261         if (block && !(block & 0x8))
 262                 elf_hwcap |= HWCAP_CRC32;
 263
 264 #ifdef CONFIG_COMPAT
 265         /*
 266          * ID_ISAR5_EL1 carries similar information as above, but pertaining to
 267          * the Aarch32 32-bit execution state.
 268          */
 269         features = read_cpuid(ID_ISAR5_EL1);
 270         block = (features >> 4) & 0xf;
 271         if (!(block & 0x8)) {
 272                 switch (block) {
 273                 default:
 274                 case 2:
 275                         compat_elf_hwcap2 |= COMPAT_HWCAP2_PMULL;
 276                 case 1:
 277                         compat_elf_hwcap2 |= COMPAT_HWCAP2_AES;
 278                 case 0:
 279                         break;
 280                 }
 281         }
 282
 283         block = (features >> 8) & 0xf;
 284         if (block && !(block & 0x8))
 285                 compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA1;
 286
 287         block = (features >> 12) & 0xf;
 288         if (block && !(block & 0x8))
 289                 compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA2;
 290
 291         block = (features >> 16) & 0xf;
 292         if (block && !(block & 0x8))
 293                 compat_elf_hwcap2 |= COMPAT_HWCAP2_CRC32;
 294 #endif
 295 }
 296
 297 static void __init setup_machine_fdt(phys_addr_t dt_phys)
 298 {
 299         struct boot_param_header *devtree;
 300         unsigned long dt_root;
 301
 302         cpuinfo_store_cpu();
 303
 304         /* Check we have a non-NULL DT pointer */
 305         if (!dt_phys) {
 306                 early_print("\n"
 307                         "Error: NULL or invalid device tree blob\n"
 308                         "The dtb must be 8-byte aligned and passed in the first 512MB of memory\n"
 309                         "\nPlease check your bootloader.\n");
 310
 311                 while (true)
 312                         cpu_relax();
 313
 314         }
 315
 316         devtree = phys_to_virt(dt_phys);
 317
 318         /* Check device tree validity */
 319         if (be32_to_cpu(devtree->magic) != OF_DT_HEADER) {
 320                 early_print("\n"
 321                         "Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n"
 322                         "Expected 0x%x, found 0x%x\n"
 323                         "\nPlease check your bootloader.\n",
 324                         dt_phys, devtree, OF_DT_HEADER,
 325                         be32_to_cpu(devtree->magic));
 326
 327                 while (true)
 328                         cpu_relax();
 329         }
 330
 331         initial_boot_params = devtree;
 332         dt_root = of_get_flat_dt_root();
 333
 334         machine_name = of_get_flat_dt_prop(dt_root, "model", NULL);
 335         if (!machine_name)
 336                 machine_name = of_get_flat_dt_prop(dt_root, "compatible", NULL);
 337         if (!machine_name)
 338                 machine_name = "<unknown>";
 339         pr_info("Machine: %s\n", machine_name);
 340
 341         /* Retrieve various information from the /chosen node */
 342         of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
 343         /* Initialize {size,address}-cells info */
 344         of_scan_flat_dt(early_init_dt_scan_root, NULL);
 345         /* Setup memory, calling early_init_dt_add_memory_arch */
 346         of_scan_flat_dt(early_init_dt_scan_memory, NULL);
 347 }
 348
 349 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
 350 {
 351         base &= PAGE_MASK;
 352         size &= PAGE_MASK;
 353         if (base + size < PHYS_OFFSET) {
 354                 pr_warning("Ignoring memory block 0x%llx - 0x%llx\n",
 355                            base, base + size);
 356                 return;
 357         }
 358         if (base < PHYS_OFFSET) {
 359                 pr_warning("Ignoring memory range 0x%llx - 0x%llx\n",
 360                            base, PHYS_OFFSET);
 361                 size -= PHYS_OFFSET - base;
 362                 base = PHYS_OFFSET;
 363         }
 364         memblock_add(base, size);
 365 }
 366
 367 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
 368 {
 369         return __va(memblock_alloc(size, align));
 370 }
 371
 372 static void __init request_standard_resources(void)
 373 {
 374         struct memblock_region *region;
 375         struct resource *res;
 376
 377         kernel_code.start   = virt_to_phys(_text);
 378         kernel_code.end     = virt_to_phys(_etext - 1);
 379         kernel_data.start   = virt_to_phys(_sdata);
 380         kernel_data.end     = virt_to_phys(_end - 1);
 381
 382         for_each_memblock(memory, region) {
 383                 res = alloc_bootmem_low(sizeof(*res));
 384                 res->name  = "System RAM";
 385                 res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
 386                 res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
 387                 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
 388
 389                 request_resource(&iomem_resource, res);
 390
 391                 if (kernel_code.start >= res->start &&
 392                     kernel_code.end <= res->end)
 393                         request_resource(res, &kernel_code);
 394                 if (kernel_data.start >= res->start &&
 395                     kernel_data.end <= res->end)
 396                         request_resource(res, &kernel_data);
 397         }
 398 }
 399
 400 u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
 401
 402 void __init setup_arch(char **cmdline_p)
 403 {
 404         setup_processor();
 405
 406         setup_machine_fdt(__fdt_pointer);
 407
 408         init_mm.start_code = (unsigned long) _text;
 409         init_mm.end_code   = (unsigned long) _etext;
 410         init_mm.end_data   = (unsigned long) _edata;
 411         init_mm.brk        = (unsigned long) _end;
 412
 413         *cmdline_p = boot_command_line;
 414
 415         early_ioremap_init();
 416
 417         parse_early_param();
 418
 419         efi_init();
 420         arm64_memblock_init();
 421
 422         paging_init();
 423         request_standard_resources();
 424
 425         efi_idmap_init();
 426
 427         unflatten_device_tree();
 428
 429         psci_init();
 430
 431         cpu_logical_map(0) = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
 432         cpu_read_bootcpu_ops();
 433 #ifdef CONFIG_SMP
 434         smp_init_cpus();
 435         smp_build_mpidr_hash();
 436 #endif
 437
 438 #ifdef CONFIG_VT
 439 #if defined(CONFIG_VGA_CONSOLE)
 440         conswitchp = &vga_con;
 441 #elif defined(CONFIG_DUMMY_CONSOLE)
 442         conswitchp = &dummy_con;
 443 #endif
 444 #endif
 445 }
 446
 447 static int __init arm64_device_init(void)
 448 {
 449         of_clk_init(NULL);
 450         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 451         return 0;
 452 }
 453 arch_initcall_sync(arm64_device_init);
 454
 455 static int __init topology_init(void)
 456 {
 457         int i;
 458
 459         for_each_possible_cpu(i) {
 460                 struct cpu *cpu = &per_cpu(cpu_data.cpu, i);
 461                 cpu->hotpluggable = 1;
 462                 register_cpu(cpu, i);
 463         }
 464
 465         return 0;
 466 }
 467 subsys_initcall(topology_init);
 468
 469 static const char *hwcap_str[] = {
 470         "fp",
 471         "asimd",
 472         "evtstrm",
 473         "aes",
 474         "pmull",
 475         "sha1",
 476         "sha2",
 477         "crc32",
 478         NULL
 479 };
 480
 481 #ifdef CONFIG_COMPAT
 482 static const char *compat_hwcap_str[] = {
 483         "swp",
 484         "half",
 485         "thumb",
 486         "26bit",
 487         "fastmult",
 488         "fpa",
 489         "vfp",
 490         "edsp",
 491         "java",
 492         "iwmmxt",
 493         "crunch",
 494         "thumbee",
 495         "neon",
 496         "vfpv3",
 497         "vfpv3d16",
 498         "tls",
 499         "vfpv4",
 500         "idiva",
 501         "idivt",
 502         "vfpd32",
 503         "lpae",
 504         "evtstrm"
 505 };
 506 #endif /* CONFIG_COMPAT */
 507
 508 static int c_show(struct seq_file *m, void *v)
 509 {
 510         int i, j;
 511
 512         for_each_online_cpu(i) {
 513                 struct cpuinfo_arm64 *cpuinfo = &per_cpu(cpu_data, i);
 514                 u32 midr = cpuinfo->reg_midr;
 515
 516                 /*
 517                  * glibc reads /proc/cpuinfo to determine the number of
 518                  * online processors, looking for lines beginning with
 519                  * "processor".  Give glibc what it expects.
 520                  */
 521 #ifdef CONFIG_SMP
 522                 seq_printf(m, "processor\t: %d\n", i);
 523 #endif
 524
 525                 seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
 526                            loops_per_jiffy / (500000UL/HZ),
 527                            loops_per_jiffy / (5000UL/HZ) % 100);
 528
 529                 /*
 530                  * Dump out the common processor features in a single line.
 531                  * Userspace should read the hwcaps with getauxval(AT_HWCAP)
 532                  * rather than attempting to parse this, but there's a body of
 533                  * software which does already (at least for 32-bit).
 534                  */
 535                 seq_puts(m, "Features\t:");
 536                 if (personality(current->personality) == PER_LINUX32 ||
 537                     is_compat_task()) {
 538 #ifdef CONFIG_COMPAT
 539                         for (j = 0; compat_hwcap_str[j]; j++)
 540                                 if (COMPAT_ELF_HWCAP & (1 << j))
 541                                         seq_printf(m, " %s", compat_hwcap_str[j]);
 542 #endif /* CONFIG_COMPAT */
 543                 } else {
 544                         for (j = 0; hwcap_str[j]; j++)
 545                                 if (elf_hwcap & (1 << j))
 546                                         seq_printf(m, " %s", hwcap_str[j]);
 547                 }
 548                 seq_puts(m, "\n");
 549
 550                 seq_printf(m, "CPU implementer\t: 0x%02x\n", (midr >> 24));
 551                 seq_printf(m, "CPU architecture: %s\n",
 552 #if IS_ENABLED(CONFIG_ARMV7_COMPAT_CPUINFO)
 553                                 is_compat_task() ? "8" :
 554 #endif
 555                                 "AArch64");
 556                 seq_printf(m, "CPU variant\t: 0x%x\n", ((midr >> 20) & 0xf));
 557                 seq_printf(m, "CPU part\t: 0x%03x\n", ((midr >> 4) & 0xfff));
 558                 seq_printf(m, "CPU revision\t: %d\n\n", (midr & 0xf));
 559         }
 560
 561         return 0;
 562 }
 563
 564 static void *c_start(struct seq_file *m, loff_t *pos)
 565 {
 566         return *pos < 1 ? (void *)1 : NULL;
 567 }
 568
 569 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 570 {
 571         ++*pos;
 572         return NULL;
 573 }
 574
 575 static void c_stop(struct seq_file *m, void *v)
 576 {
 577 }
 578
 579 const struct seq_operations cpuinfo_op = {
 580         .start  = c_start,
 581         .next   = c_next,
 582         .stop   = c_stop,
 583         .show   = c_show
 584 };