2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include <dt-bindings/sensor-dev.h>
46 #include "rk3399.dtsi"
47 #include "rk3399-android.dtsi"
50 model = "Rockchip RK3399 VR Board";
51 compatible = "rockchip,vr", "rockchip,rk3399";
54 compatible = "pwm-regulator";
55 pwms = <&pwm2 0 25000 0>;
57 rockchip,pwm_voltage = <900000>;
58 regulator-name = "vdd_log";
59 regulator-min-microvolt = <800000>;
60 regulator-max-microvolt = <1400000>;
65 compatible = "regulator-fixed";
66 regulator-name = "vcc_sys";
69 regulator-min-microvolt = <4000000>;
70 regulator-max-microvolt = <4000000>;
72 vcc3v3_sys: vcc3v3-sys {
73 compatible = "regulator-fixed";
74 regulator-name = "vcc3v3_sys";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
81 vcc5v0_host: vcc5v0-host-regulator {
82 compatible = "regulator-fixed";
84 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
85 pinctrl-names = "default";
86 pinctrl-0 = <&host_vbus_drv>;
87 regulator-name = "vcc5v0_host";
90 backlight: backlight {
91 compatible = "pwm-backlight";
92 pwms = <&pwm0 0 25000 0>;
96 16 17 18 19 20 21 22 23
97 24 25 26 27 28 29 30 31
98 32 33 34 35 36 37 38 39
99 40 41 42 43 44 45 46 47
100 48 49 50 51 52 53 54 55
101 56 57 58 59 60 61 62 63
102 64 65 66 67 68 69 70 71
103 72 73 74 75 76 77 78 79
104 80 81 82 83 84 85 86 87
105 88 89 90 91 92 93 94 95
106 96 97 98 99 100 101 102 103
107 104 105 106 107 108 109 110 111
108 112 113 114 115 116 117 118 119
109 120 121 122 123 124 125 126 127
110 128 129 130 131 132 133 134 135
111 136 137 138 139 140 141 142 143
112 144 145 146 147 148 149 150 151
113 152 153 154 155 156 157 158 159
114 160 161 162 163 164 165 166 167
115 168 169 170 171 172 173 174 175
116 176 177 178 179 180 181 182 183
117 184 185 186 187 188 189 190 191
118 192 193 194 195 196 197 198 199
119 200 201 202 203 204 205 206 207
120 208 209 210 211 212 213 214 215
121 216 217 218 219 220 221 222 223
122 224 225 226 227 228 229 230 231
123 232 233 234 235 236 237 238 239
124 240 241 242 243 244 245 246 247
125 248 249 250 251 252 253 254 255>;
126 default-brightness-level = <100>;
129 vcc_phy: vcc-phy-regulator {
130 compatible = "regulator-fixed";
131 regulator-name = "vcc_phy";
137 compatible = "rockchip,rk3399-io-voltage-domain";
138 rockchip,grf = <&grf>;
140 bt656-supply = <&vcc1v8_dvp>;
141 audio-supply = <&vcca1v8_codec>;
142 sdmmc-supply = <&vcc_sd>;
143 gpio1830-supply = <&vcc_3v0>;
147 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
148 rockchip,grf = <&pmugrf>;
150 pmu1830-supply = <&vcc_1v8>;
154 compatible = "simple-audio-card";
155 simple-audio-card,format = "i2s";
156 simple-audio-card,name = "rockchip,es8316-codec";
157 simple-audio-card,mclk-fs = <256>;
158 simple-audio-card,widgets =
159 "Microphone", "Mic Jack",
160 "Headphone", "Headphone Jack";
161 simple-audio-card,routing =
162 "Mic Jack", "MICBIAS1",
164 "Headphone Jack", "HPOL",
165 "Headphone Jack", "HPOR";
166 simple-audio-card,cpu {
169 simple-audio-card,codec {
170 sound-dai = <&es8316>;
175 compatible = "simple-audio-card";
176 simple-audio-card,name = "rockchip,spdif";
177 simple-audio-card,cpu {
178 sound-dai = <&spdif>;
180 simple-audio-card,codec {
181 sound-dai = <&spdif_out>;
185 spdif_out: spdif-out {
186 compatible = "linux,spdif-dit";
187 #sound-dai-cells = <0>;
190 sdio_pwrseq: sdio-pwrseq {
191 compatible = "mmc-pwrseq-simple";
193 clock-names = "ext_clock";
194 pinctrl-names = "default";
195 pinctrl-0 = <&wifi_enable_h>;
198 * On the module itself this is one of these (depending
199 * on the actual card populated):
200 * - SDIO_RESET_L_WL_REG_ON
201 * - PDN (power down when low)
203 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
207 compatible = "wlan-platdata";
208 rockchip,grf = <&grf>;
209 wifi_chip_type = "ap6330";
211 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
216 compatible = "bluetooth-platdata";
218 clock-names = "ext_clock";
219 //wifi-bt-power-toggle;
220 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
221 pinctrl-names = "default", "rts_gpio";
222 pinctrl-0 = <&uart0_rts>;
223 pinctrl-1 = <&uart0_gpios>;
224 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
225 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
226 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
227 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
232 compatible = "rockchip,uboot-charge";
233 rockchip,uboot-charge-on = <0>;
234 rockchip,android-charge-on = <1>;
237 rk_vr_key: rockchip-vr-key {
238 compatible = "rockchip,key";
241 io-channels = <&saradc 1>;
245 label = "volume down";
246 rockchip,adc_value = <170>;
252 rockchip,adc_value = <340>;
258 rockchip,adc_value = <420>;
264 rockchip,adc_value = <520>;
268 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
277 rockchip,adc_value = <620>;
283 rockchip,adc_value = <700>;
289 rockchip,adc_value = <780>;
294 compatible = "rockchip_headset";
295 headset_gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
296 pinctrl-names = "default";
297 pinctrl-0 = <&hp_det>;
298 io-channels = <&saradc 2>;
304 opp-hz = /bits/ 64 <408000000>;
305 opp-microvolt = <800000>;
306 clock-latency-ns = <40000>;
309 opp-hz = /bits/ 64 <600000000>;
310 opp-microvolt = <800000>;
311 clock-latency-ns = <40000>;
314 opp-hz = /bits/ 64 <816000000>;
315 opp-microvolt = <800000>;
316 clock-latency-ns = <40000>;
319 opp-hz = /bits/ 64 <1008000000>;
320 opp-microvolt = <850000>;
321 clock-latency-ns = <40000>;
324 opp-hz = /bits/ 64 <1200000000>;
325 opp-microvolt = <925000>;
326 clock-latency-ns = <40000>;
329 opp-hz = /bits/ 64 <1416000000>;
330 opp-microvolt = <1075000>;
331 clock-latency-ns = <40000>;
334 opp-hz = /bits/ 64 <1512000000>;
335 opp-microvolt = <1100000>;
336 clock-latency-ns = <40000>;
343 opp-hz = /bits/ 64 <408000000>;
344 opp-microvolt = <800000>;
345 clock-latency-ns = <40000>;
348 opp-hz = /bits/ 64 <600000000>;
349 opp-microvolt = <800000>;
350 clock-latency-ns = <40000>;
353 opp-hz = /bits/ 64 <816000000>;
354 opp-microvolt = <825000>;
355 clock-latency-ns = <40000>;
358 opp-hz = /bits/ 64 <1008000000>;
359 opp-microvolt = <850000>;
360 clock-latency-ns = <40000>;
363 opp-hz = /bits/ 64 <1200000000>;
364 opp-microvolt = <900000>;
365 clock-latency-ns = <40000>;
368 opp-hz = /bits/ 64 <1416000000>;
369 opp-microvolt = <1000000>;
370 clock-latency-ns = <40000>;
373 opp-hz = /bits/ 64 <1608000000>;
374 opp-microvolt = <1050000>;
375 clock-latency-ns = <40000>;
378 opp-hz = /bits/ 64 <1800000000>;
379 opp-microvolt = <1150000>;
380 clock-latency-ns = <40000>;
383 opp-hz = /bits/ 64 <1992000000>;
384 opp-microvolt = <1225000>;
385 clock-latency-ns = <40000>;
394 518 335 /* 1008MHz */
395 617 428 /* 1200MHz */
396 728 573 /* 1416MHz */
397 827 724 /* 1608MHz */
398 925 900 /* 1800MHz */
399 1024 1108 /* 1992MHz */
430 518 335 /* 1008MHz */
431 617 428 /* 1200MHz */
432 728 573 /* 1416MHz */
433 827 724 /* 1608MHz */
434 925 900 /* 1800MHz */
435 1024 1108 /* 1992MHz */
462 compatible = "operating-points-v2";
465 opp-hz = /bits/ 64 <200000000>;
466 opp-microvolt = <825000>;
470 opp-hz = /bits/ 64 <300000000>;
471 opp-microvolt = <850000>;
474 opp-hz = /bits/ 64 <400000000>;
475 opp-microvolt = <875000>;
478 opp-hz = /bits/ 64 <500000000>;
479 opp-microvolt = <950000>;
482 opp-hz = /bits/ 64 <600000000>;
483 opp-microvolt = <1025000>;
486 opp-hz = /bits/ 64 <800000000>;
487 opp-microvolt = <1125000>;
492 clock-frequency = <150000000>;
493 clock-freq-min-max = <400000 150000000>;
501 vqmmc-supply = <&vcc_sd>;
502 pinctrl-names = "default";
503 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
508 clock-frequency = <50000000>;
509 clock-freq-min-max = <200000 50000000>;
515 keep-power-in-suspend;
516 mmc-pwrseq = <&sdio_pwrseq>;
519 pinctrl-names = "default";
520 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
534 keep-power-in-suspend;
535 mmc-hs400-enhanced-strobe;
541 rockchip,i2s-broken-burst-len;
542 rockchip,playback-channels = <8>;
543 rockchip,capture-channels = <8>;
544 #sound-dai-cells = <0>;
548 #sound-dai-cells = <0>;
553 #sound-dai-cells = <0>;
558 i2c-scl-rising-time-ns = <219>;
559 i2c-scl-falling-time-ns = <15>;
560 clock-frequency = <400000>;
562 vdd_cpu_b: syr827@40 {
563 compatible = "silergy,syr827";
565 vin-supply = <&vcc_sys>;
566 regulator-compatible = "fan53555-reg";
567 pinctrl-0 = <&vsel1_gpio>;
568 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
569 regulator-name = "vdd_cpu_b";
570 regulator-min-microvolt = <712500>;
571 regulator-max-microvolt = <1500000>;
572 regulator-ramp-delay = <1000>;
573 fcs,suspend-voltage-selector = <1>;
575 regulator-initial-state = <3>;
576 regulator-state-mem {
577 regulator-off-in-suspend;
582 compatible = "silergy,syr828";
584 vin-supply = <&vcc_sys>;
585 regulator-compatible = "fan53555-reg";
586 pinctrl-0 = <&vsel2_gpio>;
587 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
588 regulator-name = "vdd_gpu";
589 regulator-min-microvolt = <712500>;
590 regulator-max-microvolt = <1500000>;
591 regulator-ramp-delay = <1000>;
592 fcs,suspend-voltage-selector = <1>;
594 regulator-initial-state = <3>;
595 regulator-initial-mode = <1>;/*1:pwm 2: auto mode*/
596 regulator-state-mem {
597 regulator-off-in-suspend;
602 compatible = "rockchip,rk818";
605 clock-output-names = "xin32k", "wifibt_32kin";
606 interrupt-parent = <&gpio1>;
607 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
608 pinctrl-names = "default";
609 pinctrl-0 = <&pmic_int_l>;
610 rockchip,system-power-controller;
615 vcc1-supply = <&vcc_sys>;
616 vcc2-supply = <&vcc_sys>;
617 vcc3-supply = <&vcc_sys>;
618 vcc4-supply = <&vcc_sys>;
619 vcc6-supply = <&vcc_sys>;
620 vcc7-supply = <&vcc3v3_sys>;
621 vcc8-supply = <&vcc_sys>;
622 vcc9-supply = <&vcc3v3_sys>;
625 vdd_cpu_l: DCDC_REG1 {
626 regulator-name = "vdd_cpu_l";
629 regulator-min-microvolt = <750000>;
630 regulator-max-microvolt = <1350000>;
631 regulator-ramp-delay = <6001>;
632 regulator-state-mem {
633 regulator-off-in-suspend;
637 vdd_center: DCDC_REG2 {
638 regulator-name = "vdd_center";
641 regulator-min-microvolt = <800000>;
642 regulator-max-microvolt = <1350000>;
643 regulator-ramp-delay = <6001>;
644 regulator-state-mem {
645 regulator-off-in-suspend;
650 regulator-name = "vcc_ddr";
653 regulator-state-mem {
654 regulator-on-in-suspend;
659 regulator-name = "vcc_1v8";
662 regulator-min-microvolt = <1800000>;
663 regulator-max-microvolt = <1800000>;
664 regulator-state-mem {
665 regulator-on-in-suspend;
666 regulator-suspend-microvolt = <1800000>;
670 vcca3v0_codec: LDO_REG1 {
673 regulator-min-microvolt = <3000000>;
674 regulator-max-microvolt = <3000000>;
675 regulator-name = "vcca3v0_codec";
676 regulator-state-mem {
677 regulator-off-in-suspend;
681 vcc3v0_tp: LDO_REG2 {
684 regulator-min-microvolt = <3000000>;
685 regulator-max-microvolt = <3000000>;
686 regulator-name = "vcc3v0_tp";
687 regulator-state-mem {
688 regulator-off-in-suspend;
692 vcca1v8_codec: LDO_REG3 {
695 regulator-min-microvolt = <1800000>;
696 regulator-max-microvolt = <1800000>;
697 regulator-name = "vcca1v8_codec";
698 regulator-state-mem {
699 regulator-off-in-suspend;
703 vcc_power_on: LDO_REG4 {
706 regulator-min-microvolt = <3300000>;
707 regulator-max-microvolt = <3300000>;
708 regulator-name = "vcc_power_on";
709 regulator-state-mem {
710 regulator-on-in-suspend;
711 regulator-suspend-microvolt = <3300000>;
718 regulator-min-microvolt = <3000000>;
719 regulator-max-microvolt = <3000000>;
720 regulator-name = "vcc_3v0";
721 regulator-state-mem {
722 regulator-on-in-suspend;
723 regulator-suspend-microvolt = <3000000>;
730 regulator-min-microvolt = <1500000>;
731 regulator-max-microvolt = <1500000>;
732 regulator-name = "vcc_1v5";
733 regulator-state-mem {
734 regulator-on-in-suspend;
735 regulator-suspend-microvolt = <1500000>;
739 vcc1v8_dvp: LDO_REG7 {
742 regulator-min-microvolt = <1800000>;
743 regulator-max-microvolt = <1800000>;
744 regulator-name = "vcc1v8_dvp";
745 regulator-state-mem {
746 regulator-on-in-suspend;
747 regulator-suspend-microvolt = <1800000>;
751 vcc3v3_s3: LDO_REG8 {
754 regulator-min-microvolt = <3300000>;
755 regulator-max-microvolt = <3300000>;
756 regulator-name = "vcc3v3_s3";
757 regulator-state-mem {
758 regulator-on-in-suspend;
759 regulator-suspend-microvolt = <3300000>;
766 regulator-min-microvolt = <1800000>;
767 regulator-max-microvolt = <3300000>;
768 regulator-name = "vcc_sd";
769 regulator-state-mem {
770 regulator-on-in-suspend;
771 regulator-suspend-microvolt = <3300000>;
775 vcc3v3_s0: SWITCH_REG {
778 regulator-name = "vcc3v3_s0";
779 regulator-state-mem {
780 regulator-on-in-suspend;
786 compatible = "rk818-battery";
788 3400 3599 3671 3701 3728 3746 3762
789 3772 3781 3792 3816 3836 3866 3910
790 3942 3971 4002 4050 4088 4132 4183>;
791 design_capacity = <4000>;
792 design_qmax = <4100>;
794 max_input_current = <2000>;
795 max_chrg_current = <1800>;
796 max_chrg_voltage = <4200>;
797 sleep_enter_current = <300>;
798 sleep_exit_current = <300>;
799 power_off_thresd = <3400>;
800 zero_algorithm_vol = <3850>;
801 fb_temperature = <115>;
803 max_soc_offset = <60>;
814 i2c-scl-rising-time-ns = <164>;
815 i2c-scl-falling-time-ns = <15>;
818 #sound-dai-cells = <0>;
819 compatible = "everest,es8316";
821 clocks = <&cru SCLK_I2S_8CH_OUT>;
822 clock-names = "mclk";
823 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
829 i2c-scl-rising-time-ns = <345>;
830 i2c-scl-falling-time-ns = <11>;
831 clock-frequency = <400000>;
835 compatible = "ak8963";
836 pinctrl-names = "default";
837 pinctrl-0 = <&ak8963_irq_gpio>;
839 type = <SENSOR_TYPE_COMPASS>;
840 irq-gpio = <&gpio1 0 IRQ_TYPE_EDGE_RISING>;
842 poll_delay_ms = <30>;
847 compatible = "fairchild,fusb302";
849 pinctrl-names = "default";
850 pinctrl-0 = <&fusb0_int>;
851 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
860 compatible = "gslX680";
862 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
863 reset-gpio = <&gpio4 22 GPIO_ACTIVE_LOW>;
872 max-freq = <50000000>;
873 pinctrl-names = "default", "sleep";
874 pinctrl-1 = <&spi1_gpio>;
877 compatible = "inv-spi,mpu6500";
878 pinctrl-names = "default";
879 pinctrl-0 = <&mpu6500_irq_gpio>;
880 irq-gpio = <&gpio1 4 IRQ_TYPE_EDGE_RISING>;
882 spi-max-frequency = <1000000>;
885 mpu-int_config = <0x00>;
886 mpu-level_shifter = <0>;
887 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
891 support-hw-poweroff = <1>;
897 temperature = <70000>; /* millicelsius */
901 temperature = <85000>; /* millicelsius */
905 temperature = <100000>; /* millicelsius */
909 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
910 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
911 rockchip,hw-tshut-temp = <110000>;
923 u2phy0_otg: otg-port {
927 u2phy0_host: host-port {
928 phy-supply = <&vcc5v0_host>;
936 u2phy1_otg: otg-port {
940 u2phy1_host: host-port {
941 phy-supply = <&vcc5v0_host>;
947 pinctrl-names = "default";
948 pinctrl-0 = <&uart0_xfer &uart0_cts>;
1003 rockchip,pwm_id= <3>;
1004 rockchip,pwm_voltage = <900000>;
1008 status = "disabled";
1012 assigned-clocks = <&cru PLL_VPLL>;
1013 assigned-clock-rates = <245000000>;
1014 #include <dt-bindings/display/screen-timing/lcd-ls055r1sx04-mipi.dtsi>
1018 rockchip,uboot-logo-on = <1>;
1019 rockchip,disp-mode = <NO_DUAL>;
1024 power_ctr: power_ctr {
1026 rockchip,power_type = <GPIO>;
1027 gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
1028 rockchip,delay = <10>;
1031 rockchip,power_type = <GPIO>;
1032 gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
1033 rockchip,delay = <10>;
1051 cpu-supply = <&vdd_cpu_l>;
1055 cpu-supply = <&vdd_cpu_l>;
1059 cpu-supply = <&vdd_cpu_l>;
1063 cpu-supply = <&vdd_cpu_l>;
1067 cpu-supply = <&vdd_cpu_b>;
1071 cpu-supply = <&vdd_cpu_b>;
1076 mali-supply = <&vdd_gpu>;
1081 wifi_enable_h: wifi-enable-h {
1082 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
1086 wireless-bluetooth {
1087 uart0_gpios: uart0-gpios {
1088 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
1093 pmic_int_l: pmic-int-l {
1095 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
1098 pmic_dvs2: pmic-dvs2 {
1100 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
1103 vsel1_gpio: vsel1-gpio {
1105 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
1108 vsel2_gpio: vsel2-gpio {
1110 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
1115 mpu6500_irq_gpio: mpu6500-irq-gpio {
1116 rockchip,pins = <1 4 RK_FUNC_GPIO &pcfg_pull_none>;
1121 host_vbus_drv: host-vbus-drv {
1123 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1128 ak8963_irq_gpio: ak8963-irq-gpio {
1129 rockchip,pins = <1 0 RK_FUNC_GPIO &pcfg_pull_none>;
1134 spi1_gpio: spi1-gpio {
1136 <1 7 RK_FUNC_GPIO &pcfg_output_low>,
1137 <1 8 RK_FUNC_GPIO &pcfg_output_low>,
1138 <1 9 RK_FUNC_GPIO &pcfg_output_low>,
1139 <1 10 RK_FUNC_GPIO &pcfg_output_low>;
1144 fusb0_int: fusb0-int {
1145 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
1151 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;