2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
43 #include "dt-bindings/pwm/pwm.h"
44 #include "rk3399.dtsi"
45 #include "rk3399-opp.dtsi"
48 compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
50 backlight: backlight {
52 compatible = "pwm-backlight";
53 pwms = <&pwm0 0 25000 0>;
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84 232 233 234 235 236 237 238 239
85 240 241 242 243 244 245 246 247
86 248 249 250 251 252 253 254 255>;
87 default-brightness-level = <200>;
90 clkin_gmac: external-gmac-clock {
91 compatible = "fixed-clock";
92 clock-frequency = <125000000>;
93 clock-output-names = "clkin_gmac";
97 dw_hdmi_audio: dw-hdmi-audio {
99 compatible = "rockchip,dw-hdmi-audio";
100 #sound-dai-cells = <0>;
103 hdmi_sound: hdmi-sound {
105 compatible = "simple-audio-card";
106 simple-audio-card,format = "i2s";
107 simple-audio-card,mclk-fs = <256>;
108 simple-audio-card,name = "rockchip,hdmi";
110 simple-audio-card,cpu {
113 simple-audio-card,codec {
114 sound-dai = <&dw_hdmi_audio>;
118 sdio_pwrseq: sdio-pwrseq {
119 compatible = "mmc-pwrseq-simple";
121 clock-names = "ext_clock";
122 pinctrl-names = "default";
123 pinctrl-0 = <&wifi_enable_h>;
126 * On the module itself this is one of these (depending
127 * on the actual card populated):
128 * - SDIO_RESET_L_WL_REG_ON
129 * - PDN (power down when low)
131 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
134 vcc3v3_sys: vcc3v3-sys {
135 compatible = "regulator-fixed";
136 regulator-name = "vcc3v3_sys";
139 regulator-min-microvolt = <3300000>;
140 regulator-max-microvolt = <3300000>;
143 vcc5v0_host: vcc5v0-host-regulator {
144 compatible = "regulator-fixed";
146 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
147 pinctrl-names = "default";
148 pinctrl-0 = <&host_vbus_drv>;
149 regulator-name = "vcc5v0_host";
152 vcc5v0_sys: vcc5v0-sys {
153 compatible = "regulator-fixed";
154 regulator-name = "vcc5v0_sys";
157 regulator-min-microvolt = <5000000>;
158 regulator-max-microvolt = <5000000>;
161 vcc_phy: vcc-phy-regulator {
162 compatible = "regulator-fixed";
163 regulator-name = "vcc_phy";
169 compatible = "pwm-regulator";
170 pwms = <&pwm2 0 25000 0>;
171 regulator-name = "vdd_log";
172 regulator-min-microvolt = <800000>;
173 regulator-max-microvolt = <1400000>;
177 /* for rockchip boot on */
178 rockchip,pwm_id= <2>;
179 rockchip,pwm_voltage = <1000000>;
184 cpu-supply = <&vdd_cpu_l>;
188 cpu-supply = <&vdd_cpu_l>;
192 cpu-supply = <&vdd_cpu_l>;
196 cpu-supply = <&vdd_cpu_l>;
200 cpu-supply = <&vdd_cpu_b>;
204 cpu-supply = <&vdd_cpu_b>;
208 freq-sel = <200000000>;
215 phy-supply = <&vcc_phy>;
217 clock_in_out = "input";
218 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
219 snps,reset-active-low;
220 snps,reset-delays-us = <0 10000 50000>;
221 assigned-clocks = <&cru SCLK_RMII_SRC>;
222 assigned-clock-parents = <&clkin_gmac>;
223 pinctrl-names = "default";
224 pinctrl-0 = <&rgmii_pins>;
232 mali-supply = <&vdd_gpu>;
237 i2c-scl-rising-time-ns = <168>;
238 i2c-scl-falling-time-ns = <4>;
239 clock-frequency = <400000>;
241 vdd_cpu_b: syr827@40 {
242 compatible = "silergy,syr827";
244 vin-supply = <&vcc5v0_sys>;
245 regulator-compatible = "fan53555-reg";
246 regulator-name = "vdd_cpu_b";
247 regulator-min-microvolt = <712500>;
248 regulator-max-microvolt = <1500000>;
249 regulator-ramp-delay = <1000>;
250 fcs,suspend-voltage-selector = <1>;
253 regulator-initial-state = <3>;
254 regulator-state-mem {
255 regulator-off-in-suspend;
260 compatible = "silergy,syr828";
262 vin-supply = <&vcc5v0_sys>;
263 regulator-compatible = "fan53555-reg";
264 regulator-name = "vdd_gpu";
265 regulator-min-microvolt = <712500>;
266 regulator-max-microvolt = <1500000>;
267 regulator-ramp-delay = <1000>;
268 fcs,suspend-voltage-selector = <1>;
271 regulator-initial-state = <3>;
272 regulator-state-mem {
273 regulator-off-in-suspend;
278 compatible = "rockchip,rk808";
280 interrupt-parent = <&gpio1>;
281 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
282 pinctrl-names = "default";
283 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
284 rockchip,system-power-controller;
287 clock-output-names = "xin32k", "rk808-clkout2";
289 vcc1-supply = <&vcc3v3_sys>;
290 vcc2-supply = <&vcc3v3_sys>;
291 vcc3-supply = <&vcc3v3_sys>;
292 vcc4-supply = <&vcc3v3_sys>;
293 vcc6-supply = <&vcc3v3_sys>;
294 vcc7-supply = <&vcc3v3_sys>;
295 vcc8-supply = <&vcc3v3_sys>;
296 vcc9-supply = <&vcc3v3_sys>;
297 vcc10-supply = <&vcc3v3_sys>;
298 vcc11-supply = <&vcc3v3_sys>;
299 vcc12-supply = <&vcc3v3_sys>;
300 vddio-supply = <&vcc1v8_pmu>;
303 vdd_center: DCDC_REG1 {
306 regulator-min-microvolt = <750000>;
307 regulator-max-microvolt = <1350000>;
308 regulator-ramp-delay = <6001>;
309 regulator-name = "vdd_center";
310 regulator-state-mem {
311 regulator-off-in-suspend;
315 vdd_cpu_l: DCDC_REG2 {
318 regulator-min-microvolt = <750000>;
319 regulator-max-microvolt = <1350000>;
320 regulator-ramp-delay = <6001>;
321 regulator-name = "vdd_cpu_l";
322 regulator-state-mem {
323 regulator-off-in-suspend;
330 regulator-name = "vcc_ddr";
331 regulator-state-mem {
332 regulator-on-in-suspend;
339 regulator-min-microvolt = <1800000>;
340 regulator-max-microvolt = <1800000>;
341 regulator-name = "vcc_1v8";
342 regulator-state-mem {
343 regulator-on-in-suspend;
344 regulator-suspend-microvolt = <1800000>;
348 vcc1v8_dvp: LDO_REG1 {
351 regulator-min-microvolt = <1800000>;
352 regulator-max-microvolt = <1800000>;
353 regulator-name = "vcc1v8_dvp";
354 regulator-state-mem {
355 regulator-off-in-suspend;
359 vcc3v0_tp: LDO_REG2 {
362 regulator-min-microvolt = <3000000>;
363 regulator-max-microvolt = <3000000>;
364 regulator-name = "vcc3v0_tp";
365 regulator-state-mem {
366 regulator-off-in-suspend;
370 vcc1v8_pmu: LDO_REG3 {
373 regulator-min-microvolt = <1800000>;
374 regulator-max-microvolt = <1800000>;
375 regulator-name = "vcc1v8_pmu";
376 regulator-state-mem {
377 regulator-on-in-suspend;
378 regulator-suspend-microvolt = <1800000>;
385 regulator-min-microvolt = <1800000>;
386 regulator-max-microvolt = <3300000>;
387 regulator-name = "vcc_sd";
388 regulator-state-mem {
389 regulator-on-in-suspend;
390 regulator-suspend-microvolt = <3300000>;
394 vcca3v0_codec: LDO_REG5 {
397 regulator-min-microvolt = <3000000>;
398 regulator-max-microvolt = <3000000>;
399 regulator-name = "vcca3v0_codec";
400 regulator-state-mem {
401 regulator-off-in-suspend;
408 regulator-min-microvolt = <1500000>;
409 regulator-max-microvolt = <1500000>;
410 regulator-name = "vcc_1v5";
411 regulator-state-mem {
412 regulator-on-in-suspend;
413 regulator-suspend-microvolt = <1500000>;
417 vcca1v8_codec: LDO_REG7 {
420 regulator-min-microvolt = <1800000>;
421 regulator-max-microvolt = <1800000>;
422 regulator-name = "vcca1v8_codec";
423 regulator-state-mem {
424 regulator-off-in-suspend;
431 regulator-min-microvolt = <3000000>;
432 regulator-max-microvolt = <3000000>;
433 regulator-name = "vcc_3v0";
434 regulator-state-mem {
435 regulator-on-in-suspend;
436 regulator-suspend-microvolt = <3000000>;
440 vcc3v3_s3: SWITCH_REG1 {
443 regulator-name = "vcc3v3_s3";
444 regulator-state-mem {
445 regulator-off-in-suspend;
449 vcc3v3_s0: SWITCH_REG2 {
452 regulator-name = "vcc3v3_s0";
453 regulator-state-mem {
454 regulator-off-in-suspend;
463 i2c-scl-rising-time-ns = <475>;
464 i2c-scl-falling-time-ns = <26>;
467 compatible = "fairchild,fusb302";
469 pinctrl-names = "default";
470 pinctrl-0 = <&fusb0_int>;
471 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
478 rockchip,i2s-broken-burst-len;
479 rockchip,playback-channels = <8>;
480 rockchip,capture-channels = <8>;
481 #sound-dai-cells = <0>;
485 #sound-dai-cells = <0>;
492 bt656-supply = <&vcc_3v0>; /* bt656_gpio2ab_ms */
493 audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */
494 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
495 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
499 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
500 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
501 assigned-clock-rates = <100000000>;
502 ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
504 pinctrl-names = "default";
505 pinctrl-0 = <&pcie_clkreqn>;
511 pmu1830-supply = <&vcc_3v0>;
527 keep-power-in-suspend;
528 mmc-hs400-enhanced-strobe;
533 clock-frequency = <50000000>;
534 clock-freq-min-max = <200000 50000000>;
540 keep-power-in-suspend;
541 mmc-pwrseq = <&sdio_pwrseq>;
544 pinctrl-names = "default";
545 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
551 clock-frequency = <150000000>;
552 clock-freq-min-max = <100000 150000000>;
560 vqmmc-supply = <&vcc_sd>;
561 pinctrl-names = "default";
562 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
580 /* tshut mode 0:CRU 1:GPIO */
581 rockchip,hw-tshut-mode = <1>;
582 /* tshut polarity 0:LOW 1:HIGH */
583 rockchip,hw-tshut-polarity = <1>;
591 u2phy0_otg: otg-port {
595 u2phy0_host: host-port {
596 phy-supply = <&vcc5v0_host>;
604 u2phy1_otg: otg-port {
608 u2phy1_host: host-port {
609 phy-supply = <&vcc5v0_host>;
654 pmic_int_l: pmic-int-l {
656 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
659 pmic_dvs2: pmic-dvs2 {
661 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
666 host_vbus_drv: host-vbus-drv {
668 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
673 fusb0_int: fusb0-int {
674 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;