arm64: rockchip_defconfig: update by savedefconfig
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-sapphire.dtsi
1 /*
2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 #include "dt-bindings/pwm/pwm.h"
44 #include "rk3399.dtsi"
45 #include "rk3399-opp.dtsi"
46
47 / {
48         compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
49
50         backlight: backlight {
51                 status = "disabled";
52                 compatible = "pwm-backlight";
53                 pwms = <&pwm0 0 25000 0>;
54                 brightness-levels = <
55                           0   1   2   3   4   5   6   7
56                           8   9  10  11  12  13  14  15
57                          16  17  18  19  20  21  22  23
58                          24  25  26  27  28  29  30  31
59                          32  33  34  35  36  37  38  39
60                          40  41  42  43  44  45  46  47
61                          48  49  50  51  52  53  54  55
62                          56  57  58  59  60  61  62  63
63                          64  65  66  67  68  69  70  71
64                          72  73  74  75  76  77  78  79
65                          80  81  82  83  84  85  86  87
66                          88  89  90  91  92  93  94  95
67                          96  97  98  99 100 101 102 103
68                         104 105 106 107 108 109 110 111
69                         112 113 114 115 116 117 118 119
70                         120 121 122 123 124 125 126 127
71                         128 129 130 131 132 133 134 135
72                         136 137 138 139 140 141 142 143
73                         144 145 146 147 148 149 150 151
74                         152 153 154 155 156 157 158 159
75                         160 161 162 163 164 165 166 167
76                         168 169 170 171 172 173 174 175
77                         176 177 178 179 180 181 182 183
78                         184 185 186 187 188 189 190 191
79                         192 193 194 195 196 197 198 199
80                         200 201 202 203 204 205 206 207
81                         208 209 210 211 212 213 214 215
82                         216 217 218 219 220 221 222 223
83                         224 225 226 227 228 229 230 231
84                         232 233 234 235 236 237 238 239
85                         240 241 242 243 244 245 246 247
86                         248 249 250 251 252 253 254 255>;
87                 default-brightness-level = <200>;
88         };
89
90         clkin_gmac: external-gmac-clock {
91                 compatible = "fixed-clock";
92                 clock-frequency = <125000000>;
93                 clock-output-names = "clkin_gmac";
94                 #clock-cells = <0>;
95         };
96
97         dw_hdmi_audio: dw-hdmi-audio {
98                 status = "disabled";
99                 compatible = "rockchip,dw-hdmi-audio";
100                 #sound-dai-cells = <0>;
101         };
102
103         hdmi_sound: hdmi-sound {
104                 status = "disabled";
105                 compatible = "simple-audio-card";
106                 simple-audio-card,format = "i2s";
107                 simple-audio-card,mclk-fs = <256>;
108                 simple-audio-card,name = "rockchip,hdmi";
109
110                 simple-audio-card,cpu {
111                         sound-dai = <&i2s2>;
112                 };
113                 simple-audio-card,codec {
114                         sound-dai = <&hdmi>;
115                 };
116         };
117
118         sdio_pwrseq: sdio-pwrseq {
119                 compatible = "mmc-pwrseq-simple";
120                 clocks = <&rk808 1>;
121                 clock-names = "ext_clock";
122                 pinctrl-names = "default";
123                 pinctrl-0 = <&wifi_enable_h>;
124
125                 /*
126                  * On the module itself this is one of these (depending
127                  * on the actual card populated):
128                  * - SDIO_RESET_L_WL_REG_ON
129                  * - PDN (power down when low)
130                  */
131                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
132         };
133
134         vcc3v3_sys: vcc3v3-sys {
135                 compatible = "regulator-fixed";
136                 regulator-name = "vcc3v3_sys";
137                 regulator-always-on;
138                 regulator-boot-on;
139                 regulator-min-microvolt = <3300000>;
140                 regulator-max-microvolt = <3300000>;
141         };
142
143         vcc5v0_host: vcc5v0-host-regulator {
144                 compatible = "regulator-fixed";
145                 enable-active-high;
146                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
147                 pinctrl-names = "default";
148                 pinctrl-0 = <&host_vbus_drv>;
149                 regulator-name = "vcc5v0_host";
150                 regulator-always-on;
151         };
152
153         vcc5v0_sys: vcc5v0-sys {
154                 compatible = "regulator-fixed";
155                 regulator-name = "vcc5v0_sys";
156                 regulator-always-on;
157                 regulator-boot-on;
158                 regulator-min-microvolt = <5000000>;
159                 regulator-max-microvolt = <5000000>;
160         };
161
162         vcc_phy: vcc-phy-regulator {
163                 compatible = "regulator-fixed";
164                 regulator-name = "vcc_phy";
165                 regulator-always-on;
166                 regulator-boot-on;
167         };
168
169         vdd_log: vdd-log {
170                 compatible = "pwm-regulator";
171                 pwms = <&pwm2 0 25000 1>;
172                 regulator-name = "vdd_log";
173                 regulator-min-microvolt = <800000>;
174                 regulator-max-microvolt = <1400000>;
175                 regulator-always-on;
176                 regulator-boot-on;
177
178                 /* for rockchip boot on */
179                 rockchip,pwm_id= <2>;
180                 rockchip,pwm_voltage = <1000000>;
181         };
182 };
183
184 &cpu_l0 {
185         cpu-supply = <&vdd_cpu_l>;
186 };
187
188 &cpu_l1 {
189         cpu-supply = <&vdd_cpu_l>;
190 };
191
192 &cpu_l2 {
193         cpu-supply = <&vdd_cpu_l>;
194 };
195
196 &cpu_l3 {
197         cpu-supply = <&vdd_cpu_l>;
198 };
199
200 &cpu_b0 {
201         cpu-supply = <&vdd_cpu_b>;
202 };
203
204 &cpu_b1 {
205         cpu-supply = <&vdd_cpu_b>;
206 };
207
208 &emmc_phy {
209         status = "okay";
210 };
211
212 &gmac {
213         phy-supply = <&vcc_phy>;
214         phy-mode = "rgmii";
215         clock_in_out = "input";
216         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
217         snps,reset-active-low;
218         snps,reset-delays-us = <0 10000 50000>;
219         assigned-clocks = <&cru SCLK_RMII_SRC>;
220         assigned-clock-parents = <&clkin_gmac>;
221         pinctrl-names = "default";
222         pinctrl-0 = <&rgmii_pins>;
223         tx_delay = <0x28>;
224         rx_delay = <0x11>;
225         status = "okay";
226 };
227
228 &gpu {
229         status = "okay";
230         mali-supply = <&vdd_gpu>;
231 };
232
233 &i2c0 {
234         status = "okay";
235         i2c-scl-rising-time-ns = <168>;
236         i2c-scl-falling-time-ns = <4>;
237         clock-frequency = <400000>;
238
239         vdd_cpu_b: syr827@40 {
240                 compatible = "silergy,syr827";
241                 reg = <0x40>;
242                 vin-supply = <&vcc5v0_sys>;
243                 regulator-compatible = "fan53555-reg";
244                 regulator-name = "vdd_cpu_b";
245                 regulator-min-microvolt = <712500>;
246                 regulator-max-microvolt = <1500000>;
247                 regulator-ramp-delay = <1000>;
248                 fcs,suspend-voltage-selector = <1>;
249                 regulator-always-on;
250                 regulator-boot-on;
251                 regulator-initial-state = <3>;
252                         regulator-state-mem {
253                         regulator-off-in-suspend;
254                 };
255         };
256
257         vdd_gpu: syr828@41 {
258                 compatible = "silergy,syr828";
259                 reg = <0x41>;
260                 vin-supply = <&vcc5v0_sys>;
261                 regulator-compatible = "fan53555-reg";
262                 regulator-name = "vdd_gpu";
263                 regulator-min-microvolt = <712500>;
264                 regulator-max-microvolt = <1500000>;
265                 regulator-ramp-delay = <1000>;
266                 fcs,suspend-voltage-selector = <1>;
267                 regulator-always-on;
268                 regulator-boot-on;
269                 regulator-initial-state = <3>;
270                         regulator-state-mem {
271                         regulator-off-in-suspend;
272                 };
273         };
274
275         rk808: pmic@1b {
276                 compatible = "rockchip,rk808";
277                 reg = <0x1b>;
278                 interrupt-parent = <&gpio1>;
279                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
280                 pinctrl-names = "default";
281                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
282                 rockchip,system-power-controller;
283                 wakeup-source;
284                 #clock-cells = <1>;
285                 clock-output-names = "xin32k", "rk808-clkout2";
286
287                 vcc1-supply = <&vcc3v3_sys>;
288                 vcc2-supply = <&vcc3v3_sys>;
289                 vcc3-supply = <&vcc3v3_sys>;
290                 vcc4-supply = <&vcc3v3_sys>;
291                 vcc6-supply = <&vcc3v3_sys>;
292                 vcc7-supply = <&vcc3v3_sys>;
293                 vcc8-supply = <&vcc3v3_sys>;
294                 vcc9-supply = <&vcc3v3_sys>;
295                 vcc10-supply = <&vcc3v3_sys>;
296                 vcc11-supply = <&vcc3v3_sys>;
297                 vcc12-supply = <&vcc3v3_sys>;
298                 vddio-supply = <&vcc1v8_pmu>;
299
300                 regulators {
301                         vdd_center: DCDC_REG1 {
302                                 regulator-always-on;
303                                 regulator-boot-on;
304                                 regulator-min-microvolt = <750000>;
305                                 regulator-max-microvolt = <1350000>;
306                                 regulator-ramp-delay = <6001>;
307                                 regulator-name = "vdd_center";
308                                 regulator-state-mem {
309                                         regulator-off-in-suspend;
310                                 };
311                         };
312
313                         vdd_cpu_l: DCDC_REG2 {
314                                 regulator-always-on;
315                                 regulator-boot-on;
316                                 regulator-min-microvolt = <750000>;
317                                 regulator-max-microvolt = <1350000>;
318                                 regulator-ramp-delay = <6001>;
319                                 regulator-name = "vdd_cpu_l";
320                                 regulator-state-mem {
321                                         regulator-off-in-suspend;
322                                 };
323                         };
324
325                         vcc_ddr: DCDC_REG3 {
326                                 regulator-always-on;
327                                 regulator-boot-on;
328                                 regulator-name = "vcc_ddr";
329                                 regulator-state-mem {
330                                         regulator-on-in-suspend;
331                                 };
332                         };
333
334                         vcc_1v8: DCDC_REG4 {
335                                 regulator-always-on;
336                                 regulator-boot-on;
337                                 regulator-min-microvolt = <1800000>;
338                                 regulator-max-microvolt = <1800000>;
339                                 regulator-name = "vcc_1v8";
340                                 regulator-state-mem {
341                                         regulator-on-in-suspend;
342                                         regulator-suspend-microvolt = <1800000>;
343                                 };
344                         };
345
346                         vcc1v8_dvp: LDO_REG1 {
347                                 regulator-always-on;
348                                 regulator-boot-on;
349                                 regulator-min-microvolt = <1800000>;
350                                 regulator-max-microvolt = <1800000>;
351                                 regulator-name = "vcc1v8_dvp";
352                                 regulator-state-mem {
353                                         regulator-off-in-suspend;
354                                 };
355                         };
356
357                         vcc3v0_tp: LDO_REG2 {
358                                 regulator-always-on;
359                                 regulator-boot-on;
360                                 regulator-min-microvolt = <3000000>;
361                                 regulator-max-microvolt = <3000000>;
362                                 regulator-name = "vcc3v0_tp";
363                                 regulator-state-mem {
364                                         regulator-off-in-suspend;
365                                 };
366                         };
367
368                         vcc1v8_pmu: LDO_REG3 {
369                                 regulator-always-on;
370                                 regulator-boot-on;
371                                 regulator-min-microvolt = <1800000>;
372                                 regulator-max-microvolt = <1800000>;
373                                 regulator-name = "vcc1v8_pmu";
374                                 regulator-state-mem {
375                                         regulator-on-in-suspend;
376                                         regulator-suspend-microvolt = <1800000>;
377                                 };
378                         };
379
380                         vcc_sd: LDO_REG4 {
381                                 regulator-always-on;
382                                 regulator-boot-on;
383                                 regulator-min-microvolt = <1800000>;
384                                 regulator-max-microvolt = <3300000>;
385                                 regulator-name = "vcc_sd";
386                                 regulator-state-mem {
387                                         regulator-on-in-suspend;
388                                         regulator-suspend-microvolt = <3300000>;
389                                 };
390                         };
391
392                         vcca3v0_codec: LDO_REG5 {
393                                 regulator-always-on;
394                                 regulator-boot-on;
395                                 regulator-min-microvolt = <3000000>;
396                                 regulator-max-microvolt = <3000000>;
397                                 regulator-name = "vcca3v0_codec";
398                                 regulator-state-mem {
399                                         regulator-off-in-suspend;
400                                 };
401                         };
402
403                         vcc_1v5: LDO_REG6 {
404                                 regulator-always-on;
405                                 regulator-boot-on;
406                                 regulator-min-microvolt = <1500000>;
407                                 regulator-max-microvolt = <1500000>;
408                                 regulator-name = "vcc_1v5";
409                                 regulator-state-mem {
410                                         regulator-on-in-suspend;
411                                         regulator-suspend-microvolt = <1500000>;
412                                 };
413                         };
414
415                         vcca1v8_codec: LDO_REG7 {
416                                 regulator-always-on;
417                                 regulator-boot-on;
418                                 regulator-min-microvolt = <1800000>;
419                                 regulator-max-microvolt = <1800000>;
420                                 regulator-name = "vcca1v8_codec";
421                                 regulator-state-mem {
422                                         regulator-off-in-suspend;
423                                 };
424                         };
425
426                         vcc_3v0: LDO_REG8 {
427                                 regulator-always-on;
428                                 regulator-boot-on;
429                                 regulator-min-microvolt = <3000000>;
430                                 regulator-max-microvolt = <3000000>;
431                                 regulator-name = "vcc_3v0";
432                                 regulator-state-mem {
433                                         regulator-on-in-suspend;
434                                         regulator-suspend-microvolt = <3000000>;
435                                 };
436                         };
437
438                         vcc3v3_s3: SWITCH_REG1 {
439                                 regulator-always-on;
440                                 regulator-boot-on;
441                                 regulator-name = "vcc3v3_s3";
442                                 regulator-state-mem {
443                                         regulator-off-in-suspend;
444                                 };
445                         };
446
447                         vcc3v3_s0: SWITCH_REG2 {
448                                 regulator-always-on;
449                                 regulator-boot-on;
450                                 regulator-name = "vcc3v3_s0";
451                                 regulator-state-mem {
452                                         regulator-off-in-suspend;
453                                 };
454                         };
455                 };
456         };
457 };
458
459 &i2c4 {
460         status = "okay";
461         i2c-scl-rising-time-ns = <475>;
462         i2c-scl-falling-time-ns = <26>;
463
464         fusb0: fusb30x@22 {
465                 compatible = "fairchild,fusb302";
466                 reg = <0x22>;
467                 pinctrl-names = "default";
468                 pinctrl-0 = <&fusb0_int>;
469                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
470                 vbus-5v-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
471                 status = "okay";
472         };
473 };
474
475 &i2s0 {
476         status = "okay";
477         rockchip,i2s-broken-burst-len;
478         rockchip,playback-channels = <8>;
479         rockchip,capture-channels = <8>;
480         #sound-dai-cells = <0>;
481 };
482
483 &i2s2 {
484         #sound-dai-cells = <0>;
485         status = "okay";
486 };
487
488 &io_domains {
489         status = "okay";
490
491         bt656-supply = <&vcc_3v0>;              /* bt656_gpio2ab_ms */
492         audio-supply = <&vcca1v8_codec>;        /* audio_gpio3d4a_ms */
493         sdmmc-supply = <&vcc_sd>;               /* sdmmc_gpio4b_ms */
494         gpio1830-supply = <&vcc_3v0>;           /* gpio1833_gpio4cd_ms */
495 };
496
497 &pcie0 {
498         assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
499         assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
500         assigned-clock-rates = <100000000>;
501         ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
502         num-lanes = <4>;
503         pinctrl-names = "default";
504         pinctrl-0 = <&pcie_clkreqn>;
505         status = "okay";
506 };
507
508 &pmu_io_domains {
509         status = "okay";
510         pmu1830-supply = <&vcc_3v0>;
511 };
512
513 &pwm0 {
514         status = "okay";
515 };
516
517 &pwm2 {
518         status = "okay";
519 };
520
521 &sdhci {
522         bus-width = <8>;
523         mmc-hs400-1_8v;
524         supports-emmc;
525         non-removable;
526         keep-power-in-suspend;
527         mmc-hs400-enhanced-strobe;
528         status = "okay";
529 };
530
531 &sdio0 {
532         clock-frequency = <50000000>;
533         clock-freq-min-max = <200000 50000000>;
534         supports-sdio;
535         bus-width = <4>;
536         disable-wp;
537         cap-sd-highspeed;
538         cap-sdio-irq;
539         keep-power-in-suspend;
540         mmc-pwrseq = <&sdio_pwrseq>;
541         non-removable;
542         num-slots = <1>;
543         pinctrl-names = "default";
544         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
545         sd-uhs-sdr104;
546         status = "okay";
547 };
548
549 &sdmmc {
550         clock-frequency = <150000000>;
551         clock-freq-min-max = <100000 150000000>;
552         supports-sd;
553         bus-width = <4>;
554         cap-mmc-highspeed;
555         cap-sd-highspeed;
556         disable-wp;
557         num-slots = <1>;
558         //sd-uhs-sdr104;
559         vqmmc-supply = <&vcc_sd>;
560         pinctrl-names = "default";
561         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
562         status = "okay";
563 };
564
565 &saradc {
566         status = "okay";
567 };
568
569 &tcphy0 {
570         extcon = <&fusb0>;
571         status = "okay";
572 };
573
574 &tcphy1 {
575         status = "okay";
576 };
577
578 &tsadc {
579         /* tshut mode 0:CRU 1:GPIO */
580         rockchip,hw-tshut-mode = <1>;
581         /* tshut polarity 0:LOW 1:HIGH */
582         rockchip,hw-tshut-polarity = <1>;
583         status = "okay";
584 };
585
586 &u2phy0 {
587         status = "okay";
588         extcon = <&fusb0>;
589
590         u2phy0_otg: otg-port {
591                 status = "okay";
592         };
593
594         u2phy0_host: host-port {
595                 phy-supply = <&vcc5v0_host>;
596                 status = "okay";
597         };
598 };
599
600 &u2phy1 {
601         status = "okay";
602
603         u2phy1_otg: otg-port {
604                 status = "okay";
605         };
606
607         u2phy1_host: host-port {
608                 phy-supply = <&vcc5v0_host>;
609                 status = "okay";
610         };
611 };
612
613 &uart2 {
614         status = "okay";
615 };
616
617 &usbdrd3_0 {
618         status = "okay";
619         extcon = <&fusb0>;
620 };
621
622 &usbdrd3_1 {
623         status = "okay";
624 };
625
626 &usbdrd_dwc3_0 {
627         status = "okay";
628 };
629
630 &usbdrd_dwc3_1 {
631         status = "okay";
632         dr_mode = "host";
633 };
634
635 &usb_host0_ehci {
636         status = "okay";
637 };
638
639 &usb_host0_ohci {
640         status = "okay";
641 };
642
643 &usb_host1_ehci {
644         status = "okay";
645 };
646
647 &usb_host1_ohci {
648         status = "okay";
649 };
650
651 &pinctrl {
652         pmic {
653                 pmic_int_l: pmic-int-l {
654                         rockchip,pins =
655                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
656                 };
657
658                 pmic_dvs2: pmic-dvs2 {
659                         rockchip,pins =
660                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
661                 };
662         };
663
664         usb2 {
665                 host_vbus_drv: host-vbus-drv {
666                         rockchip,pins =
667                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
668                 };
669         };
670
671         fusb30x {
672                 fusb0_int: fusb0-int {
673                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
674                 };
675         };
676 };