arch/arm64/boot/dts/rockchip/rk3399-rv1-android.dts

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 /dts-v1/;
  44 #include <dt-bindings/pwm/pwm.h>
  45 #include <dt-bindings/sensor-dev.h>
  46 #include "rk3399.dtsi"
  47 #include "rk3399-android.dtsi"
  48
  49 / {
  50         model = "Rockchip RK3399 VR Board";
  51         compatible = "rockchip,vr", "rockchip,rk3399";
  52
  53         vdd_log: vdd-log {
  54                 compatible = "pwm-regulator";
  55                 pwms = <&pwm2 0 25000 0>;
  56                 rockchip,pwm_id= <2>;
  57                 rockchip,pwm_voltage = <900000>;
  58                 regulator-name = "vdd_log";
  59                 regulator-min-microvolt = <800000>;
  60                 regulator-max-microvolt = <1400000>;
  61                 regulator-always-on;
  62                 regulator-boot-on;
  63         };
  64
  65         vcc_sys: vcc-sys {
  66                 compatible = "regulator-fixed";
  67                 regulator-name = "vcc_sys";
  68                 regulator-always-on;
  69                 regulator-boot-on;
  70                 regulator-min-microvolt = <4000000>;
  71                 regulator-max-microvolt = <4000000>;
  72         };
  73
  74         vcc3v3_sys: vcc3v3-sys {
  75                 compatible = "regulator-fixed";
  76                 regulator-name = "vcc3v3_sys";
  77                 regulator-always-on;
  78                 regulator-boot-on;
  79                 regulator-min-microvolt = <3300000>;
  80                 regulator-max-microvolt = <3300000>;
  81         };
  82
  83         vcc_phy: vcc-phy-regulator {
  84                 compatible = "regulator-fixed";
  85                 regulator-name = "vcc_phy";
  86                 regulator-always-on;
  87                 regulator-boot-on;
  88         };
  89
  90         vcc1v8_s3: vcc1v8-s3-regulator {
  91                 compatible = "regulator-fixed";
  92                 regulator-name = "vcc1v8_s3";
  93                 regulator-always-on;
  94                 regulator-boot-on;
  95                 regulator-state-mem {
  96                         regulator-off-in-suspend;
  97                 };
  98         };
  99
 100         io-domains {
 101                 compatible = "rockchip,rk3399-io-voltage-domain";
 102                 rockchip,grf = <&grf>;
 103
 104                 bt656-supply = <&vcc1v8_s3>;
 105                 audio-supply = <&vcc1v8_s3>;
 106                 sdmmc-supply = <&vcc_sd>;
 107                 gpio1830-supply = <&vcc1v8_s3>;
 108         };
 109
 110         pmu-io-domains {
 111                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 112                 rockchip,grf = <&pmugrf>;
 113                 pmu1830-supply = <&vcc_1v8>;
 114         };
 115
 116         dw_hdmi_audio: dw-hdmi-audio {
 117                 status = "okay";
 118                 compatible = "rockchip,dw-hdmi-audio";
 119                 #sound-dai-cells = <0>;
 120         };
 121
 122         hdmi_sound: hdmi-sound {
 123                 status = "disabled";
 124                 compatible = "simple-audio-card";
 125                 simple-audio-card,format = "i2s";
 126                 simple-audio-card,mclk-fs = <256>;
 127                 simple-audio-card,name = "rockchip,hdmi";
 128
 129                 simple-audio-card,cpu {
 130                         sound-dai = <&i2s2>;
 131                 };
 132                 simple-audio-card,codec {
 133                         sound-dai = <&dw_hdmi_audio>;
 134                 };
 135         };
 136
 137         sdio_pwrseq: sdio-pwrseq {
 138                 compatible = "mmc-pwrseq-simple";
 139                 clocks = <&rk818 1>;
 140                 clock-names = "ext_clock";
 141                 pinctrl-names = "default";
 142                 pinctrl-0 = <&wifi_enable_h>;
 143
 144                 /*
 145                  * On the module itself this is one of these (depending
 146                  * on the actual card populated):
 147                  * - SDIO_RESET_L_WL_REG_ON
 148                  * - PDN (power down when low)
 149                  */
 150                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
 151         };
 152
 153         wireless-wlan {
 154                 compatible = "wlan-platdata";
 155                 rockchip,grf = <&grf>;
 156                 wifi_chip_type = "ap6330";
 157                 sdio_vref = <1800>;
 158                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
 159                 status = "okay";
 160         };
 161
 162         wireless-bluetooth {
 163                 compatible = "bluetooth-platdata";
 164                 clocks = <&rk818 1>;
 165                 clock-names = "ext_clock";
 166                 //wifi-bt-power-toggle;
 167                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
 168                 pinctrl-names = "default", "rts_gpio";
 169                 pinctrl-0 = <&uart0_rts>;
 170                 pinctrl-1 = <&uart0_gpios>;
 171                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
 172                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
 173                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
 174                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
 175                 status = "okay";
 176         };
 177
 178         uboot-charge {
 179                 compatible = "rockchip,uboot-charge";
 180                 rockchip,uboot-charge-on = <0>;
 181                 rockchip,android-charge-on = <1>;
 182         };
 183
 184         mpu6500_hid {
 185                 status = "okay";
 186                 compatible = "inv-hid,mpu6500";
 187         };
 188 };
 189
 190 &cluster0_opp {
 191         opp@408000000 {
 192                 opp-hz = /bits/ 64 <408000000>;
 193                 opp-microvolt = <800000>;
 194                 clock-latency-ns = <40000>;
 195         };
 196         opp@600000000 {
 197                 opp-hz = /bits/ 64 <600000000>;
 198                 opp-microvolt = <800000>;
 199                 clock-latency-ns = <40000>;
 200         };
 201         opp@816000000 {
 202                 opp-hz = /bits/ 64 <816000000>;
 203                 opp-microvolt = <800000>;
 204                 clock-latency-ns = <40000>;
 205         };
 206         opp@1008000000 {
 207                 opp-hz = /bits/ 64 <1008000000>;
 208                 opp-microvolt = <850000>;
 209                 clock-latency-ns = <40000>;
 210         };
 211         opp@1200000000 {
 212                 opp-hz = /bits/ 64 <1200000000>;
 213                 opp-microvolt = <925000>;
 214                 clock-latency-ns = <40000>;
 215         };
 216         opp@1416000000 {
 217                 opp-hz = /bits/ 64 <1416000000>;
 218                 opp-microvolt = <1075000>;
 219                 clock-latency-ns = <40000>;
 220         };
 221         opp@1512000000 {
 222                 opp-hz = /bits/ 64 <1512000000>;
 223                 opp-microvolt = <1100000>;
 224                 clock-latency-ns = <40000>;
 225                 status="disabled";
 226         };
 227 };
 228
 229 &cluster1_opp {
 230         opp@408000000 {
 231                 opp-hz = /bits/ 64 <408000000>;
 232                 opp-microvolt = <800000>;
 233                 clock-latency-ns = <40000>;
 234         };
 235         opp@600000000 {
 236                 opp-hz = /bits/ 64 <600000000>;
 237                 opp-microvolt = <800000>;
 238                 clock-latency-ns = <40000>;
 239         };
 240         opp@816000000 {
 241                 opp-hz = /bits/ 64 <816000000>;
 242                 opp-microvolt = <825000>;
 243                 clock-latency-ns = <40000>;
 244         };
 245         opp@1008000000 {
 246                 opp-hz = /bits/ 64 <1008000000>;
 247                 opp-microvolt = <850000>;
 248                 clock-latency-ns = <40000>;
 249         };
 250         opp@1200000000 {
 251                 opp-hz = /bits/ 64 <1200000000>;
 252                 opp-microvolt = <900000>;
 253                 clock-latency-ns = <40000>;
 254         };
 255         opp@1416000000 {
 256                 opp-hz = /bits/ 64 <1416000000>;
 257                 opp-microvolt = <1000000>;
 258                 clock-latency-ns = <40000>;
 259         };
 260         opp@1608000000 {
 261                 opp-hz = /bits/ 64 <1608000000>;
 262                 opp-microvolt = <1050000>;
 263                 clock-latency-ns = <40000>;
 264         };
 265         opp@1800000000 {
 266                 opp-hz = /bits/ 64 <1800000000>;
 267                 opp-microvolt = <1150000>;
 268                 clock-latency-ns = <40000>;
 269         };
 270         opp@1992000000 {
 271                 opp-hz = /bits/ 64 <1992000000>;
 272                 opp-microvolt = <1225000>;
 273                 clock-latency-ns = <40000>;
 274         };
 275 };
 276
 277 &CPU_COST_A72 {
 278         busy-cost-data = <
 279                 210   129       /*  408MHz */
 280                 308   184       /*  600MHz */
 281                 419   246       /*  816MHz */
 282                 518   335       /* 1008MHz */
 283                 617   428       /* 1200MHz */
 284                 728   573       /* 1416MHz */
 285                 827   724       /* 1608MHz */
 286                 925   900       /* 1800MHz */
 287                 1024  1108      /* 1992MHz */
 288         >;
 289         idle-cost-data = <
 290                 15
 291                 15
 292                 0
 293         >;
 294 };
 295
 296 &CPU_COST_A53 {
 297         busy-cost-data = <
 298                 108    46       /*  408M */
 299                 159    67       /*  600M */
 300                 216    90       /*  816M */
 301                 267    120      /* 1008M */
 302                 318    153      /* 1200M */
 303                 375    198      /* 1416M */
 304                 401    222      /* 1512M */
 305         >;
 306         idle-cost-data = <
 307                 6
 308                 6
 309                 0
 310         >;
 311 };
 312
 313 &CLUSTER_COST_A72 {
 314         busy-cost-data = <
 315                 210   129       /*  408MHz */
 316                 308   184       /*  600MHz */
 317                 419   246       /*  816MHz */
 318                 518   335       /* 1008MHz */
 319                 617   428       /* 1200MHz */
 320                 728   573       /* 1416MHz */
 321                 827   724       /* 1608MHz */
 322                 925   900       /* 1800MHz */
 323                 1024  1108      /* 1992MHz */
 324         >;
 325         idle-cost-data = <
 326                 65
 327                 65
 328                 65
 329         >;
 330 };
 331
 332 &CLUSTER_COST_A53 {
 333         busy-cost-data = <
 334                 108    46       /*  408M */
 335                 159    67       /*  600M */
 336                 216    90       /*  816M */
 337                 267    120      /* 1008M */
 338                 318    153      /* 1200M */
 339                 375    198      /* 1416M */
 340                 401    222      /* 1512M */
 341         >;
 342         idle-cost-data = <
 343                 56
 344                 56
 345                 56
 346         >;
 347 };
 348
 349 &gpu_opp_table {
 350         compatible = "operating-points-v2";
 351         opp-shared;
 352         opp@200000000 {
 353                 opp-hz = /bits/ 64 <200000000>;
 354                 opp-microvolt = <825000>;
 355         };
 356         opp@300000000 {
 357                 opp-hz = /bits/ 64 <300000000>;
 358                 opp-microvolt = <850000>;
 359         };
 360         opp@400000000 {
 361                 opp-hz = /bits/ 64 <400000000>;
 362                 opp-microvolt = <875000>;
 363         };
 364         opp@500000000 {
 365                 opp-hz = /bits/ 64 <500000000>;
 366                 opp-microvolt = <950000>;
 367         };
 368         opp@600000000 {
 369                 opp-hz = /bits/ 64 <600000000>;
 370                 opp-microvolt = <1025000>;
 371         };
 372         opp@800000000 {
 373                 opp-hz = /bits/ 64 <800000000>;
 374                 opp-microvolt = <1125000>;
 375         };
 376 };
 377
 378 &sdmmc {
 379         clock-frequency = <150000000>;
 380         clock-freq-min-max = <400000 150000000>;
 381         supports-sd;
 382         bus-width = <4>;
 383         cap-mmc-highspeed;
 384         cap-sd-highspeed;
 385         disable-wp;
 386         num-slots = <1>;
 387         sd-uhs-sdr104;
 388         vqmmc-supply = <&vcc_sd>;
 389         pinctrl-names = "default";
 390         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 391         status = "okay";
 392 };
 393
 394 &sdio0 {
 395         clock-frequency = <50000000>;
 396         clock-freq-min-max = <200000 50000000>;
 397         supports-sdio;
 398         bus-width = <4>;
 399         disable-wp;
 400         cap-sd-highspeed;
 401         cap-sdio-irq;
 402         keep-power-in-suspend;
 403         mmc-pwrseq = <&sdio_pwrseq>;
 404         non-removable;
 405         num-slots = <1>;
 406         pinctrl-names = "default";
 407         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 408         sd-uhs-sdr104;
 409         status = "okay";
 410 };
 411
 412 &emmc_phy {
 413         status = "okay";
 414 };
 415
 416 &sdhci {
 417         bus-width = <8>;
 418         mmc-hs400-1_8v;
 419         supports-emmc;
 420         non-removable;
 421         keep-power-in-suspend;
 422         mmc-hs400-enhanced-strobe;
 423         status = "okay";
 424 };
 425
 426 &i2c0 {
 427         status = "okay";
 428         i2c-scl-rising-time-ns = <219>;
 429         i2c-scl-falling-time-ns = <15>;
 430         /* clock-frequency = <400000>; */
 431
 432         fusb1: fusb30x@22 {
 433                 compatible = "fairchild,fusb302";
 434                 reg = <0x22>;
 435                 pinctrl-names = "default";
 436                 pinctrl-0 = <&fusb1_int>;
 437                 vbus-5v-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
 438                 int-n-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
 439                 status = "okay";
 440         };
 441
 442         vdd_cpu_b: syr827@40 {
 443                 compatible = "silergy,syr827";
 444                 reg = <0x40>;
 445                 vin-supply = <&vcc_sys>;
 446                 regulator-compatible = "fan53555-reg";
 447                 pinctrl-0 = <&vsel1_gpio>;
 448                 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 449                 regulator-name = "vdd_cpu_b";
 450                 regulator-min-microvolt = <712500>;
 451                 regulator-max-microvolt = <1500000>;
 452                 regulator-ramp-delay = <1000>;
 453                 fcs,suspend-voltage-selector = <1>;
 454                 regulator-always-on;
 455                 regulator-initial-state = <3>;
 456                         regulator-state-mem {
 457                         regulator-off-in-suspend;
 458                 };
 459         };
 460
 461         vdd_gpu: syr828@41 {
 462                 compatible = "silergy,syr828";
 463                 reg = <0x41>;
 464                 vin-supply = <&vcc_sys>;
 465                 regulator-compatible = "fan53555-reg";
 466                 pinctrl-0 = <&vsel2_gpio>;
 467                 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
 468                 regulator-name = "vdd_gpu";
 469                 regulator-min-microvolt = <712500>;
 470                 regulator-max-microvolt = <1500000>;
 471                 regulator-ramp-delay = <1000>;
 472                 fcs,suspend-voltage-selector = <1>;
 473                 regulator-boot-on;
 474                 regulator-initial-state = <3>;
 475                 regulator-initial-mode = <1>;/*1:pwm 2: auto mode*/
 476                         regulator-state-mem {
 477                         regulator-off-in-suspend;
 478                 };
 479         };
 480
 481         rk818: pmic@1c {
 482                 compatible = "rockchip,rk818";
 483                 status = "okay";
 484                 reg = <0x1c>;
 485                 clock-output-names = "xin32k", "wifibt_32kin";
 486                 interrupt-parent = <&gpio1>;
 487                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 488                 pinctrl-names = "default";
 489                 pinctrl-0 = <&pmic_int_l>;
 490                 rockchip,system-power-controller;
 491                 wakeup-source;
 492                 extcon = <&fusb0>;
 493                 #clock-cells = <1>;
 494
 495                 vcc1-supply = <&vcc_sys>;
 496                 vcc2-supply = <&vcc_sys>;
 497                 vcc3-supply = <&vcc_sys>;
 498                 vcc4-supply = <&vcc_sys>;
 499                 vcc6-supply = <&vcc_sys>;
 500                 vcc7-supply = <&vcc3v3_sys>;
 501                 vcc8-supply = <&vcc_sys>;
 502                 vcc9-supply = <&vcc3v3_sys>;
 503
 504                 regulators {
 505                         vdd_cpu_l: DCDC_REG1 {
 506                                 regulator-name = "vdd_cpu_l";
 507                                 regulator-always-on;
 508                                 regulator-boot-on;
 509                                 regulator-min-microvolt = <750000>;
 510                                 regulator-max-microvolt = <1350000>;
 511                                 regulator-ramp-delay = <6001>;
 512                                 regulator-state-mem {
 513                                         regulator-off-in-suspend;
 514                                 };
 515                         };
 516
 517                         vdd_center: DCDC_REG2 {
 518                                 regulator-name = "vdd_center";
 519                                 regulator-always-on;
 520                                 regulator-boot-on;
 521                                 regulator-min-microvolt = <800000>;
 522                                 regulator-max-microvolt = <1350000>;
 523                                 regulator-ramp-delay = <6001>;
 524                                 regulator-state-mem {
 525                                         regulator-off-in-suspend;
 526                                 };
 527                         };
 528
 529                         vcc_ddr: DCDC_REG3 {
 530                                 regulator-name = "vcc_ddr";
 531                                 regulator-always-on;
 532                                 regulator-boot-on;
 533                                 regulator-state-mem {
 534                                         regulator-on-in-suspend;
 535                                 };
 536                         };
 537
 538                         vcc_1v8: DCDC_REG4 {
 539                                 regulator-name = "vcc_1v8";
 540                                 regulator-always-on;
 541                                 regulator-boot-on;
 542                                 regulator-min-microvolt = <1800000>;
 543                                 regulator-max-microvolt = <1800000>;
 544                                 regulator-state-mem {
 545                                         regulator-on-in-suspend;
 546                                         regulator-suspend-microvolt = <1800000>;
 547                                 };
 548                         };
 549
 550                         vcc1v8_rk1608: LDO_REG1 {
 551                                 //regulator-always-on;
 552                                 //regulator-boot-on;
 553                                 regulator-min-microvolt = <1800000>;
 554                                 regulator-max-microvolt = <1800000>;
 555                                 regulator-name = "vcc1v8_rk1608";
 556                                 regulator-state-mem {
 557                                         regulator-off-in-suspend;
 558                                 };
 559                         };
 560
 561                         vdd1v8_rk1608: LDO_REG2 {
 562                                 //regulator-always-on;
 563                                 //regulator-boot-on;
 564                                 regulator-min-microvolt = <1800000>;
 565                                 regulator-max-microvolt = <1800000>;
 566                                 regulator-name = "vdd1v8_rk1608";
 567                                 regulator-state-mem {
 568                                         regulator-off-in-suspend;
 569                                 };
 570                         };
 571
 572                         vdd1v0_rk1608: LDO_REG3 {
 573                                 //regulator-always-on;
 574                                 //regulator-boot-on;
 575                                 regulator-min-microvolt = <1000000>;
 576                                 regulator-max-microvolt = <1000000>;
 577                                 regulator-name = "vdd1v0_rk1608";
 578                                 regulator-state-mem {
 579                                         regulator-off-in-suspend;
 580                                 };
 581                         };
 582
 583                         vcc_power_on: LDO_REG4 {
 584                                 regulator-always-on;
 585                                 regulator-boot-on;
 586                                 regulator-min-microvolt = <3300000>;
 587                                 regulator-max-microvolt = <3300000>;
 588                                 regulator-name = "vcc_power_on";
 589                                 regulator-state-mem {
 590                                         regulator-on-in-suspend;
 591                                         regulator-suspend-microvolt = <3300000>;
 592                                 };
 593                         };
 594
 595                         vdd_2v8: LDO_REG5 {
 596                                 //regulator-always-on;
 597                                 //regulator-boot-on;
 598                                 regulator-min-microvolt = <2800000>;
 599                                 regulator-max-microvolt = <2800000>;
 600                                 regulator-name = "vdd_2v8";
 601                                 regulator-state-mem {
 602                                         regulator-on-in-suspend;
 603                                         regulator-suspend-microvolt = <2800000>;
 604                                 };
 605                         };
 606
 607                         vcc_1v5: LDO_REG6 {
 608                                 //regulator-always-on;
 609                                 //regulator-boot-on;
 610                                 regulator-min-microvolt = <1500000>;
 611                                 regulator-max-microvolt = <1500000>;
 612                                 regulator-name = "vcc_1v5";
 613                                 regulator-state-mem {
 614                                         regulator-on-in-suspend;
 615                                         regulator-suspend-microvolt = <1500000>;
 616                                 };
 617                         };
 618
 619                         vcc1v8_dvp: LDO_REG7 {
 620                                 //regulator-always-on;
 621                                 //regulator-boot-on;
 622                                 regulator-min-microvolt = <1800000>;
 623                                 regulator-max-microvolt = <1800000>;
 624                                 regulator-name = "vcc1v8_dvp";
 625                                 regulator-state-mem {
 626                                         regulator-on-in-suspend;
 627                                         regulator-suspend-microvolt = <1800000>;
 628                                 };
 629                         };
 630
 631                         vcc3v3_s3: LDO_REG8 {
 632                                 regulator-always-on;
 633                                 regulator-boot-on;
 634                                 regulator-min-microvolt = <3300000>;
 635                                 regulator-max-microvolt = <3300000>;
 636                                 regulator-name = "vcc3v3_s3";
 637                                 regulator-state-mem {
 638                                         regulator-on-in-suspend;
 639                                         regulator-suspend-microvolt = <3300000>;
 640                                 };
 641                         };
 642
 643                         vcc_sd: LDO_REG9 {
 644                                 regulator-always-on;
 645                                 regulator-boot-on;
 646                                 regulator-min-microvolt = <1800000>;
 647                                 regulator-max-microvolt = <3300000>;
 648                                 regulator-name = "vcc_sd";
 649                                 regulator-state-mem {
 650                                         regulator-on-in-suspend;
 651                                         regulator-suspend-microvolt = <3300000>;
 652                                 };
 653                         };
 654
 655                         vcc3v3_s0: SWITCH_REG {
 656                                 regulator-always-on;
 657                                 regulator-boot-on;
 658                                 regulator-name = "vcc3v3_s0";
 659                                 regulator-state-mem {
 660                                         regulator-on-in-suspend;
 661                                 };
 662                         };
 663                 };
 664
 665                 battery {
 666                         compatible = "rk818-battery";
 667                         ocv_table = <
 668                                 3400 3599 3671 3701 3728 3746 3762
 669                                 3772 3781 3792 3816 3836 3866 3910
 670                                 3942 3971 4002 4050 4088 4132 4183>;
 671                         design_capacity = <4000>;
 672                         design_qmax = <4100>;
 673                         bat_res = <100>;
 674                         max_input_current = <2000>;
 675                         max_chrg_current = <1800>;
 676                         max_chrg_voltage = <4200>;
 677                         sleep_enter_current = <300>;
 678                         sleep_exit_current = <300>;
 679                         power_off_thresd = <3400>;
 680                         zero_algorithm_vol = <3850>;
 681                         fb_temperature = <115>;
 682                         sample_res = <10>;
 683                         max_soc_offset = <60>;
 684                         energy_mode = <0>;
 685                         monitor_sec = <5>;
 686                         virtual_power = <1>;
 687                         power_dc2otg = <0>;
 688                 };
 689         };
 690 };
 691
 692 &i2c4 {
 693         status = "okay";
 694         i2c-scl-rising-time-ns = <345>;
 695         i2c-scl-falling-time-ns = <11>;
 696
 697         fusb0: fusb30x@22 {
 698                 compatible = "fairchild,fusb302";
 699                 reg = <0x22>;
 700                 pinctrl-names = "default";
 701                 pinctrl-0 = <&fusb0_int>;
 702                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 703                 status = "okay";
 704         };
 705 };
 706
 707 &threshold {
 708         temperature = <85000>; /* millicelsius */
 709 };
 710
 711 &target {
 712         temperature = <100000>; /* millicelsius */
 713 };
 714
 715 &soc_crit {
 716         temperature = <105000>; /* millicelsius */
 717 };
 718
 719 &tsadc {
 720         rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
 721         rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
 722         rockchip,hw-tshut-temp = <110000>;
 723         status = "okay";
 724 };
 725
 726 &saradc {
 727         status = "okay";
 728 };
 729
 730 &rk_key {
 731         compatible = "rockchip,key";
 732         status = "okay";
 733         io-channels = <&saradc 1>;
 734
 735         power-key {
 736                 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
 737                 linux,code = <116>;
 738                 label = "power";
 739                 gpio-key,wakeup;
 740         };
 741 };
 742
 743 &u2phy0 {
 744         extcon = <&fusb0>;
 745         status = "okay";
 746
 747         u2phy0_otg: otg-port {
 748                 status = "okay";
 749         };
 750 };
 751
 752 &u2phy1 {
 753         extcon = <&fusb1>;
 754         status = "okay";
 755
 756         u2phy1_otg: otg-port {
 757                 status = "okay";
 758         };
 759 };
 760
 761 &uart0 {
 762         pinctrl-names = "default";
 763         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 764         status = "okay";
 765 };
 766
 767 &uart2 {
 768         status = "okay";
 769 };
 770
 771 &usbdrd3_0 {
 772         extcon = <&fusb0>;
 773         status = "okay";
 774 };
 775
 776 &usbdrd_dwc3_0 {
 777         status = "okay";
 778 };
 779
 780 &usbdrd3_1 {
 781         extcon = <&fusb1>;
 782         status = "okay";
 783 };
 784
 785 &usbdrd_dwc3_1 {
 786         status = "okay";
 787 };
 788
 789 &tcphy0 {
 790         status = "okay";
 791         extcon = <&fusb0>;
 792 };
 793
 794 &tcphy1 {
 795         status = "okay";
 796         extcon = <&fusb1>;
 797 };
 798
 799 &pwm2 {
 800         status = "okay";
 801 };
 802
 803 &rk_screen {
 804         #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
 805 };
 806
 807 &disp_timings {
 808         native-mode = <&timing0>; /* 720p */
 809 };
 810
 811 &timing0 {
 812         screen-width = <130>;
 813         screen-hight = <72>;
 814 };
 815 /*
 816 &fb {
 817         rockchip,uboot-logo-on = <1>;
 818         rockchip,disp-mode = <NO_DUAL>;
 819         //rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
 820 };
 821 */
 822 &vopb_rk_fb {
 823         status = "okay";
 824 };
 825
 826 &vopl_rk_fb {
 827         status = "okay";
 828 };
 829
 830 &hdmi_rk_fb {
 831         status = "okay";
 832         rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC1>;
 833 };
 834
 835 &cdn_dp_fb {
 836         status = "okay";
 837         extcon = <&fusb0>, <&fusb1>;
 838         dp_vop_sel = <DISPLAY_SOURCE_LCDC0>;
 839 };
 840
 841 &cdn_dp_sound {
 842         status = "okay";
 843 };
 844
 845 &cpu_l0 {
 846         cpu-supply = <&vdd_cpu_l>;
 847 };
 848
 849 &cpu_l1 {
 850         cpu-supply = <&vdd_cpu_l>;
 851 };
 852
 853 &cpu_l2 {
 854         cpu-supply = <&vdd_cpu_l>;
 855 };
 856
 857 &cpu_l3 {
 858         cpu-supply = <&vdd_cpu_l>;
 859 };
 860
 861 &cpu_b0 {
 862         cpu-supply = <&vdd_cpu_b>;
 863 };
 864
 865 &cpu_b1 {
 866         cpu-supply = <&vdd_cpu_b>;
 867 };
 868
 869 &gpu {
 870         status = "okay";
 871         mali-supply = <&vdd_gpu>;
 872 };
 873
 874 &pinctrl {
 875         sdio-pwrseq {
 876                 wifi_enable_h: wifi-enable-h {
 877                         rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
 878                 };
 879         };
 880
 881         wireless-bluetooth {
 882                 uart0_gpios: uart0-gpios {
 883                         rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
 884                 };
 885         };
 886
 887         pmic {
 888                 pmic_int_l: pmic-int-l {
 889                         rockchip,pins =
 890                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 891                 };
 892
 893                 vsel1_gpio: vsel1-gpio {
 894                         rockchip,pins =
 895                                 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
 896                 };
 897
 898                 vsel2_gpio: vsel2-gpio {
 899                         rockchip,pins =
 900                                 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
 901                 };
 902         };
 903
 904         spi1 {
 905                 spi1_gpio: spi1-gpio {
 906                         rockchip,pins =
 907                                 <1 7 RK_FUNC_GPIO &pcfg_output_low>,
 908                                 <1 8 RK_FUNC_GPIO &pcfg_output_low>,
 909                                 <1 9 RK_FUNC_GPIO &pcfg_output_low>,
 910                                 <1 10 RK_FUNC_GPIO &pcfg_output_low>;
 911                 };
 912         };
 913
 914         fusb30x {
 915                 fusb0_int: fusb0-int {
 916                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
 917                 };
 918
 919                 fusb1_int: fusb1-int {
 920                         rockchip,pins = <1 24 RK_FUNC_GPIO &pcfg_pull_up>;
 921                 };
 922         };
 923 };