2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include <dt-bindings/sensor-dev.h>
46 #include "rk3399.dtsi"
47 #include "rk3399-android.dtsi"
48 #include "rk3399-opp.dtsi"
51 model = "Rockchip RK3399 VR Board";
52 compatible = "rockchip,vr", "rockchip,rk3399";
55 compatible = "pwm-regulator";
56 pwms = <&pwm2 0 25000 0>;
58 rockchip,pwm_voltage = <900000>;
59 regulator-name = "vdd_log";
60 regulator-min-microvolt = <800000>;
61 regulator-max-microvolt = <1400000>;
67 compatible = "regulator-fixed";
68 regulator-name = "vcc_sys";
71 regulator-min-microvolt = <4000000>;
72 regulator-max-microvolt = <4000000>;
75 vcc3v3_sys: vcc3v3-sys {
76 compatible = "regulator-fixed";
77 regulator-name = "vcc3v3_sys";
80 regulator-min-microvolt = <3300000>;
81 regulator-max-microvolt = <3300000>;
84 vcc_phy: vcc-phy-regulator {
85 compatible = "regulator-fixed";
86 regulator-name = "vcc_phy";
91 vcc1v8_s3: vcc1v8-s3-regulator {
92 compatible = "regulator-fixed";
93 regulator-name = "vcc1v8_s3";
97 regulator-off-in-suspend;
102 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
103 rockchip,grf = <&pmugrf>;
104 pmu1830-supply = <&vcc_1v8>;
107 dw_hdmi_audio: dw-hdmi-audio {
109 compatible = "rockchip,dw-hdmi-audio";
110 #sound-dai-cells = <0>;
113 hdmi_sound: hdmi-sound {
115 compatible = "simple-audio-card";
116 simple-audio-card,format = "i2s";
117 simple-audio-card,mclk-fs = <256>;
118 simple-audio-card,name = "rockchip,hdmi";
120 simple-audio-card,cpu {
123 simple-audio-card,codec {
124 sound-dai = <&dw_hdmi_audio>;
128 sdio_pwrseq: sdio-pwrseq {
129 compatible = "mmc-pwrseq-simple";
131 clock-names = "ext_clock";
132 pinctrl-names = "default";
133 pinctrl-0 = <&wifi_enable_h>;
136 * On the module itself this is one of these (depending
137 * on the actual card populated):
138 * - SDIO_RESET_L_WL_REG_ON
139 * - PDN (power down when low)
141 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
145 compatible = "wlan-platdata";
146 rockchip,grf = <&grf>;
147 wifi_chip_type = "ap6330";
149 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
154 compatible = "bluetooth-platdata";
156 clock-names = "ext_clock";
157 //wifi-bt-power-toggle;
158 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
159 pinctrl-names = "default", "rts_gpio";
160 pinctrl-0 = <&uart0_rts>;
161 pinctrl-1 = <&uart0_gpios>;
162 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
163 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
164 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
165 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
170 compatible = "rockchip,uboot-charge";
171 rockchip,uboot-charge-on = <0>;
172 rockchip,android-charge-on = <1>;
177 compatible = "inv-hid,mpu6500";
182 clock-frequency = <150000000>;
183 clock-freq-min-max = <400000 150000000>;
191 vqmmc-supply = <&vcc_sd>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
198 clock-frequency = <50000000>;
199 clock-freq-min-max = <200000 50000000>;
205 keep-power-in-suspend;
206 mmc-pwrseq = <&sdio_pwrseq>;
209 pinctrl-names = "default";
210 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
224 keep-power-in-suspend;
225 mmc-hs400-enhanced-strobe;
231 i2c-scl-rising-time-ns = <219>;
232 i2c-scl-falling-time-ns = <15>;
233 /* clock-frequency = <400000>; */
236 compatible = "fairchild,fusb302";
238 pinctrl-names = "default";
239 pinctrl-0 = <&fusb1_int>;
240 vbus-5v-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
241 int-n-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
245 vdd_cpu_b: syr827@40 {
246 compatible = "silergy,syr827";
248 vin-supply = <&vcc_sys>;
249 regulator-compatible = "fan53555-reg";
250 pinctrl-0 = <&vsel1_gpio>;
251 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
252 regulator-name = "vdd_cpu_b";
253 regulator-min-microvolt = <712500>;
254 regulator-max-microvolt = <1500000>;
255 regulator-ramp-delay = <1000>;
256 fcs,suspend-voltage-selector = <1>;
258 regulator-initial-state = <3>;
259 regulator-state-mem {
260 regulator-off-in-suspend;
265 compatible = "silergy,syr828";
267 vin-supply = <&vcc_sys>;
268 regulator-compatible = "fan53555-reg";
269 pinctrl-0 = <&vsel2_gpio>;
270 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
271 regulator-name = "vdd_gpu";
272 regulator-min-microvolt = <712500>;
273 regulator-max-microvolt = <1500000>;
274 regulator-ramp-delay = <1000>;
275 fcs,suspend-voltage-selector = <1>;
277 regulator-initial-state = <3>;
278 regulator-initial-mode = <1>;/*1:pwm 2: auto mode*/
279 regulator-state-mem {
280 regulator-off-in-suspend;
285 compatible = "rockchip,rk818";
288 clock-output-names = "xin32k", "wifibt_32kin";
289 interrupt-parent = <&gpio1>;
290 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
291 pinctrl-names = "default";
292 pinctrl-0 = <&pmic_int_l>;
293 rockchip,system-power-controller;
298 vcc1-supply = <&vcc_sys>;
299 vcc2-supply = <&vcc_sys>;
300 vcc3-supply = <&vcc_sys>;
301 vcc4-supply = <&vcc_sys>;
302 vcc6-supply = <&vcc_sys>;
303 vcc7-supply = <&vcc3v3_sys>;
304 vcc8-supply = <&vcc_sys>;
305 vcc9-supply = <&vcc3v3_sys>;
308 vdd_cpu_l: DCDC_REG1 {
309 regulator-name = "vdd_cpu_l";
312 regulator-min-microvolt = <750000>;
313 regulator-max-microvolt = <1350000>;
314 regulator-ramp-delay = <6001>;
315 regulator-state-mem {
316 regulator-off-in-suspend;
320 vdd_center: DCDC_REG2 {
321 regulator-name = "vdd_center";
324 regulator-min-microvolt = <800000>;
325 regulator-max-microvolt = <1350000>;
326 regulator-ramp-delay = <6001>;
327 regulator-state-mem {
328 regulator-off-in-suspend;
333 regulator-name = "vcc_ddr";
336 regulator-state-mem {
337 regulator-on-in-suspend;
342 regulator-name = "vcc_1v8";
345 regulator-min-microvolt = <1800000>;
346 regulator-max-microvolt = <1800000>;
347 regulator-state-mem {
348 regulator-on-in-suspend;
349 regulator-suspend-microvolt = <1800000>;
353 vcc1v8_rk1608: LDO_REG1 {
354 //regulator-always-on;
356 regulator-min-microvolt = <1800000>;
357 regulator-max-microvolt = <1800000>;
358 regulator-name = "vcc1v8_rk1608";
359 regulator-state-mem {
360 regulator-off-in-suspend;
364 vdd1v8_rk1608: LDO_REG2 {
365 //regulator-always-on;
367 regulator-min-microvolt = <1800000>;
368 regulator-max-microvolt = <1800000>;
369 regulator-name = "vdd1v8_rk1608";
370 regulator-state-mem {
371 regulator-off-in-suspend;
375 vdd1v0_rk1608: LDO_REG3 {
376 //regulator-always-on;
378 regulator-min-microvolt = <1000000>;
379 regulator-max-microvolt = <1000000>;
380 regulator-name = "vdd1v0_rk1608";
381 regulator-state-mem {
382 regulator-off-in-suspend;
386 vcc_power_on: LDO_REG4 {
389 regulator-min-microvolt = <3300000>;
390 regulator-max-microvolt = <3300000>;
391 regulator-name = "vcc_power_on";
392 regulator-state-mem {
393 regulator-on-in-suspend;
394 regulator-suspend-microvolt = <3300000>;
399 //regulator-always-on;
401 regulator-min-microvolt = <2800000>;
402 regulator-max-microvolt = <2800000>;
403 regulator-name = "vdd_2v8";
404 regulator-state-mem {
405 regulator-on-in-suspend;
406 regulator-suspend-microvolt = <2800000>;
411 //regulator-always-on;
413 regulator-min-microvolt = <1500000>;
414 regulator-max-microvolt = <1500000>;
415 regulator-name = "vcc_1v5";
416 regulator-state-mem {
417 regulator-on-in-suspend;
418 regulator-suspend-microvolt = <1500000>;
422 vcc1v8_dvp: LDO_REG7 {
423 //regulator-always-on;
425 regulator-min-microvolt = <1800000>;
426 regulator-max-microvolt = <1800000>;
427 regulator-name = "vcc1v8_dvp";
428 regulator-state-mem {
429 regulator-on-in-suspend;
430 regulator-suspend-microvolt = <1800000>;
434 vcc3v3_s3: LDO_REG8 {
437 regulator-min-microvolt = <3300000>;
438 regulator-max-microvolt = <3300000>;
439 regulator-name = "vcc3v3_s3";
440 regulator-state-mem {
441 regulator-on-in-suspend;
442 regulator-suspend-microvolt = <3300000>;
449 regulator-min-microvolt = <1800000>;
450 regulator-max-microvolt = <3300000>;
451 regulator-name = "vcc_sd";
452 regulator-state-mem {
453 regulator-on-in-suspend;
454 regulator-suspend-microvolt = <3300000>;
458 vcc3v3_s0: SWITCH_REG {
461 regulator-name = "vcc3v3_s0";
462 regulator-state-mem {
463 regulator-on-in-suspend;
469 compatible = "rk818-battery";
471 3400 3599 3671 3701 3728 3746 3762
472 3772 3781 3792 3816 3836 3866 3910
473 3942 3971 4002 4050 4088 4132 4183>;
474 design_capacity = <4000>;
475 design_qmax = <4100>;
477 max_input_current = <2000>;
478 max_chrg_current = <1800>;
479 max_chrg_voltage = <4200>;
480 sleep_enter_current = <300>;
481 sleep_exit_current = <300>;
482 power_off_thresd = <3400>;
483 zero_algorithm_vol = <3850>;
484 fb_temperature = <115>;
486 max_soc_offset = <60>;
497 i2c-scl-rising-time-ns = <345>;
498 i2c-scl-falling-time-ns = <11>;
501 compatible = "fairchild,fusb302";
503 pinctrl-names = "default";
504 pinctrl-0 = <&fusb0_int>;
505 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
513 bt656-supply = <&vcc1v8_s3>;
514 audio-supply = <&vcc1v8_s3>;
515 sdmmc-supply = <&vcc_sd>;
516 gpio1830-supply = <&vcc1v8_s3>;
520 temperature = <85000>; /* millicelsius */
524 temperature = <100000>; /* millicelsius */
528 temperature = <105000>; /* millicelsius */
532 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
533 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
534 rockchip,hw-tshut-temp = <110000>;
543 compatible = "rockchip,key";
545 io-channels = <&saradc 1>;
548 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
559 u2phy0_otg: otg-port {
568 u2phy1_otg: otg-port {
574 pinctrl-names = "default";
575 pinctrl-0 = <&uart0_xfer &uart0_cts>;
616 #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
620 native-mode = <&timing0>; /* 720p */
624 screen-width = <130>;
629 rockchip,uboot-logo-on = <1>;
630 rockchip,disp-mode = <NO_DUAL>;
631 //rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
644 rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC1>;
649 extcon = <&fusb0>, <&fusb1>;
650 dp_vop_sel = <DISPLAY_SOURCE_LCDC0>;
658 cpu-supply = <&vdd_cpu_l>;
662 cpu-supply = <&vdd_cpu_l>;
666 cpu-supply = <&vdd_cpu_l>;
670 cpu-supply = <&vdd_cpu_l>;
674 cpu-supply = <&vdd_cpu_b>;
678 cpu-supply = <&vdd_cpu_b>;
683 mali-supply = <&vdd_gpu>;
688 wifi_enable_h: wifi-enable-h {
689 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
694 uart0_gpios: uart0-gpios {
695 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
700 pmic_int_l: pmic-int-l {
702 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
705 vsel1_gpio: vsel1-gpio {
707 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
710 vsel2_gpio: vsel2-gpio {
712 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
717 spi1_gpio: spi1-gpio {
719 <1 7 RK_FUNC_GPIO &pcfg_output_low>,
720 <1 8 RK_FUNC_GPIO &pcfg_output_low>,
721 <1 9 RK_FUNC_GPIO &pcfg_output_low>,
722 <1 10 RK_FUNC_GPIO &pcfg_output_low>;
727 fusb0_int: fusb0-int {
728 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
731 fusb1_int: fusb1-int {
732 rockchip,pins = <1 24 RK_FUNC_GPIO &pcfg_pull_up>;