arm64: dts: rockchip: add mmc dt-bindings for rk3328 and evb board
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-opp.dtsi
1 /*
2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This library is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This library is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
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24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 #include "rk3399-sched-energy.dtsi"
44
45 / {
46         cluster0_opp: opp-table0 {
47                 compatible = "operating-points-v2";
48                 opp-shared;
49
50                 opp00 {
51                         opp-hz = /bits/ 64 <408000000>;
52                         opp-microvolt = <800000>;
53                         clock-latency-ns = <40000>;
54                 };
55                 opp01 {
56                         opp-hz = /bits/ 64 <600000000>;
57                         opp-microvolt = <800000>;
58                         clock-latency-ns = <40000>;
59                 };
60                 opp02 {
61                         opp-hz = /bits/ 64 <816000000>;
62                         opp-microvolt = <800000>;
63                         clock-latency-ns = <40000>;
64                         opp-suspend;
65                 };
66                 opp03 {
67                         opp-hz = /bits/ 64 <1008000000>;
68                         opp-microvolt = <850000>;
69                         clock-latency-ns = <40000>;
70                 };
71                 opp04 {
72                         opp-hz = /bits/ 64 <1200000000>;
73                         opp-microvolt = <925000>;
74                         clock-latency-ns = <40000>;
75                 };
76                 opp05 {
77                         opp-hz = /bits/ 64 <1416000000>;
78                         opp-microvolt = <1050000>;
79                         clock-latency-ns = <40000>;
80                 };
81                 opp06 {
82                         opp-hz = /bits/ 64 <1512000000>;
83                         opp-microvolt = <1125000>;
84                         clock-latency-ns = <40000>;
85                 };
86         };
87
88         cluster1_opp: opp-table1 {
89                 compatible = "operating-points-v2";
90                 opp-shared;
91
92                 opp00 {
93                         opp-hz = /bits/ 64 <408000000>;
94                         opp-microvolt = <800000>;
95                         clock-latency-ns = <40000>;
96                 };
97                 opp01 {
98                         opp-hz = /bits/ 64 <600000000>;
99                         opp-microvolt = <800000>;
100                         clock-latency-ns = <40000>;
101                 };
102                 opp02 {
103                         opp-hz = /bits/ 64 <816000000>;
104                         opp-microvolt = <825000>;
105                         clock-latency-ns = <40000>;
106                         opp-suspend;
107                 };
108                 opp03 {
109                         opp-hz = /bits/ 64 <1008000000>;
110                         opp-microvolt = <850000>;
111                         clock-latency-ns = <40000>;
112                 };
113                 opp04 {
114                         opp-hz = /bits/ 64 <1200000000>;
115                         opp-microvolt = <900000>;
116                         clock-latency-ns = <40000>;
117                 };
118                 opp05 {
119                         opp-hz = /bits/ 64 <1416000000>;
120                         opp-microvolt = <1000000>;
121                         clock-latency-ns = <40000>;
122                 };
123                 opp06 {
124                         opp-hz = /bits/ 64 <1608000000>;
125                         opp-microvolt = <1050000>;
126                         clock-latency-ns = <40000>;
127                 };
128                 opp07 {
129                         opp-hz = /bits/ 64 <1800000000>;
130                         opp-microvolt = <1150000>;
131                         clock-latency-ns = <40000>;
132                 };
133                 opp08 {
134                         opp-hz = /bits/ 64 <1992000000>;
135                         opp-microvolt = <1225000>;
136                         clock-latency-ns = <40000>;
137                 };
138         };
139
140         gpu_opp_table: opp-table2 {
141                 compatible = "operating-points-v2";
142
143                 opp00 {
144                         opp-hz = /bits/ 64 <200000000>;
145                         opp-microvolt = <800000>;
146                 };
147                 opp01 {
148                         opp-hz = /bits/ 64 <297000000>;
149                         opp-microvolt = <800000>;
150                 };
151                 opp02 {
152                         opp-hz = /bits/ 64 <400000000>;
153                         opp-microvolt = <800000>;
154                 };
155                 opp03 {
156                         opp-hz = /bits/ 64 <500000000>;
157                         opp-microvolt = <825000>;
158                 };
159                 opp04 {
160                         opp-hz = /bits/ 64 <594000000>;
161                         opp-microvolt = <900000>;
162                 };
163                 opp05 {
164                         opp-hz = /bits/ 64 <800000000>;
165                         opp-microvolt = <1050000>;
166                 };
167         };
168
169         dmc_opp_table: opp-table3 {
170                 compatible = "operating-points-v2";
171
172                 opp00 {
173                         opp-hz = /bits/ 64 <200000000>;
174                         opp-microvolt = <825000>;
175                 };
176                 opp01 {
177                         opp-hz = /bits/ 64 <297000000>;
178                         opp-microvolt = <850000>;
179                 };
180                 opp02 {
181                         opp-hz = /bits/ 64 <400000000>;
182                         opp-microvolt = <850000>;
183                 };
184                 opp03 {
185                         opp-hz = /bits/ 64 <594000000>;
186                         opp-microvolt = <900000>;
187                 };
188                 opp04 {
189                         opp-hz = /bits/ 64 <800000000>;
190                         opp-microvolt = <900000>;
191                 };
192         };
193 };
194
195 &cpu_l0 {
196         operating-points-v2 = <&cluster0_opp>;
197         sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
198 };
199
200 &cpu_l1 {
201         operating-points-v2 = <&cluster0_opp>;
202         sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
203 };
204
205 &cpu_l2 {
206         operating-points-v2 = <&cluster0_opp>;
207         sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
208 };
209
210 &cpu_l3 {
211         operating-points-v2 = <&cluster0_opp>;
212         sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
213 };
214
215 &cpu_b0 {
216         operating-points-v2 = <&cluster1_opp>;
217         sched-energy-costs = <&RK3399_CPU_COST_1 &RK3399_CLUSTER_COST_1>;
218 };
219
220 &cpu_b1 {
221         operating-points-v2 = <&cluster1_opp>;
222         sched-energy-costs = <&RK3399_CPU_COST_1 &RK3399_CLUSTER_COST_1>;
223 };
224
225 &gpu {
226         operating-points-v2 = <&gpu_opp_table>;
227 };
228
229 &dmc {
230         operating-points-v2 = <&dmc_opp_table>;
231 };