2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
47 #include <dt-bindings/sensor-dev.h>
48 #include <dt-bindings/pwm/pwm.h>
51 compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
53 hall_sensor: hall-mh248 {
54 compatible = "hall-mh248";
55 pinctrl-names = "default";
56 pinctrl-0 = <&mh248_irq_gpio>;
57 irq-gpio = <&gpio1 2 IRQ_TYPE_EDGE_BOTH>;
63 compatible = "regulator-fixed";
64 regulator-name = "vcc_sys";
67 regulator-min-microvolt = <3900000>;
68 regulator-max-microvolt = <3900000>;
71 vcc3v3_sys: vcc3v3-sys {
72 compatible = "regulator-fixed";
73 regulator-name = "vcc3v3_sys";
76 regulator-min-microvolt = <3300000>;
77 regulator-max-microvolt = <3300000>;
80 vcc5v0_host: vcc5v0-host-regulator {
81 compatible = "regulator-fixed";
83 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
84 pinctrl-names = "default";
85 pinctrl-0 = <&host_vbus_drv>;
86 regulator-name = "vcc5v0_host";
90 compatible = "pwm-regulator";
91 pwms = <&pwm2 0 25000 0>;
93 rockchip,pwm_voltage = <900000>;
94 regulator-name = "vdd_log";
95 regulator-min-microvolt = <750000>;
96 regulator-max-microvolt = <1350000>;
101 backlight: backlight {
102 compatible = "pwm-backlight";
103 pwms = <&vop0_pwm 0 25000 PWM_POLARITY_INVERTED>;
104 brightness-levels = <
105 0 1 51 52 52 53 53 54
106 54 55 55 56 56 57 57 58
107 58 59 59 60 61 61 62 63
108 63 64 65 65 66 67 67 68
109 69 69 70 71 71 72 73 73
110 74 75 75 76 77 77 78 79
111 79 80 80 81 81 82 83 83
112 84 85 86 86 87 88 89 89
113 90 91 92 92 93 94 95 95
114 96 97 98 98 99 100 101 101
115 102 103 104 104 105 106 107 107
116 108 109 110 110 111 112 113 113
117 114 115 116 116 117 118 119 119
118 120 121 122 122 123 124 125 125
119 126 127 128 128 129 130 131 131
120 132 133 134 134 135 136 137 137
121 138 139 140 140 141 142 143 143
122 144 145 146 146 147 148 149 149
123 150 151 152 152 153 154 155 155
124 156 157 158 158 159 160 161 161
125 162 163 164 164 165 166 167 167
126 168 169 170 170 171 172 173 173
127 174 175 176 176 177 178 179 179
128 180 181 182 182 183 184 185 185
129 186 187 188 188 189 190 191 191
130 216 217 218 218 219 220 221 221
131 222 223 224 224 225 226 227 227
132 228 229 230 230 231 232 233 233
133 234 235 236 236 237 238 239 239
134 240 241 242 242 243 244 245 245
135 246 247 248 248 249 250 251 251
136 252 253 254 254 255 255 255 255>;
137 default-brightness-level = <200>;
138 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
141 vcc_phy: vcc-phy-regulator {
142 compatible = "regulator-fixed";
143 regulator-name = "vcc_phy";
149 compatible = "rockchip,rk3399-io-voltage-domain";
150 rockchip,grf = <&grf>;
152 bt656-supply = <&vcc1v8_dvp>;
153 audio-supply = <&vcca1v8_codec>;
154 sdmmc-supply = <&vcc_sd>;
155 gpio1830-supply = <&vcc_3v0>;
159 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
160 rockchip,grf = <&pmugrf>;
162 pmu1830-supply = <&vcc_1v8>;
166 compatible = "simple-audio-card";
167 simple-audio-card,format = "i2s";
168 simple-audio-card,name = "rockchip,es8316-codec";
169 simple-audio-card,mclk-fs = <256>;
170 simple-audio-card,widgets =
171 "Microphone", "Mic Jack",
172 "Headphone", "Headphone Jack";
173 simple-audio-card,routing =
174 "Mic Jack", "MICBIAS1",
176 "Headphone Jack", "HPOL",
177 "Headphone Jack", "HPOR";
178 simple-audio-card,cpu {
181 simple-audio-card,codec {
182 sound-dai = <&es8316>;
187 compatible = "simple-audio-card";
188 simple-audio-card,name = "rockchip,spdif";
189 simple-audio-card,cpu {
190 sound-dai = <&spdif>;
192 simple-audio-card,codec {
193 sound-dai = <&spdif_out>;
197 spdif_out: spdif-out {
198 compatible = "linux,spdif-dit";
199 #sound-dai-cells = <0>;
202 sdio_pwrseq: sdio-pwrseq {
203 compatible = "mmc-pwrseq-simple";
205 clock-names = "ext_clock";
206 pinctrl-names = "default";
207 pinctrl-0 = <&wifi_enable_h>;
210 * On the module itself this is one of these (depending
211 * on the actual card populated):
212 * - SDIO_RESET_L_WL_REG_ON
213 * - PDN (power down when low)
215 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
219 compatible = "wlan-platdata";
220 rockchip,grf = <&grf>;
221 wifi_chip_type = "ap6354";
223 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
228 compatible = "bluetooth-platdata";
230 clock-names = "ext_clock";
231 //wifi-bt-power-toggle;
232 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
233 pinctrl-names = "default", "rts_gpio";
234 pinctrl-0 = <&uart0_rts>;
235 pinctrl-1 = <&uart0_gpios>;
236 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
237 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
238 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
239 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
244 compatible = "rockchip,uboot-charge";
245 rockchip,uboot-charge-on = <0>;
246 rockchip,android-charge-on = <1>;
250 compatible = "rk-vibrator-gpio";
251 vibrator-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>;
256 compatible = "rockchip_headset";
257 headset_gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
258 pinctrl-names = "default";
259 pinctrl-0 = <&hp_det>;
260 io-channels = <&saradc 2>;
270 center-supply = <&vdd_center>;
272 downdifferential = <20>;
277 opp-hz = /bits/ 64 <300000000>;
278 opp-microvolt = <900000>;
281 opp-hz = /bits/ 64 <400000000>;
282 opp-microvolt = <900000>;
285 opp-hz = /bits/ 64 <528000000>;
286 opp-microvolt = <900000>;
289 opp-hz = /bits/ 64 <600000000>;
290 opp-microvolt = <900000>;
293 opp-hz = /bits/ 64 <666000000>;
294 opp-microvolt = <900000>;
301 opp-hz = /bits/ 64 <408000000>;
302 opp-microvolt = <800000>;
303 clock-latency-ns = <40000>;
306 opp-hz = /bits/ 64 <600000000>;
307 opp-microvolt = <800000>;
308 clock-latency-ns = <40000>;
311 opp-hz = /bits/ 64 <816000000>;
312 opp-microvolt = <800000>;
313 clock-latency-ns = <40000>;
316 opp-hz = /bits/ 64 <1008000000>;
317 opp-microvolt = <875000>;
318 clock-latency-ns = <40000>;
321 opp-hz = /bits/ 64 <1200000000>;
322 opp-microvolt = <925000>;
323 clock-latency-ns = <40000>;
326 opp-hz = /bits/ 64 <1416000000>;
327 opp-microvolt = <1050000>;
328 clock-latency-ns = <40000>;
331 opp-hz = /bits/ 64 <1512000000>;
332 opp-microvolt = <1100000>;
333 clock-latency-ns = <40000>;
340 opp-hz = /bits/ 64 <408000000>;
341 opp-microvolt = <800000>;
342 clock-latency-ns = <40000>;
345 opp-hz = /bits/ 64 <600000000>;
346 opp-microvolt = <800000>;
347 clock-latency-ns = <40000>;
350 opp-hz = /bits/ 64 <816000000>;
351 opp-microvolt = <825000>;
352 clock-latency-ns = <40000>;
355 opp-hz = /bits/ 64 <1008000000>;
356 opp-microvolt = <875000>;
357 clock-latency-ns = <40000>;
360 opp-hz = /bits/ 64 <1200000000>;
361 opp-microvolt = <950000>;
362 clock-latency-ns = <40000>;
365 opp-hz = /bits/ 64 <1416000000>;
366 opp-microvolt = <1025000>;
367 clock-latency-ns = <40000>;
370 opp-hz = /bits/ 64 <1608000000>;
371 opp-microvolt = <1100000>;
372 clock-latency-ns = <40000>;
375 opp-hz = /bits/ 64 <1800000000>;
376 opp-microvolt = <1175000>;
377 clock-latency-ns = <40000>;
380 opp-hz = /bits/ 64 <1992000000>;
381 opp-microvolt = <1250000>;
382 clock-latency-ns = <40000>;
391 518 335 /* 1008MHz */
392 617 428 /* 1200MHz */
393 728 573 /* 1416MHz */
394 827 724 /* 1608MHz */
395 925 900 /* 1800MHz */
396 1024 1108 /* 1992MHz */
427 518 335 /* 1008MHz */
428 617 428 /* 1200MHz */
429 728 573 /* 1416MHz */
430 827 724 /* 1608MHz */
431 925 900 /* 1800MHz */
432 1024 1108 /* 1992MHz */
459 compatible = "operating-points-v2";
462 opp-hz = /bits/ 64 <200000000>;
463 opp-microvolt = <825000>;
466 opp-hz = /bits/ 64 <300000000>;
467 opp-microvolt = <850000>;
470 opp-hz = /bits/ 64 <400000000>;
471 opp-microvolt = <875000>;
474 opp-hz = /bits/ 64 <500000000>;
475 opp-microvolt = <950000>;
478 opp-hz = /bits/ 64 <600000000>;
479 opp-microvolt = <1025000>;
482 opp-hz = /bits/ 64 <800000000>;
483 opp-microvolt = <1125000>;
488 compatible = "rockchip,key";
491 io-channels = <&saradc 1>;
496 rockchip,adc_value = <1>;
501 label = "volume down";
502 rockchip,adc_value = <170>;
506 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
515 rockchip,adc_value = <746>;
521 rockchip,adc_value = <355>;
527 rockchip,adc_value = <560>;
533 rockchip,adc_value = <450>;
538 clock-frequency = <50000000>;
539 clock-freq-min-max = <400000 150000000>;
547 vqmmc-supply = <&vcc_sd>;
548 pinctrl-names = "default";
549 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
554 clock-frequency = <150000000>;
555 clock-freq-min-max = <200000 150000000>;
561 keep-power-in-suspend;
562 mmc-pwrseq = <&sdio_pwrseq>;
565 pinctrl-names = "default";
566 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
580 keep-power-in-suspend;
581 mmc-hs400-enhanced-strobe;
587 rockchip,i2s-broken-burst-len;
588 rockchip,playback-channels = <8>;
589 rockchip,capture-channels = <8>;
590 #sound-dai-cells = <0>;
594 #sound-dai-cells = <0>;
599 #sound-dai-cells = <0>;
604 i2c-scl-rising-time-ns = <180>;
605 i2c-scl-falling-time-ns = <30>;
606 clock-frequency = <400000>;
608 vdd_cpu_b: syr837@40 {
609 compatible = "silergy,syr827";
611 vin-supply = <&vcc_sys>;
612 regulator-compatible = "fan53555-reg";
613 pinctrl-0 = <&vsel1_gpio>;
614 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
615 regulator-name = "vdd_cpu_b";
616 regulator-min-microvolt = <712500>;
617 regulator-max-microvolt = <1500000>;
618 regulator-ramp-delay = <1000>;
619 fcs,suspend-voltage-selector = <1>;
621 regulator-initial-state = <3>;
622 regulator-state-mem {
623 regulator-off-in-suspend;
628 compatible = "silergy,syr828";
631 vin-supply = <&vcc_sys>;
632 regulator-compatible = "fan53555-reg";
633 pinctrl-0 = <&vsel2_gpio>;
634 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
635 regulator-name = "vdd_gpu";
636 regulator-min-microvolt = <735000>;
637 regulator-max-microvolt = <1400000>;
638 regulator-ramp-delay = <1000>;
639 fcs,suspend-voltage-selector = <1>;
641 regulator-state-mem {
642 regulator-off-in-suspend;
647 compatible = "rockchip,rk818";
650 clock-output-names = "xin32k", "wifibt_32kin";
651 interrupt-parent = <&gpio1>;
652 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
653 pinctrl-names = "default";
654 pinctrl-0 = <&pmic_int_l>;
655 rockchip,system-power-controller;
656 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
661 vcc1-supply = <&vcc_sys>;
662 vcc2-supply = <&vcc_sys>;
663 vcc3-supply = <&vcc_sys>;
664 vcc4-supply = <&vcc_sys>;
665 vcc6-supply = <&vcc_sys>;
666 vcc7-supply = <&vcc3v3_sys>;
667 vcc8-supply = <&vcc_sys>;
668 vcc9-supply = <&vcc3v3_sys>;
671 vdd_cpu_l: DCDC_REG1 {
672 regulator-name = "vdd_cpu_l";
675 regulator-min-microvolt = <750000>;
676 regulator-max-microvolt = <1350000>;
677 regulator-ramp-delay = <6001>;
678 regulator-state-mem {
679 regulator-off-in-suspend;
683 vdd_center: DCDC_REG2 {
684 regulator-name = "vdd_center";
687 regulator-min-microvolt = <800000>;
688 regulator-max-microvolt = <1350000>;
689 regulator-ramp-delay = <6001>;
690 regulator-state-mem {
691 regulator-off-in-suspend;
696 regulator-name = "vcc_ddr";
699 regulator-state-mem {
700 regulator-on-in-suspend;
705 regulator-name = "vcc_1v8";
708 regulator-min-microvolt = <1800000>;
709 regulator-max-microvolt = <1800000>;
710 regulator-state-mem {
711 regulator-on-in-suspend;
712 regulator-suspend-microvolt = <1800000>;
716 vcca3v0_codec: LDO_REG1 {
719 regulator-min-microvolt = <3000000>;
720 regulator-max-microvolt = <3000000>;
721 regulator-name = "vcca3v0_codec";
722 regulator-state-mem {
723 regulator-off-in-suspend;
727 vcc3v0_tp: LDO_REG2 {
730 regulator-min-microvolt = <3000000>;
731 regulator-max-microvolt = <3000000>;
732 regulator-name = "vcc3v0_tp";
733 regulator-state-mem {
734 regulator-off-in-suspend;
738 vcca1v8_codec: LDO_REG3 {
741 regulator-min-microvolt = <1800000>;
742 regulator-max-microvolt = <1800000>;
743 regulator-name = "vcca1v8_codec";
744 regulator-state-mem {
745 regulator-off-in-suspend;
749 vcc_power_on: LDO_REG4 {
752 regulator-min-microvolt = <3300000>;
753 regulator-max-microvolt = <3300000>;
754 regulator-name = "vcc_power_on";
755 regulator-state-mem {
756 regulator-on-in-suspend;
757 regulator-suspend-microvolt = <3300000>;
764 regulator-min-microvolt = <3000000>;
765 regulator-max-microvolt = <3000000>;
766 regulator-name = "vcc_3v0";
767 regulator-state-mem {
768 regulator-on-in-suspend;
769 regulator-suspend-microvolt = <3000000>;
776 regulator-min-microvolt = <1500000>;
777 regulator-max-microvolt = <1500000>;
778 regulator-name = "vcc_1v5";
779 regulator-state-mem {
780 regulator-on-in-suspend;
781 regulator-suspend-microvolt = <1500000>;
785 vcc1v8_dvp: LDO_REG7 {
788 regulator-min-microvolt = <1800000>;
789 regulator-max-microvolt = <1800000>;
790 regulator-name = "vcc1v8_dvp";
791 regulator-state-mem {
792 regulator-off-in-suspend;
796 vcc3v3_s3: LDO_REG8 {
799 regulator-min-microvolt = <3300000>;
800 regulator-max-microvolt = <3300000>;
801 regulator-name = "vcc3v3_s3";
802 regulator-state-mem {
803 regulator-off-in-suspend;
810 regulator-min-microvolt = <1800000>;
811 regulator-max-microvolt = <3300000>;
812 regulator-name = "vcc_sd";
813 regulator-state-mem {
814 regulator-on-in-suspend;
815 regulator-suspend-microvolt = <3300000>;
819 vcc3v3_s0: SWITCH_REG {
822 regulator-name = "vcc3v3_s0";
823 regulator-state-mem {
824 regulator-on-in-suspend;
830 compatible = "rk818-battery";
831 ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
832 3793 3807 3827 3853 3896 3937 3974 4007 4066
833 4110 4161 4217 4308>;
834 design_capacity = <7916>;
835 design_qmax = <8708>;
837 max_input_current = <3000>;
838 max_chrg_current = <3000>;
839 max_chrg_voltage = <4350>;
840 sleep_enter_current = <300>;
841 sleep_exit_current = <300>;
842 power_off_thresd = <3400>;
843 zero_algorithm_vol = <3950>;
844 fb_temperature = <105>;
846 max_soc_offset = <60>;
857 i2c-scl-rising-time-ns = <140>;
858 i2c-scl-falling-time-ns = <30>;
861 #sound-dai-cells = <0>;
862 compatible = "everest,es8316";
864 clocks = <&cru SCLK_I2S_8CH_OUT>;
865 clock-names = "mclk";
866 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
872 i2c-scl-rising-time-ns = <345>;
873 i2c-scl-falling-time-ns = <11>;
874 clock-frequency = <400000>;
878 compatible = "lsm330_acc";
879 pinctrl-names = "default";
880 pinctrl-0 = <&lsm330a_irq_gpio>;
882 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
883 type = <SENSOR_TYPE_ACCEL>;
885 poll_delay_ms = <30>;
886 power-off-in-suspend = <1>;
892 compatible = "lsm330_gyro";
893 pinctrl-names = "default";
894 pinctrl-0 = <&lsm330g_irq_gpio>;
896 irq-gpio = <&gpio1 20 IRQ_TYPE_EDGE_RISING>;
897 type = <SENSOR_TYPE_GYROSCOPE>;
899 power-off-in-suspend = <1>;
900 poll_delay_ms = <30>;
905 compatible = "invensense,mpu6500";
906 pinctrl-names = "default";
907 pinctrl-0 = <&mpu6500_irq_gpio>;
909 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
910 mpu-int_config = <0x10>;
911 mpu-level_shifter = <0>;
912 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
916 support-hw-poweroff = <1>;
922 compatible = "ak8963";
923 pinctrl-names = "default";
924 pinctrl-0 = <&ak8963_irq_gpio>;
926 type = <SENSOR_TYPE_COMPASS>;
927 irq-gpio = <&gpio2 28 IRQ_TYPE_EDGE_RISING>;
929 poll_delay_ms = <30>;
935 compatible = "capella,light_cm3218";
936 pinctrl-names = "default";
937 pinctrl-0 = <&cm3218_irq_gpio>;
939 type = <SENSOR_TYPE_LIGHT>;
940 irq-gpio = <&gpio4 24 IRQ_TYPE_EDGE_FALLING>;
942 poll_delay_ms = <30>;
946 compatible = "fairchild,fusb302";
948 pinctrl-names = "default";
949 pinctrl-0 = <&fusb0_int>;
950 int-n-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
957 i2c-scl-rising-time-ns = <150>;
958 i2c-scl-falling-time-ns = <30>;
959 clock-frequency = <400000>;
962 compatible = "goodix,gt9xx";
964 touch-gpio = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
965 reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
969 tp-supply = <&vcc3v0_tp>;
982 cpu-supply = <&vdd_cpu_l>;
986 cpu-supply = <&vdd_cpu_l>;
990 cpu-supply = <&vdd_cpu_l>;
994 cpu-supply = <&vdd_cpu_l>;
998 cpu-supply = <&vdd_cpu_b>;
1002 cpu-supply = <&vdd_cpu_b>;
1007 mali-supply = <&vdd_gpu>;
1015 status = "disabled";
1016 max-freq = <50000000>;
1018 status = "disabled";
1019 compatible = "inv-spi,mpu6500";
1020 pinctrl-names = "default";
1021 pinctrl-0 = <&mpu6500_irq_gpio>;
1022 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
1024 spi-max-frequency = <1000000>;
1027 mpu-int_config = <0x00>;
1028 mpu-level_shifter = <0>;
1029 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
1033 support-hw-poweroff = <1>;
1044 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
1045 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
1053 u2phy0_otg: otg-port {
1057 u2phy0_host: host-port {
1058 phy-supply = <&vcc5v0_host>;
1064 pinctrl-names = "default";
1065 pinctrl-0 = <&uart0_xfer &uart0_cts>;
1091 assigned-clocks = <&cru SCLK_VOP0_PWM>;
1092 assigned-clock-rates = <50000000>;
1106 wifi_enable_h: wifi-enable-h {
1107 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
1111 wireless-bluetooth {
1112 uart0_gpios: uart0-gpios {
1113 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
1118 pmic_int_l: pmic-int-l {
1120 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
1123 pmic_dvs2: pmic-dvs2 {
1125 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
1127 vsel1_gpio: vsel1-gpio {
1129 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
1131 vsel2_gpio: vsel2-gpio {
1133 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
1138 mh248_irq_gpio: mh248-irq-gpio {
1139 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
1145 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
1150 lcdpwr_enable_h: lcdpwr-enable-h {
1151 rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
1156 lsm330a_irq_gpio: lsm330a-irq-gpio {
1157 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1162 lsm330g_irq_gpio: lsm330g-irq-gpio {
1163 rockchip,pins = <1 20 RK_FUNC_GPIO &pcfg_pull_none>;
1168 mpu6500_irq_gpio: mpu6500-irq-gpio {
1169 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1174 ak8963_irq_gpio: ak8963-irq-gpio {
1175 rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
1180 cm3218_irq_gpio: cm3218-irq-gpio {
1181 rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_up>;
1186 host_vbus_drv: host-vbus-drv {
1188 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1193 fusb0_int: fusb0-int {
1195 <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
1201 #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
1211 phys = <&tcphy0_dp>;
1212 dp_vop_sel = <DISPLAY_SOURCE_LCDC1>;
1217 rockchip,cabc_mode = <1>;
1218 power_ctr: power_ctr {
1219 rockchip,debug = <0>;
1222 rockchip,power_type = <GPIO>;
1223 pinctrl-names = "default";
1224 pinctrl-0 = <&lcdpwr_enable_h>;
1225 gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
1226 rockchip,delay = <10>;