ARM64: dts: rk3399: add clock-latency-ns for each opp
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-mid-818-android.dts
1 /*
2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 /dts-v1/;
44
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
47 #include <dt-bindings/sensor-dev.h>
48 #include <dt-bindings/pwm/pwm.h>
49
50 / {
51         compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
52
53         hall_sensor: hall-mh248 {
54                 compatible = "hall-mh248";
55                 pinctrl-names = "default";
56                 pinctrl-0 = <&mh248_irq_gpio>;
57                 irq-gpio = <&gpio1 2 IRQ_TYPE_EDGE_BOTH>;
58                 hall-active = <1>;
59                 status = "okay";
60         };
61
62         vcc_sys: vcc-sys {
63                 compatible = "regulator-fixed";
64                 regulator-name = "vcc_sys";
65                 regulator-always-on;
66                 regulator-boot-on;
67                 regulator-min-microvolt = <3900000>;
68                 regulator-max-microvolt = <3900000>;
69         };
70
71         vcc3v3_sys: vcc3v3-sys {
72                 compatible = "regulator-fixed";
73                 regulator-name = "vcc3v3_sys";
74                 regulator-always-on;
75                 regulator-boot-on;
76                 regulator-min-microvolt = <3300000>;
77                 regulator-max-microvolt = <3300000>;
78         };
79
80         vcc5v0_host: vcc5v0-host-regulator {
81                 compatible = "regulator-fixed";
82                 enable-active-high;
83                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
84                 pinctrl-names = "default";
85                 pinctrl-0 = <&host_vbus_drv>;
86                 regulator-name = "vcc5v0_host";
87         };
88
89         vdd_log: vdd-log {
90                 compatible = "pwm-regulator";
91                 pwms = <&pwm2 0 25000 0>;
92                 rockchip,pwm_id= <2>;
93                 rockchip,pwm_voltage = <900000>;
94                 regulator-name = "vdd_log";
95                 regulator-min-microvolt = <750000>;
96                 regulator-max-microvolt = <1350000>;
97                 regulator-always-on;
98                 regulator-boot-on;
99         };
100
101         backlight: backlight {
102                 compatible = "pwm-backlight";
103                 pwms = <&vop0_pwm 0 25000 PWM_POLARITY_INVERTED>;
104                 brightness-levels = <
105                         0   1   51  52  52  53  53  54
106                         54  55  55  56  56  57  57  58
107                         58  59  59  60  61  61  62  63
108                         63  64  65  65  66  67  67  68
109                         69  69  70  71  71  72  73  73
110                         74  75  75  76  77  77  78  79
111                         79  80  80  81  81  82  83  83
112                         84  85  86  86  87  88  89  89
113                         90  91  92  92  93  94  95  95
114                         96  97  98  98  99 100 101  101
115                         102 103 104 104 105 106 107 107
116                         108 109 110 110 111 112 113 113
117                         114 115 116 116 117 118 119 119
118                         120 121 122 122 123 124 125 125
119                         126 127 128 128 129 130 131 131
120                         132 133 134 134 135 136 137 137
121                         138 139 140 140 141 142 143 143
122                         144 145 146 146 147 148 149 149
123                         150 151 152 152 153 154 155 155
124                         156 157 158 158 159 160 161 161
125                         162 163 164 164 165 166 167 167
126                         168 169 170 170 171 172 173 173
127                         174 175 176 176 177 178 179 179
128                         180 181 182 182 183 184 185 185
129                         186 187 188 188 189 190 191 191
130                         216 217 218 218 219 220 221 221
131                         222 223 224 224 225 226 227 227
132                         228 229 230 230 231 232 233 233
133                         234 235 236 236 237 238 239 239
134                         240 241 242 242 243 244 245 245
135                         246 247 248 248 249 250 251 251
136                         252 253 254 254 255 255 255 255>;
137                 default-brightness-level = <200>;
138                 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
139         };
140
141         vcc_phy: vcc-phy-regulator {
142                 compatible = "regulator-fixed";
143                 regulator-name = "vcc_phy";
144                 regulator-always-on;
145                 regulator-boot-on;
146         };
147
148         io-domains {
149                 compatible = "rockchip,rk3399-io-voltage-domain";
150                 rockchip,grf = <&grf>;
151
152                 bt656-supply = <&vcc1v8_dvp>;
153                 audio-supply = <&vcca1v8_codec>;
154                 sdmmc-supply = <&vcc_sd>;
155                 gpio1830-supply = <&vcc_3v0>;
156         };
157
158         pmu-io-domains {
159                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
160                 rockchip,grf = <&pmugrf>;
161
162                 pmu1830-supply = <&vcc_1v8>;
163         };
164
165         es8316-sound {
166                 compatible = "simple-audio-card";
167                 simple-audio-card,format = "i2s";
168                 simple-audio-card,name = "rockchip,es8316-codec";
169                 simple-audio-card,mclk-fs = <256>;
170                 simple-audio-card,widgets =
171                         "Microphone", "Mic Jack",
172                         "Headphone", "Headphone Jack";
173                 simple-audio-card,routing =
174                         "Mic Jack", "MICBIAS1",
175                         "IN1P", "Mic Jack",
176                         "Headphone Jack", "HPOL",
177                         "Headphone Jack", "HPOR";
178                 simple-audio-card,cpu {
179                         sound-dai = <&i2s0>;
180                 };
181                 simple-audio-card,codec {
182                         sound-dai = <&es8316>;
183                 };
184         };
185
186         spdif-sound {
187                 compatible = "simple-audio-card";
188                 simple-audio-card,name = "rockchip,spdif";
189                 simple-audio-card,cpu {
190                         sound-dai = <&spdif>;
191                 };
192                 simple-audio-card,codec {
193                         sound-dai = <&spdif_out>;
194                 };
195         };
196
197         spdif_out: spdif-out {
198                 compatible = "linux,spdif-dit";
199                 #sound-dai-cells = <0>;
200         };
201
202         sdio_pwrseq: sdio-pwrseq {
203                 compatible = "mmc-pwrseq-simple";
204                 clocks = <&rk818 1>;
205                 clock-names = "ext_clock";
206                 pinctrl-names = "default";
207                 pinctrl-0 = <&wifi_enable_h>;
208
209                 /*
210                  * On the module itself this is one of these (depending
211                  * on the actual card populated):
212                  * - SDIO_RESET_L_WL_REG_ON
213                  * - PDN (power down when low)
214                  */
215                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
216         };
217
218         wireless-wlan {
219                 compatible = "wlan-platdata";
220                 rockchip,grf = <&grf>;
221                 wifi_chip_type = "ap6354";
222                 sdio_vref = <1800>;
223                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
224                 status = "okay";
225         };
226
227         wireless-bluetooth {
228                 compatible = "bluetooth-platdata";
229                 clocks = <&rk818 1>;
230                 clock-names = "ext_clock";
231                 //wifi-bt-power-toggle;
232                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
233                 pinctrl-names = "default", "rts_gpio";
234                 pinctrl-0 = <&uart0_rts>;
235                 pinctrl-1 = <&uart0_gpios>;
236                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
237                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
238                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
239                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
240                 status = "okay";
241         };
242
243         uboot-charge {
244                 compatible = "rockchip,uboot-charge";
245                 rockchip,uboot-charge-on = <0>;
246                 rockchip,android-charge-on = <1>;
247         };
248
249         vibrator {
250                 compatible = "rk-vibrator-gpio";
251                 vibrator-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>;
252                 status = "okay";
253         };
254
255         rk_headset {
256                 compatible = "rockchip_headset";
257                 headset_gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
258                 pinctrl-names = "default";
259                 pinctrl-0 = <&hp_det>;
260                 io-channels = <&saradc 2>;
261         };
262 };
263
264 &dfi {
265         status = "okay";
266 };
267
268 &dmc {
269         status = "okay";
270         center-supply = <&vdd_center>;
271         upthreshold = <38>;
272         downdifferential = <20>;
273 };
274
275 &dmc_opp_table {
276         opp@300000000 {
277                 opp-hz = /bits/ 64 <300000000>;
278                 opp-microvolt = <900000>;
279         };
280         opp@400000000 {
281                 opp-hz = /bits/ 64 <400000000>;
282                 opp-microvolt = <900000>;
283         };
284         opp@528000000 {
285                 opp-hz = /bits/ 64 <528000000>;
286                 opp-microvolt = <900000>;
287         };
288         opp@600000000 {
289                 opp-hz = /bits/ 64 <600000000>;
290                 opp-microvolt = <900000>;
291         };
292         opp@666000000 {
293                 opp-hz = /bits/ 64 <666000000>;
294                 opp-microvolt = <900000>;
295                 opp-suspend;
296         };
297 };
298
299 &cluster0_opp {
300         opp@408000000 {
301                 opp-hz = /bits/ 64 <408000000>;
302                 opp-microvolt = <800000>;
303                 clock-latency-ns = <40000>;
304         };
305         opp@600000000 {
306                 opp-hz = /bits/ 64 <600000000>;
307                 opp-microvolt = <800000>;
308                 clock-latency-ns = <40000>;
309         };
310         opp@816000000 {
311                 opp-hz = /bits/ 64 <816000000>;
312                 opp-microvolt = <800000>;
313                 clock-latency-ns = <40000>;
314         };
315         opp@1008000000 {
316                 opp-hz = /bits/ 64 <1008000000>;
317                 opp-microvolt = <875000>;
318                 clock-latency-ns = <40000>;
319         };
320         opp@1200000000 {
321                 opp-hz = /bits/ 64 <1200000000>;
322                 opp-microvolt = <925000>;
323                 clock-latency-ns = <40000>;
324         };
325         opp@1416000000 {
326                 opp-hz = /bits/ 64 <1416000000>;
327                 opp-microvolt = <1050000>;
328                 clock-latency-ns = <40000>;
329         };
330         opp@1512000000 {
331                 opp-hz = /bits/ 64 <1512000000>;
332                 opp-microvolt = <1100000>;
333                 clock-latency-ns = <40000>;
334                 status="disabled";
335         };
336 };
337
338 &cluster1_opp {
339         opp@408000000 {
340                 opp-hz = /bits/ 64 <408000000>;
341                 opp-microvolt = <800000>;
342                 clock-latency-ns = <40000>;
343         };
344         opp@600000000 {
345                 opp-hz = /bits/ 64 <600000000>;
346                 opp-microvolt = <800000>;
347                 clock-latency-ns = <40000>;
348         };
349         opp@816000000 {
350                 opp-hz = /bits/ 64 <816000000>;
351                 opp-microvolt = <825000>;
352                 clock-latency-ns = <40000>;
353         };
354         opp@1008000000 {
355                 opp-hz = /bits/ 64 <1008000000>;
356                 opp-microvolt = <875000>;
357                 clock-latency-ns = <40000>;
358         };
359         opp@1200000000 {
360                 opp-hz = /bits/ 64 <1200000000>;
361                 opp-microvolt = <950000>;
362                 clock-latency-ns = <40000>;
363         };
364         opp@1416000000 {
365                 opp-hz = /bits/ 64 <1416000000>;
366                 opp-microvolt = <1025000>;
367                 clock-latency-ns = <40000>;
368         };
369         opp@1608000000 {
370                 opp-hz = /bits/ 64 <1608000000>;
371                 opp-microvolt = <1100000>;
372                 clock-latency-ns = <40000>;
373         };
374         opp@1800000000 {
375                 opp-hz = /bits/ 64 <1800000000>;
376                 opp-microvolt = <1175000>;
377                 clock-latency-ns = <40000>;
378         };
379         opp@1992000000 {
380                 opp-hz = /bits/ 64 <1992000000>;
381                 opp-microvolt = <1250000>;
382                 clock-latency-ns = <40000>;
383         };
384 };
385
386 &CPU_COST_A72 {
387         busy-cost-data = <
388                 210   129       /*  408MHz */
389                 308   184       /*  600MHz */
390                 419   246       /*  816MHz */
391                 518   335       /* 1008MHz */
392                 617   428       /* 1200MHz */
393                 728   573       /* 1416MHz */
394                 827   724       /* 1608MHz */
395                 925   900       /* 1800MHz */
396                 1024  1108      /* 1992MHz */
397         >;
398         idle-cost-data = <
399               15
400               15
401                0
402         >;
403 };
404
405 &CPU_COST_A53 {
406         busy-cost-data = <
407                 108    46       /*  408M */
408                 159    67       /*  600M */
409                 216    90       /*  816M */
410                 267    120      /* 1008M */
411                 318    153      /* 1200M */
412                 375    198      /* 1416M */
413                 401    222      /* 1512M */
414         >;
415         idle-cost-data = <
416               6
417               6
418               0
419         >;
420 };
421
422 &CLUSTER_COST_A72 {
423         busy-cost-data = <
424                 210   129       /*  408MHz */
425                 308   184       /*  600MHz */
426                 419   246       /*  816MHz */
427                 518   335       /* 1008MHz */
428                 617   428       /* 1200MHz */
429                 728   573       /* 1416MHz */
430                 827   724       /* 1608MHz */
431                 925   900       /* 1800MHz */
432                 1024  1108      /* 1992MHz */
433         >;
434         idle-cost-data = <
435                  65
436                  65
437                  65
438         >;
439 };
440
441 &CLUSTER_COST_A53 {
442         busy-cost-data = <
443                 108    46       /*  408M */
444                 159    67       /*  600M */
445                 216    90       /*  816M */
446                 267    120      /* 1008M */
447                 318    153      /* 1200M */
448                 375    198      /* 1416M */
449                 401    222      /* 1512M */
450         >;
451         idle-cost-data = <
452                 56
453                 56
454                 56
455         >;
456 };
457
458 &gpu_opp_table {
459         compatible = "operating-points-v2";
460         opp-shared;
461         opp@200000000 {
462                 opp-hz = /bits/ 64 <200000000>;
463                 opp-microvolt = <825000>;
464         };
465         opp@300000000 {
466                 opp-hz = /bits/ 64 <300000000>;
467                 opp-microvolt = <850000>;
468         };
469         opp@400000000 {
470                 opp-hz = /bits/ 64 <400000000>;
471                 opp-microvolt = <875000>;
472         };
473         opp@500000000 {
474                 opp-hz = /bits/ 64 <500000000>;
475                 opp-microvolt = <950000>;
476         };
477         opp@600000000 {
478                 opp-hz = /bits/ 64 <600000000>;
479                 opp-microvolt = <1025000>;
480         };
481         opp@800000000 {
482                 opp-hz = /bits/ 64 <800000000>;
483                 opp-microvolt = <1125000>;
484         };
485 };
486
487 &rk_key {
488         compatible = "rockchip,key";
489         status = "okay";
490
491         io-channels = <&saradc 1>;
492
493         vol-up-key {
494                 linux,code = <114>;
495                 label = "volume up";
496                 rockchip,adc_value = <1>;
497         };
498
499         vol-down-key {
500                 linux,code = <115>;
501                 label = "volume down";
502                 rockchip,adc_value = <170>;
503         };
504
505         power-key {
506                 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
507                 linux,code = <116>;
508                 label = "power";
509                 gpio-key,wakeup;
510         };
511
512         menu-key {
513                 linux,code = <59>;
514                 label = "menu";
515                 rockchip,adc_value = <746>;
516         };
517
518         home-key {
519                 linux,code = <102>;
520                 label = "home";
521                 rockchip,adc_value = <355>;
522         };
523
524         back-key {
525                 linux,code = <158>;
526                 label = "back";
527                 rockchip,adc_value = <560>;
528         };
529
530         camera-key {
531                 linux,code = <212>;
532                 label = "camera";
533                 rockchip,adc_value = <450>;
534         };
535 };
536
537 &sdmmc {
538         clock-frequency = <50000000>;
539         clock-freq-min-max = <400000 150000000>;
540         supports-sd;
541         bus-width = <4>;
542         cap-mmc-highspeed;
543         cap-sd-highspeed;
544         disable-wp;
545         num-slots = <1>;
546         //sd-uhs-sdr104;
547         vqmmc-supply = <&vcc_sd>;
548         pinctrl-names = "default";
549         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
550         status = "okay";
551 };
552
553 &sdio0 {
554         clock-frequency = <150000000>;
555         clock-freq-min-max = <200000 150000000>;
556         supports-sdio;
557         bus-width = <4>;
558         disable-wp;
559         cap-sd-highspeed;
560         cap-sdio-irq;
561         keep-power-in-suspend;
562         mmc-pwrseq = <&sdio_pwrseq>;
563         non-removable;
564         num-slots = <1>;
565         pinctrl-names = "default";
566         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
567         sd-uhs-sdr104;
568         status = "okay";
569 };
570
571 &emmc_phy {
572         status = "okay";
573 };
574
575 &sdhci {
576         bus-width = <8>;
577         mmc-hs400-1_8v;
578         supports-emmc;
579         non-removable;
580         keep-power-in-suspend;
581         mmc-hs400-enhanced-strobe;
582         status = "okay";
583 };
584
585 &i2s0 {
586         status = "okay";
587         rockchip,i2s-broken-burst-len;
588         rockchip,playback-channels = <8>;
589         rockchip,capture-channels = <8>;
590         #sound-dai-cells = <0>;
591 };
592
593 &i2s2 {
594         #sound-dai-cells = <0>;
595 };
596
597 &spdif {
598         status = "okay";
599         #sound-dai-cells = <0>;
600 };
601
602 &i2c0 {
603         status = "okay";
604         i2c-scl-rising-time-ns = <180>;
605         i2c-scl-falling-time-ns = <30>;
606         clock-frequency = <400000>;
607
608         vdd_cpu_b: syr837@40 {
609                 compatible = "silergy,syr827";
610                 reg = <0x40>;
611                 vin-supply = <&vcc_sys>;
612                 regulator-compatible = "fan53555-reg";
613                 pinctrl-0 = <&vsel1_gpio>;
614                 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
615                 regulator-name = "vdd_cpu_b";
616                 regulator-min-microvolt = <712500>;
617                 regulator-max-microvolt = <1500000>;
618                 regulator-ramp-delay = <1000>;
619                 fcs,suspend-voltage-selector = <1>;
620                 regulator-always-on;
621                 regulator-initial-state = <3>;
622                 regulator-state-mem {
623                         regulator-off-in-suspend;
624                 };
625         };
626
627         vdd_gpu: syr828@41 {
628                 compatible = "silergy,syr828";
629                 status = "okay";
630                 reg = <0x41>;
631                 vin-supply = <&vcc_sys>;
632                 regulator-compatible = "fan53555-reg";
633                 pinctrl-0 = <&vsel2_gpio>;
634                 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
635                 regulator-name = "vdd_gpu";
636                 regulator-min-microvolt = <735000>;
637                 regulator-max-microvolt = <1400000>;
638                 regulator-ramp-delay = <1000>;
639                 fcs,suspend-voltage-selector = <1>;
640                 regulator-boot-on;
641                 regulator-state-mem {
642                         regulator-off-in-suspend;
643                 };
644         };
645
646         rk818: pmic@1c {
647                 compatible = "rockchip,rk818";
648                 status = "okay";
649                 reg = <0x1c>;
650                 clock-output-names = "xin32k", "wifibt_32kin";
651                 interrupt-parent = <&gpio1>;
652                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
653                 pinctrl-names = "default";
654                 pinctrl-0 = <&pmic_int_l>;
655                 rockchip,system-power-controller;
656                 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
657                 wakeup-source;
658                 extcon = <&fusb0>;
659                 #clock-cells = <1>;
660
661                 vcc1-supply = <&vcc_sys>;
662                 vcc2-supply = <&vcc_sys>;
663                 vcc3-supply = <&vcc_sys>;
664                 vcc4-supply = <&vcc_sys>;
665                 vcc6-supply = <&vcc_sys>;
666                 vcc7-supply = <&vcc3v3_sys>;
667                 vcc8-supply = <&vcc_sys>;
668                 vcc9-supply = <&vcc3v3_sys>;
669
670                 regulators {
671                         vdd_cpu_l: DCDC_REG1 {
672                                 regulator-name = "vdd_cpu_l";
673                                 regulator-always-on;
674                                 regulator-boot-on;
675                                 regulator-min-microvolt = <750000>;
676                                 regulator-max-microvolt = <1350000>;
677                                 regulator-ramp-delay = <6001>;
678                                 regulator-state-mem {
679                                         regulator-off-in-suspend;
680                                 };
681                         };
682
683                         vdd_center: DCDC_REG2 {
684                                 regulator-name = "vdd_center";
685                                 regulator-always-on;
686                                 regulator-boot-on;
687                                 regulator-min-microvolt = <800000>;
688                                 regulator-max-microvolt = <1350000>;
689                                 regulator-ramp-delay = <6001>;
690                                 regulator-state-mem {
691                                         regulator-off-in-suspend;
692                                 };
693                         };
694
695                         vcc_ddr: DCDC_REG3 {
696                                 regulator-name = "vcc_ddr";
697                                 regulator-always-on;
698                                 regulator-boot-on;
699                                 regulator-state-mem {
700                                         regulator-on-in-suspend;
701                                 };
702                         };
703
704                         vcc_1v8: DCDC_REG4 {
705                                 regulator-name = "vcc_1v8";
706                                 regulator-always-on;
707                                 regulator-boot-on;
708                                 regulator-min-microvolt = <1800000>;
709                                 regulator-max-microvolt = <1800000>;
710                                 regulator-state-mem {
711                                         regulator-on-in-suspend;
712                                         regulator-suspend-microvolt = <1800000>;
713                                 };
714                         };
715
716                         vcca3v0_codec: LDO_REG1 {
717                                 regulator-always-on;
718                                 regulator-boot-on;
719                                 regulator-min-microvolt = <3000000>;
720                                 regulator-max-microvolt = <3000000>;
721                                 regulator-name = "vcca3v0_codec";
722                                 regulator-state-mem {
723                                         regulator-off-in-suspend;
724                                 };
725                         };
726
727                         vcc3v0_tp: LDO_REG2 {
728                                 regulator-always-on;
729                                 regulator-boot-on;
730                                 regulator-min-microvolt = <3000000>;
731                                 regulator-max-microvolt = <3000000>;
732                                 regulator-name = "vcc3v0_tp";
733                                 regulator-state-mem {
734                                         regulator-off-in-suspend;
735                                 };
736                         };
737
738                         vcca1v8_codec: LDO_REG3 {
739                                 regulator-always-on;
740                                 regulator-boot-on;
741                                 regulator-min-microvolt = <1800000>;
742                                 regulator-max-microvolt = <1800000>;
743                                 regulator-name = "vcca1v8_codec";
744                                 regulator-state-mem {
745                                         regulator-off-in-suspend;
746                                 };
747                         };
748
749                         vcc_power_on: LDO_REG4 {
750                                 regulator-always-on;
751                                 regulator-boot-on;
752                                 regulator-min-microvolt = <3300000>;
753                                 regulator-max-microvolt = <3300000>;
754                                 regulator-name = "vcc_power_on";
755                                 regulator-state-mem {
756                                         regulator-on-in-suspend;
757                                         regulator-suspend-microvolt = <3300000>;
758                                 };
759                         };
760
761                         vcc_3v0: LDO_REG5 {
762                                 regulator-always-on;
763                                 regulator-boot-on;
764                                 regulator-min-microvolt = <3000000>;
765                                 regulator-max-microvolt = <3000000>;
766                                 regulator-name = "vcc_3v0";
767                                 regulator-state-mem {
768                                         regulator-on-in-suspend;
769                                         regulator-suspend-microvolt = <3000000>;
770                                 };
771                         };
772
773                         vcc_1v5: LDO_REG6 {
774                                 regulator-always-on;
775                                 regulator-boot-on;
776                                 regulator-min-microvolt = <1500000>;
777                                 regulator-max-microvolt = <1500000>;
778                                 regulator-name = "vcc_1v5";
779                                 regulator-state-mem {
780                                         regulator-on-in-suspend;
781                                         regulator-suspend-microvolt = <1500000>;
782                                 };
783                         };
784
785                         vcc1v8_dvp: LDO_REG7 {
786                                 regulator-always-on;
787                                 regulator-boot-on;
788                                 regulator-min-microvolt = <1800000>;
789                                 regulator-max-microvolt = <1800000>;
790                                 regulator-name = "vcc1v8_dvp";
791                                 regulator-state-mem {
792                                         regulator-off-in-suspend;
793                                 };
794                         };
795
796                         vcc3v3_s3: LDO_REG8 {
797                                 regulator-always-on;
798                                 regulator-boot-on;
799                                 regulator-min-microvolt = <3300000>;
800                                 regulator-max-microvolt = <3300000>;
801                                 regulator-name = "vcc3v3_s3";
802                                 regulator-state-mem {
803                                         regulator-off-in-suspend;
804                                 };
805                         };
806
807                         vcc_sd: LDO_REG9 {
808                                 regulator-always-on;
809                                 regulator-boot-on;
810                                 regulator-min-microvolt = <1800000>;
811                                 regulator-max-microvolt = <3300000>;
812                                 regulator-name = "vcc_sd";
813                                 regulator-state-mem {
814                                         regulator-on-in-suspend;
815                                         regulator-suspend-microvolt = <3300000>;
816                                 };
817                         };
818
819                         vcc3v3_s0: SWITCH_REG {
820                                 regulator-always-on;
821                                 regulator-boot-on;
822                                 regulator-name = "vcc3v3_s0";
823                                 regulator-state-mem {
824                                         regulator-on-in-suspend;
825                                 };
826                         };
827                 };
828
829                 battery {
830                         compatible = "rk818-battery";
831                         ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
832                                 3793 3807 3827 3853 3896 3937 3974 4007 4066
833                                 4110 4161 4217 4308>;
834                         design_capacity = <7916>;
835                         design_qmax = <8708>;
836                         bat_res = <65>;
837                         max_input_current = <3000>;
838                         max_chrg_current = <3000>;
839                         max_chrg_voltage = <4350>;
840                         sleep_enter_current = <300>;
841                         sleep_exit_current = <300>;
842                         power_off_thresd = <3400>;
843                         zero_algorithm_vol = <3950>;
844                         fb_temperature = <105>;
845                         sample_res = <20>;
846                         max_soc_offset = <60>;
847                         energy_mode = <0>;
848                         monitor_sec = <5>;
849                         virtual_power = <0>;
850                         power_dc2otg = <0>;
851                 };
852         };
853 };
854
855 &i2c1 {
856         status = "okay";
857         i2c-scl-rising-time-ns = <140>;
858         i2c-scl-falling-time-ns = <30>;
859
860         es8316: es8316@10 {
861                 #sound-dai-cells = <0>;
862                 compatible = "everest,es8316";
863                 reg = <0x11>;
864                 clocks = <&cru SCLK_I2S_8CH_OUT>;
865                 clock-names = "mclk";
866                 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
867         };
868 };
869
870 &i2c4 {
871         status = "okay";
872         i2c-scl-rising-time-ns = <345>;
873         i2c-scl-falling-time-ns = <11>;
874         clock-frequency = <400000>;
875
876         lsm330_accel@1e {
877                 status = "okay";
878                 compatible = "lsm330_acc";
879                 pinctrl-names = "default";
880                 pinctrl-0 = <&lsm330a_irq_gpio>;
881                 reg = <0x1e>;
882                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
883                 type = <SENSOR_TYPE_ACCEL>;
884                 irq_enable = <1>;
885                 poll_delay_ms = <30>;
886                 power-off-in-suspend = <1>;
887                 layout = <4>;
888         };
889
890         lsm330_gyro@6a {
891                 status = "okay";
892                 compatible = "lsm330_gyro";
893                 pinctrl-names = "default";
894                 pinctrl-0 = <&lsm330g_irq_gpio>;
895                 reg = <0x6a>;
896                 irq-gpio = <&gpio1 20 IRQ_TYPE_EDGE_RISING>;
897                 type = <SENSOR_TYPE_GYROSCOPE>;
898                 irq_enable = <0>;
899                 power-off-in-suspend = <1>;
900                 poll_delay_ms = <30>;
901         };
902
903         mpu6500@68 {
904                 status = "disabled";
905                 compatible = "invensense,mpu6500";
906                 pinctrl-names = "default";
907                 pinctrl-0 = <&mpu6500_irq_gpio>;
908                 reg = <0x68>;
909                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
910                 mpu-int_config = <0x10>;
911                 mpu-level_shifter = <0>;
912                 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
913                 orientation-x= <1>;
914                 orientation-y= <1>;
915                 orientation-z= <0>;
916                 support-hw-poweroff = <1>;
917                 mpu-debug = <1>;
918         };
919
920         sensor@0d {
921                 status = "okay";
922                 compatible = "ak8963";
923                 pinctrl-names = "default";
924                 pinctrl-0 = <&ak8963_irq_gpio>;
925                 reg = <0x0d>;
926                 type = <SENSOR_TYPE_COMPASS>;
927                 irq-gpio = <&gpio2 28 IRQ_TYPE_EDGE_RISING>;
928                 irq_enable = <0>;
929                 poll_delay_ms = <30>;
930                 layout = <3>;
931         };
932
933         sensor@10 {
934                 status = "okay";
935                 compatible = "capella,light_cm3218";
936                 pinctrl-names = "default";
937                 pinctrl-0 = <&cm3218_irq_gpio>;
938                 reg = <0x10>;
939                 type = <SENSOR_TYPE_LIGHT>;
940                 irq-gpio = <&gpio4 24 IRQ_TYPE_EDGE_FALLING>;
941                 irq_enable = <1>;
942                 poll_delay_ms = <30>;
943         };
944
945         fusb0: fusb30x@22 {
946                 compatible = "fairchild,fusb302";
947                 reg = <0x22>;
948                 pinctrl-names = "default";
949                 pinctrl-0 = <&fusb0_int>;
950                 int-n-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
951                 status = "okay";
952         };
953 };
954
955 &i2c5 {
956         status = "okay";
957         i2c-scl-rising-time-ns = <150>;
958         i2c-scl-falling-time-ns = <30>;
959         clock-frequency = <400000>;
960
961         gt9xx: gt9xx@14 {
962                 compatible = "goodix,gt9xx";
963                 reg = <0x14>;
964                 touch-gpio = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
965                 reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
966                 max-x = <1536>;
967                 max-y = <2048>;
968                 tp-size = <970>;
969                 tp-supply = <&vcc3v0_tp>;
970         };
971 };
972
973 &isp0 {
974         status = "okay";
975 };
976
977 &isp1 {
978         status = "okay";
979 };
980
981 &cpu_l0 {
982         cpu-supply = <&vdd_cpu_l>;
983 };
984
985 &cpu_l1 {
986         cpu-supply = <&vdd_cpu_l>;
987 };
988
989 &cpu_l2 {
990         cpu-supply = <&vdd_cpu_l>;
991 };
992
993 &cpu_l3 {
994         cpu-supply = <&vdd_cpu_l>;
995 };
996
997 &cpu_b0 {
998         cpu-supply = <&vdd_cpu_b>;
999 };
1000
1001 &cpu_b1 {
1002         cpu-supply = <&vdd_cpu_b>;
1003 };
1004
1005 &gpu {
1006         status = "okay";
1007         mali-supply = <&vdd_gpu>;
1008 };
1009
1010 &rga {
1011         status = "okay";
1012 };
1013
1014 &spi1 {
1015         status = "disabled";
1016         max-freq = <50000000>;
1017         mpu6500@0 {
1018                 status = "disabled";
1019                 compatible = "inv-spi,mpu6500";
1020                 pinctrl-names = "default";
1021                 pinctrl-0 = <&mpu6500_irq_gpio>;
1022                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
1023                 reg = <0>;
1024                 spi-max-frequency = <1000000>;
1025                 spi-cpha;
1026                 spi-cpol;
1027                 mpu-int_config = <0x00>;
1028                 mpu-level_shifter = <0>;
1029                 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
1030                 orientation-x= <1>;
1031                 orientation-y= <0>;
1032                 orientation-z= <1>;
1033                 support-hw-poweroff = <1>;
1034                 mpu-debug = <1>;
1035         };
1036 };
1037
1038 &tcphy0 {
1039         extcon = <&fusb0>;
1040         status = "okay";
1041 };
1042
1043 &tsadc {
1044         rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
1045         rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
1046         status = "okay";
1047 };
1048
1049 &u2phy0 {
1050         status = "okay";
1051         extcon = <&fusb0>;
1052
1053         u2phy0_otg: otg-port {
1054                 status = "okay";
1055         };
1056
1057         u2phy0_host: host-port {
1058                 phy-supply = <&vcc5v0_host>;
1059                 status = "okay";
1060         };
1061 };
1062
1063 &uart0 {
1064         pinctrl-names = "default";
1065         pinctrl-0 = <&uart0_xfer &uart0_cts>;
1066         status = "okay";
1067 };
1068
1069 &uart2 {
1070         status = "okay";
1071 };
1072
1073 &usb_host0_ehci {
1074         status = "okay";
1075 };
1076
1077 &usb_host0_ohci {
1078         status = "okay";
1079 };
1080
1081 &usbdrd3_0 {
1082         extcon = <&fusb0>;
1083         status = "okay";
1084 };
1085
1086 &usbdrd_dwc3_0 {
1087         status = "okay";
1088 };
1089
1090 &vop0_pwm {
1091         assigned-clocks = <&cru SCLK_VOP0_PWM>;
1092         assigned-clock-rates = <50000000>;
1093         status = "okay";
1094 };
1095
1096 &pwm2 {
1097         status = "okay";
1098 };
1099
1100 &saradc {
1101         status = "okay";
1102 };
1103
1104 &pinctrl {
1105         sdio-pwrseq {
1106                 wifi_enable_h: wifi-enable-h {
1107                         rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
1108                 };
1109         };
1110
1111         wireless-bluetooth {
1112                 uart0_gpios: uart0-gpios {
1113                         rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
1114                 };
1115         };
1116
1117         pmic {
1118                 pmic_int_l: pmic-int-l {
1119                         rockchip,pins =
1120                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
1121                 };
1122
1123                 pmic_dvs2: pmic-dvs2 {
1124                         rockchip,pins =
1125                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
1126                 };
1127                 vsel1_gpio: vsel1-gpio {
1128                         rockchip,pins =
1129                                 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
1130                 };
1131                 vsel2_gpio: vsel2-gpio {
1132                         rockchip,pins =
1133                                 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
1134                 };
1135         };
1136
1137         hallsensor {
1138                 mh248_irq_gpio: mh248-irq-gpio {
1139                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
1140                 };
1141         };
1142
1143         headphone {
1144                 hp_det: hp-det {
1145                         rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
1146                 };
1147         };
1148
1149         lcdpwr-enable {
1150                 lcdpwr_enable_h: lcdpwr-enable-h {
1151                         rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
1152                 };
1153         };
1154
1155         lsm330_a {
1156                 lsm330a_irq_gpio: lsm330a-irq-gpio {
1157                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1158                 };
1159         };
1160
1161         lsm330_g {
1162                 lsm330g_irq_gpio: lsm330g-irq-gpio {
1163                         rockchip,pins = <1 20 RK_FUNC_GPIO &pcfg_pull_none>;
1164                 };
1165         };
1166
1167         mpu6500 {
1168                 mpu6500_irq_gpio: mpu6500-irq-gpio {
1169                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1170                 };
1171         };
1172
1173         ak8963 {
1174                 ak8963_irq_gpio: ak8963-irq-gpio {
1175                         rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
1176                 };
1177         };
1178
1179         cm3218 {
1180                 cm3218_irq_gpio: cm3218-irq-gpio {
1181                         rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_up>;
1182                 };
1183         };
1184
1185         usb2 {
1186                 host_vbus_drv: host-vbus-drv {
1187                         rockchip,pins =
1188                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1189                 };
1190         };
1191
1192         fusb30x {
1193                 fusb0_int: fusb0-int {
1194                         rockchip,pins =
1195                                 <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
1196                 };
1197         };
1198 };
1199
1200 &rk_screen {
1201         #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
1202 };
1203
1204 &cdn_dp_sound {
1205         status = "okay";
1206 };
1207
1208 &cdn_dp_fb {
1209         status = "okay";
1210         extcon = <&fusb0>;
1211         phys = <&tcphy0_dp>;
1212         dp_vop_sel = <DISPLAY_SOURCE_LCDC1>;
1213 };
1214
1215 &vopb_rk_fb {
1216         status = "okay";
1217         rockchip,cabc_mode = <1>;
1218         power_ctr: power_ctr {
1219                 rockchip,debug = <0>;
1220
1221                 lcd_en: lcd-en {
1222                         rockchip,power_type = <GPIO>;
1223                         pinctrl-names = "default";
1224                         pinctrl-0 = <&lcdpwr_enable_h>;
1225                         gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
1226                         rockchip,delay = <10>;
1227                 };
1228         };
1229 };
1230
1231 &vopl_rk_fb {
1232         status = "okay";
1233 };
1234
1235 &edp_rk_fb {
1236         status = "okay";
1237 };
1238
1239 &pvtm {
1240         status = "okay";
1241 };
1242
1243 &pmu_pvtm {
1244         status = "okay";
1245 };