0ff962cc3afd26912471c7c8aa33b4d3349ace62
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-mid-818-android.dts
1 /*
2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 /dts-v1/;
44
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
47 #include <dt-bindings/sensor-dev.h>
48 #include <dt-bindings/pwm/pwm.h>
49
50 / {
51         compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
52
53         hall_sensor: hall-mh248 {
54                 compatible = "hall-mh248";
55                 pinctrl-names = "default";
56                 pinctrl-0 = <&mh248_irq_gpio>;
57                 irq-gpio = <&gpio1 2 IRQ_TYPE_EDGE_BOTH>;
58                 hall-active = <1>;
59                 status = "okay";
60         };
61
62         vcc_sys: vcc-sys {
63                 compatible = "regulator-fixed";
64                 regulator-name = "vcc_sys";
65                 regulator-always-on;
66                 regulator-boot-on;
67                 regulator-min-microvolt = <3900000>;
68                 regulator-max-microvolt = <3900000>;
69         };
70
71         vcc3v3_sys: vcc3v3-sys {
72                 compatible = "regulator-fixed";
73                 regulator-name = "vcc3v3_sys";
74                 regulator-always-on;
75                 regulator-boot-on;
76                 regulator-min-microvolt = <3300000>;
77                 regulator-max-microvolt = <3300000>;
78         };
79
80         vcc5v0_host: vcc5v0-host-regulator {
81                 compatible = "regulator-fixed";
82                 enable-active-high;
83                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
84                 pinctrl-names = "default";
85                 pinctrl-0 = <&host_vbus_drv>;
86                 regulator-name = "vcc5v0_host";
87         };
88
89         vdd_log: vdd-log {
90                 compatible = "pwm-regulator";
91                 pwms = <&pwm2 0 25000 0>;
92                 rockchip,pwm_id= <2>;
93                 rockchip,pwm_voltage = <900000>;
94                 regulator-name = "vdd_log";
95                 regulator-min-microvolt = <750000>;
96                 regulator-max-microvolt = <1350000>;
97                 regulator-always-on;
98                 regulator-boot-on;
99         };
100
101         backlight: backlight {
102                 compatible = "pwm-backlight";
103                 pwms = <&vop0_pwm 0 25000 PWM_POLARITY_INVERTED>;
104                 brightness-levels = <
105                         0   1   51  52  52  53  53  54
106                         54  55  55  56  56  57  57  58
107                         58  59  59  60  61  61  62  63
108                         63  64  65  65  66  67  67  68
109                         69  69  70  71  71  72  73  73
110                         74  75  75  76  77  77  78  79
111                         79  80  80  81  81  82  83  83
112                         84  85  86  86  87  88  89  89
113                         90  91  92  92  93  94  95  95
114                         96  97  98  98  99 100 101  101
115                         102 103 104 104 105 106 107 107
116                         108 109 110 110 111 112 113 113
117                         114 115 116 116 117 118 119 119
118                         120 121 122 122 123 124 125 125
119                         126 127 128 128 129 130 131 131
120                         132 133 134 134 135 136 137 137
121                         138 139 140 140 141 142 143 143
122                         144 145 146 146 147 148 149 149
123                         150 151 152 152 153 154 155 155
124                         156 157 158 158 159 160 161 161
125                         162 163 164 164 165 166 167 167
126                         168 169 170 170 171 172 173 173
127                         174 175 176 176 177 178 179 179
128                         180 181 182 182 183 184 185 185
129                         186 187 188 188 189 190 191 191
130                         216 217 218 218 219 220 221 221
131                         222 223 224 224 225 226 227 227
132                         228 229 230 230 231 232 233 233
133                         234 235 236 236 237 238 239 239
134                         240 241 242 242 243 244 245 245
135                         246 247 248 248 249 250 251 251
136                         252 253 254 254 255 255 255 255>;
137                 default-brightness-level = <200>;
138                 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
139         };
140
141         vcc_phy: vcc-phy-regulator {
142                 compatible = "regulator-fixed";
143                 regulator-name = "vcc_phy";
144                 regulator-always-on;
145                 regulator-boot-on;
146         };
147
148         io-domains {
149                 compatible = "rockchip,rk3399-io-voltage-domain";
150                 rockchip,grf = <&grf>;
151
152                 bt656-supply = <&vcc1v8_dvp>;
153                 audio-supply = <&vcca1v8_codec>;
154                 sdmmc-supply = <&vcc_sd>;
155                 gpio1830-supply = <&vcc_3v0>;
156         };
157
158         pmu-io-domains {
159                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
160                 rockchip,grf = <&pmugrf>;
161
162                 pmu1830-supply = <&vcc_1v8>;
163         };
164
165         es8316-sound {
166                 compatible = "simple-audio-card";
167                 simple-audio-card,format = "i2s";
168                 simple-audio-card,name = "rockchip,es8316-codec";
169                 simple-audio-card,mclk-fs = <256>;
170                 simple-audio-card,widgets =
171                         "Microphone", "Mic Jack",
172                         "Headphone", "Headphone Jack";
173                 simple-audio-card,routing =
174                         "Mic Jack", "MICBIAS1",
175                         "IN1P", "Mic Jack",
176                         "Headphone Jack", "HPOL",
177                         "Headphone Jack", "HPOR";
178                 simple-audio-card,cpu {
179                         sound-dai = <&i2s0>;
180                 };
181                 simple-audio-card,codec {
182                         sound-dai = <&es8316>;
183                 };
184         };
185
186         spdif-sound {
187                 compatible = "simple-audio-card";
188                 simple-audio-card,name = "rockchip,spdif";
189                 simple-audio-card,cpu {
190                         sound-dai = <&spdif>;
191                 };
192                 simple-audio-card,codec {
193                         sound-dai = <&spdif_out>;
194                 };
195         };
196
197         spdif_out: spdif-out {
198                 compatible = "linux,spdif-dit";
199                 #sound-dai-cells = <0>;
200         };
201
202         sdio_pwrseq: sdio-pwrseq {
203                 compatible = "mmc-pwrseq-simple";
204                 clocks = <&rk818 1>;
205                 clock-names = "ext_clock";
206                 pinctrl-names = "default";
207                 pinctrl-0 = <&wifi_enable_h>;
208
209                 /*
210                  * On the module itself this is one of these (depending
211                  * on the actual card populated):
212                  * - SDIO_RESET_L_WL_REG_ON
213                  * - PDN (power down when low)
214                  */
215                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
216         };
217
218         wireless-wlan {
219                 compatible = "wlan-platdata";
220                 rockchip,grf = <&grf>;
221                 wifi_chip_type = "ap6354";
222                 sdio_vref = <1800>;
223                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
224                 status = "okay";
225         };
226
227         wireless-bluetooth {
228                 compatible = "bluetooth-platdata";
229                 clocks = <&rk818 1>;
230                 clock-names = "ext_clock";
231                 //wifi-bt-power-toggle;
232                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
233                 pinctrl-names = "default", "rts_gpio";
234                 pinctrl-0 = <&uart0_rts>;
235                 pinctrl-1 = <&uart0_gpios>;
236                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
237                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
238                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
239                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
240                 status = "okay";
241         };
242
243         uboot-charge {
244                 compatible = "rockchip,uboot-charge";
245                 rockchip,uboot-charge-on = <0>;
246                 rockchip,android-charge-on = <1>;
247         };
248
249         vibrator {
250                 compatible = "rk-vibrator-gpio";
251                 vibrator-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>;
252                 status = "okay";
253         };
254
255         rk_headset {
256                 compatible = "rockchip_headset";
257                 headset_gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
258                 pinctrl-names = "default";
259                 pinctrl-0 = <&hp_det>;
260                 io-channels = <&saradc 2>;
261         };
262 };
263
264 &dfi {
265         status = "okay";
266 };
267
268 &dmc {
269         status = "okay";
270         center-supply = <&vdd_center>;
271         upthreshold = <38>;
272         downdifferential = <20>;
273 };
274
275 &dmc_opp_table {
276         opp@300000000 {
277                 opp-hz = /bits/ 64 <300000000>;
278                 opp-microvolt = <900000>;
279         };
280         opp@400000000 {
281                 opp-hz = /bits/ 64 <400000000>;
282                 opp-microvolt = <900000>;
283         };
284         opp@528000000 {
285                 opp-hz = /bits/ 64 <528000000>;
286                 opp-microvolt = <900000>;
287         };
288         opp@600000000 {
289                 opp-hz = /bits/ 64 <600000000>;
290                 opp-microvolt = <900000>;
291         };
292         opp@666000000 {
293                 opp-hz = /bits/ 64 <666000000>;
294                 opp-microvolt = <900000>;
295                 opp-suspend;
296         };
297 };
298
299 &cluster0_opp {
300         opp@408000000 {
301                 opp-hz = /bits/ 64 <408000000>;
302                 opp-microvolt = <800000>;
303                 clock-latency-ns = <40000>;
304         };
305         opp@600000000 {
306                 opp-hz = /bits/ 64 <600000000>;
307                 opp-microvolt = <800000>;
308         };
309         opp@816000000 {
310                 opp-hz = /bits/ 64 <816000000>;
311                 opp-microvolt = <800000>;
312         };
313         opp@1008000000 {
314                 opp-hz = /bits/ 64 <1008000000>;
315                 opp-microvolt = <875000>;
316         };
317         opp@1200000000 {
318                 opp-hz = /bits/ 64 <1200000000>;
319                 opp-microvolt = <925000>;
320         };
321         opp@1416000000 {
322                 opp-hz = /bits/ 64 <1416000000>;
323                 opp-microvolt = <1050000>;
324         };
325         opp@1512000000 {
326                 opp-hz = /bits/ 64 <1512000000>;
327                 opp-microvolt = <1100000>;
328                 status="disabled";
329         };
330 };
331
332 &cluster1_opp {
333         opp@408000000 {
334                 opp-hz = /bits/ 64 <408000000>;
335                 opp-microvolt = <800000>;
336                 clock-latency-ns = <40000>;
337         };
338         opp@600000000 {
339                 opp-hz = /bits/ 64 <600000000>;
340                 opp-microvolt = <800000>;
341         };
342         opp@816000000 {
343                 opp-hz = /bits/ 64 <816000000>;
344                 opp-microvolt = <825000>;
345         };
346         opp@1008000000 {
347                 opp-hz = /bits/ 64 <1008000000>;
348                 opp-microvolt = <875000>;
349         };
350         opp@1200000000 {
351                 opp-hz = /bits/ 64 <1200000000>;
352                 opp-microvolt = <950000>;
353         };
354         opp@1416000000 {
355                 opp-hz = /bits/ 64 <1416000000>;
356                 opp-microvolt = <1025000>;
357         };
358         opp@1608000000 {
359                 opp-hz = /bits/ 64 <1608000000>;
360                 opp-microvolt = <1100000>;
361         };
362         opp@1800000000 {
363                 opp-hz = /bits/ 64 <1800000000>;
364                 opp-microvolt = <1175000>;
365         };
366         opp@1992000000 {
367                 opp-hz = /bits/ 64 <1992000000>;
368                 opp-microvolt = <1250000>;
369         };
370 };
371
372 &CPU_COST_A72 {
373         busy-cost-data = <
374                 210   129       /*  408MHz */
375                 308   184       /*  600MHz */
376                 419   246       /*  816MHz */
377                 518   335       /* 1008MHz */
378                 617   428       /* 1200MHz */
379                 728   573       /* 1416MHz */
380                 827   724       /* 1608MHz */
381                 925   900       /* 1800MHz */
382                 1024  1108      /* 1992MHz */
383         >;
384         idle-cost-data = <
385               15
386               15
387                0
388         >;
389 };
390
391 &CPU_COST_A53 {
392         busy-cost-data = <
393                 108    46       /*  408M */
394                 159    67       /*  600M */
395                 216    90       /*  816M */
396                 267    120      /* 1008M */
397                 318    153      /* 1200M */
398                 375    198      /* 1416M */
399                 401    222      /* 1512M */
400         >;
401         idle-cost-data = <
402               6
403               6
404               0
405         >;
406 };
407
408 &CLUSTER_COST_A72 {
409         busy-cost-data = <
410                 210   129       /*  408MHz */
411                 308   184       /*  600MHz */
412                 419   246       /*  816MHz */
413                 518   335       /* 1008MHz */
414                 617   428       /* 1200MHz */
415                 728   573       /* 1416MHz */
416                 827   724       /* 1608MHz */
417                 925   900       /* 1800MHz */
418                 1024  1108      /* 1992MHz */
419         >;
420         idle-cost-data = <
421                  65
422                  65
423                  65
424         >;
425 };
426
427 &CLUSTER_COST_A53 {
428         busy-cost-data = <
429                 108    46       /*  408M */
430                 159    67       /*  600M */
431                 216    90       /*  816M */
432                 267    120      /* 1008M */
433                 318    153      /* 1200M */
434                 375    198      /* 1416M */
435                 401    222      /* 1512M */
436         >;
437         idle-cost-data = <
438                 56
439                 56
440                 56
441         >;
442 };
443
444 &gpu_opp_table {
445         compatible = "operating-points-v2";
446         opp-shared;
447         opp@200000000 {
448                 opp-hz = /bits/ 64 <200000000>;
449                 opp-microvolt = <825000>;
450         };
451         opp@300000000 {
452                 opp-hz = /bits/ 64 <300000000>;
453                 opp-microvolt = <850000>;
454         };
455         opp@400000000 {
456                 opp-hz = /bits/ 64 <400000000>;
457                 opp-microvolt = <875000>;
458         };
459         opp@500000000 {
460                 opp-hz = /bits/ 64 <500000000>;
461                 opp-microvolt = <950000>;
462         };
463         opp@600000000 {
464                 opp-hz = /bits/ 64 <600000000>;
465                 opp-microvolt = <1025000>;
466         };
467         opp@800000000 {
468                 opp-hz = /bits/ 64 <800000000>;
469                 opp-microvolt = <1125000>;
470         };
471 };
472
473 &rk_key {
474         compatible = "rockchip,key";
475         status = "okay";
476
477         io-channels = <&saradc 1>;
478
479         vol-up-key {
480                 linux,code = <114>;
481                 label = "volume up";
482                 rockchip,adc_value = <1>;
483         };
484
485         vol-down-key {
486                 linux,code = <115>;
487                 label = "volume down";
488                 rockchip,adc_value = <170>;
489         };
490
491         power-key {
492                 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
493                 linux,code = <116>;
494                 label = "power";
495                 gpio-key,wakeup;
496         };
497
498         menu-key {
499                 linux,code = <59>;
500                 label = "menu";
501                 rockchip,adc_value = <746>;
502         };
503
504         home-key {
505                 linux,code = <102>;
506                 label = "home";
507                 rockchip,adc_value = <355>;
508         };
509
510         back-key {
511                 linux,code = <158>;
512                 label = "back";
513                 rockchip,adc_value = <560>;
514         };
515
516         camera-key {
517                 linux,code = <212>;
518                 label = "camera";
519                 rockchip,adc_value = <450>;
520         };
521 };
522
523 &sdmmc {
524         clock-frequency = <50000000>;
525         clock-freq-min-max = <400000 150000000>;
526         supports-sd;
527         bus-width = <4>;
528         cap-mmc-highspeed;
529         cap-sd-highspeed;
530         disable-wp;
531         num-slots = <1>;
532         //sd-uhs-sdr104;
533         vqmmc-supply = <&vcc_sd>;
534         pinctrl-names = "default";
535         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
536         status = "okay";
537 };
538
539 &sdio0 {
540         clock-frequency = <150000000>;
541         clock-freq-min-max = <200000 150000000>;
542         supports-sdio;
543         bus-width = <4>;
544         disable-wp;
545         cap-sd-highspeed;
546         cap-sdio-irq;
547         keep-power-in-suspend;
548         mmc-pwrseq = <&sdio_pwrseq>;
549         non-removable;
550         num-slots = <1>;
551         pinctrl-names = "default";
552         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
553         sd-uhs-sdr104;
554         status = "okay";
555 };
556
557 &emmc_phy {
558         status = "okay";
559 };
560
561 &sdhci {
562         bus-width = <8>;
563         mmc-hs400-1_8v;
564         supports-emmc;
565         non-removable;
566         keep-power-in-suspend;
567         mmc-hs400-enhanced-strobe;
568         status = "okay";
569 };
570
571 &i2s0 {
572         status = "okay";
573         rockchip,i2s-broken-burst-len;
574         rockchip,playback-channels = <8>;
575         rockchip,capture-channels = <8>;
576         #sound-dai-cells = <0>;
577 };
578
579 &i2s2 {
580         #sound-dai-cells = <0>;
581 };
582
583 &spdif {
584         status = "okay";
585         #sound-dai-cells = <0>;
586 };
587
588 &i2c0 {
589         status = "okay";
590         i2c-scl-rising-time-ns = <180>;
591         i2c-scl-falling-time-ns = <30>;
592         clock-frequency = <400000>;
593
594         vdd_cpu_b: syr837@40 {
595                 compatible = "silergy,syr827";
596                 reg = <0x40>;
597                 vin-supply = <&vcc_sys>;
598                 regulator-compatible = "fan53555-reg";
599                 pinctrl-0 = <&vsel1_gpio>;
600                 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
601                 regulator-name = "vdd_cpu_b";
602                 regulator-min-microvolt = <712500>;
603                 regulator-max-microvolt = <1500000>;
604                 regulator-ramp-delay = <1000>;
605                 fcs,suspend-voltage-selector = <1>;
606                 regulator-always-on;
607                 regulator-initial-state = <3>;
608                 regulator-state-mem {
609                         regulator-off-in-suspend;
610                 };
611         };
612
613         vdd_gpu: syr828@41 {
614                 compatible = "silergy,syr828";
615                 status = "okay";
616                 reg = <0x41>;
617                 vin-supply = <&vcc_sys>;
618                 regulator-compatible = "fan53555-reg";
619                 pinctrl-0 = <&vsel2_gpio>;
620                 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
621                 regulator-name = "vdd_gpu";
622                 regulator-min-microvolt = <735000>;
623                 regulator-max-microvolt = <1400000>;
624                 regulator-ramp-delay = <1000>;
625                 fcs,suspend-voltage-selector = <1>;
626                 regulator-boot-on;
627                 regulator-state-mem {
628                         regulator-off-in-suspend;
629                 };
630         };
631
632         rk818: pmic@1c {
633                 compatible = "rockchip,rk818";
634                 status = "okay";
635                 reg = <0x1c>;
636                 clock-output-names = "xin32k", "wifibt_32kin";
637                 interrupt-parent = <&gpio1>;
638                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
639                 pinctrl-names = "default";
640                 pinctrl-0 = <&pmic_int_l>;
641                 rockchip,system-power-controller;
642                 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
643                 wakeup-source;
644                 extcon = <&fusb0>;
645                 #clock-cells = <1>;
646
647                 vcc1-supply = <&vcc_sys>;
648                 vcc2-supply = <&vcc_sys>;
649                 vcc3-supply = <&vcc_sys>;
650                 vcc4-supply = <&vcc_sys>;
651                 vcc6-supply = <&vcc_sys>;
652                 vcc7-supply = <&vcc3v3_sys>;
653                 vcc8-supply = <&vcc_sys>;
654                 vcc9-supply = <&vcc3v3_sys>;
655
656                 regulators {
657                         vdd_cpu_l: DCDC_REG1 {
658                                 regulator-name = "vdd_cpu_l";
659                                 regulator-always-on;
660                                 regulator-boot-on;
661                                 regulator-min-microvolt = <750000>;
662                                 regulator-max-microvolt = <1350000>;
663                                 regulator-ramp-delay = <6001>;
664                                 regulator-state-mem {
665                                         regulator-off-in-suspend;
666                                 };
667                         };
668
669                         vdd_center: DCDC_REG2 {
670                                 regulator-name = "vdd_center";
671                                 regulator-always-on;
672                                 regulator-boot-on;
673                                 regulator-min-microvolt = <800000>;
674                                 regulator-max-microvolt = <1350000>;
675                                 regulator-ramp-delay = <6001>;
676                                 regulator-state-mem {
677                                         regulator-off-in-suspend;
678                                 };
679                         };
680
681                         vcc_ddr: DCDC_REG3 {
682                                 regulator-name = "vcc_ddr";
683                                 regulator-always-on;
684                                 regulator-boot-on;
685                                 regulator-state-mem {
686                                         regulator-on-in-suspend;
687                                 };
688                         };
689
690                         vcc_1v8: DCDC_REG4 {
691                                 regulator-name = "vcc_1v8";
692                                 regulator-always-on;
693                                 regulator-boot-on;
694                                 regulator-min-microvolt = <1800000>;
695                                 regulator-max-microvolt = <1800000>;
696                                 regulator-state-mem {
697                                         regulator-on-in-suspend;
698                                         regulator-suspend-microvolt = <1800000>;
699                                 };
700                         };
701
702                         vcca3v0_codec: LDO_REG1 {
703                                 regulator-always-on;
704                                 regulator-boot-on;
705                                 regulator-min-microvolt = <3000000>;
706                                 regulator-max-microvolt = <3000000>;
707                                 regulator-name = "vcca3v0_codec";
708                                 regulator-state-mem {
709                                         regulator-off-in-suspend;
710                                 };
711                         };
712
713                         vcc3v0_tp: LDO_REG2 {
714                                 regulator-always-on;
715                                 regulator-boot-on;
716                                 regulator-min-microvolt = <3000000>;
717                                 regulator-max-microvolt = <3000000>;
718                                 regulator-name = "vcc3v0_tp";
719                                 regulator-state-mem {
720                                         regulator-off-in-suspend;
721                                 };
722                         };
723
724                         vcca1v8_codec: LDO_REG3 {
725                                 regulator-always-on;
726                                 regulator-boot-on;
727                                 regulator-min-microvolt = <1800000>;
728                                 regulator-max-microvolt = <1800000>;
729                                 regulator-name = "vcca1v8_codec";
730                                 regulator-state-mem {
731                                         regulator-off-in-suspend;
732                                 };
733                         };
734
735                         vcc_power_on: LDO_REG4 {
736                                 regulator-always-on;
737                                 regulator-boot-on;
738                                 regulator-min-microvolt = <3300000>;
739                                 regulator-max-microvolt = <3300000>;
740                                 regulator-name = "vcc_power_on";
741                                 regulator-state-mem {
742                                         regulator-on-in-suspend;
743                                         regulator-suspend-microvolt = <3300000>;
744                                 };
745                         };
746
747                         vcc_3v0: LDO_REG5 {
748                                 regulator-always-on;
749                                 regulator-boot-on;
750                                 regulator-min-microvolt = <3000000>;
751                                 regulator-max-microvolt = <3000000>;
752                                 regulator-name = "vcc_3v0";
753                                 regulator-state-mem {
754                                         regulator-on-in-suspend;
755                                         regulator-suspend-microvolt = <3000000>;
756                                 };
757                         };
758
759                         vcc_1v5: LDO_REG6 {
760                                 regulator-always-on;
761                                 regulator-boot-on;
762                                 regulator-min-microvolt = <1500000>;
763                                 regulator-max-microvolt = <1500000>;
764                                 regulator-name = "vcc_1v5";
765                                 regulator-state-mem {
766                                         regulator-on-in-suspend;
767                                         regulator-suspend-microvolt = <1500000>;
768                                 };
769                         };
770
771                         vcc1v8_dvp: LDO_REG7 {
772                                 regulator-always-on;
773                                 regulator-boot-on;
774                                 regulator-min-microvolt = <1800000>;
775                                 regulator-max-microvolt = <1800000>;
776                                 regulator-name = "vcc1v8_dvp";
777                                 regulator-state-mem {
778                                         regulator-off-in-suspend;
779                                 };
780                         };
781
782                         vcc3v3_s3: LDO_REG8 {
783                                 regulator-always-on;
784                                 regulator-boot-on;
785                                 regulator-min-microvolt = <3300000>;
786                                 regulator-max-microvolt = <3300000>;
787                                 regulator-name = "vcc3v3_s3";
788                                 regulator-state-mem {
789                                         regulator-off-in-suspend;
790                                 };
791                         };
792
793                         vcc_sd: LDO_REG9 {
794                                 regulator-always-on;
795                                 regulator-boot-on;
796                                 regulator-min-microvolt = <1800000>;
797                                 regulator-max-microvolt = <3300000>;
798                                 regulator-name = "vcc_sd";
799                                 regulator-state-mem {
800                                         regulator-on-in-suspend;
801                                         regulator-suspend-microvolt = <3300000>;
802                                 };
803                         };
804
805                         vcc3v3_s0: SWITCH_REG {
806                                 regulator-always-on;
807                                 regulator-boot-on;
808                                 regulator-name = "vcc3v3_s0";
809                                 regulator-state-mem {
810                                         regulator-on-in-suspend;
811                                 };
812                         };
813                 };
814
815                 battery {
816                         compatible = "rk818-battery";
817                         ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
818                                 3793 3807 3827 3853 3896 3937 3974 4007 4066
819                                 4110 4161 4217 4308>;
820                         design_capacity = <7916>;
821                         design_qmax = <8708>;
822                         bat_res = <65>;
823                         max_input_current = <3000>;
824                         max_chrg_current = <3000>;
825                         max_chrg_voltage = <4350>;
826                         sleep_enter_current = <300>;
827                         sleep_exit_current = <300>;
828                         power_off_thresd = <3400>;
829                         zero_algorithm_vol = <3950>;
830                         fb_temperature = <105>;
831                         sample_res = <20>;
832                         max_soc_offset = <60>;
833                         energy_mode = <0>;
834                         monitor_sec = <5>;
835                         virtual_power = <0>;
836                         power_dc2otg = <0>;
837                 };
838         };
839 };
840
841 &i2c1 {
842         status = "okay";
843         i2c-scl-rising-time-ns = <140>;
844         i2c-scl-falling-time-ns = <30>;
845
846         es8316: es8316@10 {
847                 #sound-dai-cells = <0>;
848                 compatible = "everest,es8316";
849                 reg = <0x11>;
850                 clocks = <&cru SCLK_I2S_8CH_OUT>;
851                 clock-names = "mclk";
852                 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
853         };
854 };
855
856 &i2c4 {
857         status = "okay";
858         i2c-scl-rising-time-ns = <345>;
859         i2c-scl-falling-time-ns = <11>;
860         clock-frequency = <400000>;
861
862         lsm330_accel@1e {
863                 status = "okay";
864                 compatible = "lsm330_acc";
865                 pinctrl-names = "default";
866                 pinctrl-0 = <&lsm330a_irq_gpio>;
867                 reg = <0x1e>;
868                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
869                 type = <SENSOR_TYPE_ACCEL>;
870                 irq_enable = <1>;
871                 poll_delay_ms = <30>;
872                 power-off-in-suspend = <1>;
873                 layout = <4>;
874         };
875
876         lsm330_gyro@6a {
877                 status = "okay";
878                 compatible = "lsm330_gyro";
879                 pinctrl-names = "default";
880                 pinctrl-0 = <&lsm330g_irq_gpio>;
881                 reg = <0x6a>;
882                 irq-gpio = <&gpio1 20 IRQ_TYPE_EDGE_RISING>;
883                 type = <SENSOR_TYPE_GYROSCOPE>;
884                 irq_enable = <0>;
885                 power-off-in-suspend = <1>;
886                 poll_delay_ms = <30>;
887         };
888
889         mpu6500@68 {
890                 status = "disabled";
891                 compatible = "invensense,mpu6500";
892                 pinctrl-names = "default";
893                 pinctrl-0 = <&mpu6500_irq_gpio>;
894                 reg = <0x68>;
895                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
896                 mpu-int_config = <0x10>;
897                 mpu-level_shifter = <0>;
898                 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
899                 orientation-x= <1>;
900                 orientation-y= <1>;
901                 orientation-z= <0>;
902                 support-hw-poweroff = <1>;
903                 mpu-debug = <1>;
904         };
905
906         sensor@0d {
907                 status = "okay";
908                 compatible = "ak8963";
909                 pinctrl-names = "default";
910                 pinctrl-0 = <&ak8963_irq_gpio>;
911                 reg = <0x0d>;
912                 type = <SENSOR_TYPE_COMPASS>;
913                 irq-gpio = <&gpio2 28 IRQ_TYPE_EDGE_RISING>;
914                 irq_enable = <0>;
915                 poll_delay_ms = <30>;
916                 layout = <3>;
917         };
918
919         sensor@10 {
920                 status = "okay";
921                 compatible = "capella,light_cm3218";
922                 pinctrl-names = "default";
923                 pinctrl-0 = <&cm3218_irq_gpio>;
924                 reg = <0x10>;
925                 type = <SENSOR_TYPE_LIGHT>;
926                 irq-gpio = <&gpio4 24 IRQ_TYPE_EDGE_FALLING>;
927                 irq_enable = <1>;
928                 poll_delay_ms = <30>;
929         };
930
931         fusb0: fusb30x@22 {
932                 compatible = "fairchild,fusb302";
933                 reg = <0x22>;
934                 pinctrl-names = "default";
935                 pinctrl-0 = <&fusb0_int>;
936                 int-n-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
937                 status = "okay";
938         };
939 };
940
941 &i2c5 {
942         status = "okay";
943         i2c-scl-rising-time-ns = <150>;
944         i2c-scl-falling-time-ns = <30>;
945         clock-frequency = <400000>;
946
947         gt9xx: gt9xx@14 {
948                 compatible = "goodix,gt9xx";
949                 reg = <0x14>;
950                 touch-gpio = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
951                 reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
952                 max-x = <1536>;
953                 max-y = <2048>;
954                 tp-size = <970>;
955                 tp-supply = <&vcc3v0_tp>;
956         };
957 };
958
959 &isp0 {
960         status = "okay";
961 };
962
963 &isp1 {
964         status = "okay";
965 };
966
967 &cpu_l0 {
968         cpu-supply = <&vdd_cpu_l>;
969 };
970
971 &cpu_l1 {
972         cpu-supply = <&vdd_cpu_l>;
973 };
974
975 &cpu_l2 {
976         cpu-supply = <&vdd_cpu_l>;
977 };
978
979 &cpu_l3 {
980         cpu-supply = <&vdd_cpu_l>;
981 };
982
983 &cpu_b0 {
984         cpu-supply = <&vdd_cpu_b>;
985 };
986
987 &cpu_b1 {
988         cpu-supply = <&vdd_cpu_b>;
989 };
990
991 &gpu {
992         status = "okay";
993         mali-supply = <&vdd_gpu>;
994 };
995
996 &rga {
997         status = "okay";
998 };
999
1000 &spi1 {
1001         status = "disabled";
1002         max-freq = <50000000>;
1003         mpu6500@0 {
1004                 status = "disabled";
1005                 compatible = "inv-spi,mpu6500";
1006                 pinctrl-names = "default";
1007                 pinctrl-0 = <&mpu6500_irq_gpio>;
1008                 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
1009                 reg = <0>;
1010                 spi-max-frequency = <1000000>;
1011                 spi-cpha;
1012                 spi-cpol;
1013                 mpu-int_config = <0x00>;
1014                 mpu-level_shifter = <0>;
1015                 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
1016                 orientation-x= <1>;
1017                 orientation-y= <0>;
1018                 orientation-z= <1>;
1019                 support-hw-poweroff = <1>;
1020                 mpu-debug = <1>;
1021         };
1022 };
1023
1024 &tcphy0 {
1025         extcon = <&fusb0>;
1026         status = "okay";
1027 };
1028
1029 &tsadc {
1030         rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
1031         rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
1032         status = "okay";
1033 };
1034
1035 &u2phy0 {
1036         status = "okay";
1037         extcon = <&fusb0>;
1038
1039         u2phy0_otg: otg-port {
1040                 status = "okay";
1041         };
1042
1043         u2phy0_host: host-port {
1044                 phy-supply = <&vcc5v0_host>;
1045                 status = "okay";
1046         };
1047 };
1048
1049 &uart0 {
1050         pinctrl-names = "default";
1051         pinctrl-0 = <&uart0_xfer &uart0_cts>;
1052         status = "okay";
1053 };
1054
1055 &uart2 {
1056         status = "okay";
1057 };
1058
1059 &usb_host0_ehci {
1060         status = "okay";
1061 };
1062
1063 &usb_host0_ohci {
1064         status = "okay";
1065 };
1066
1067 &usbdrd3_0 {
1068         extcon = <&fusb0>;
1069         status = "okay";
1070 };
1071
1072 &usbdrd_dwc3_0 {
1073         status = "okay";
1074 };
1075
1076 &vop0_pwm {
1077         assigned-clocks = <&cru SCLK_VOP0_PWM>;
1078         assigned-clock-rates = <50000000>;
1079         status = "okay";
1080 };
1081
1082 &pwm2 {
1083         status = "okay";
1084 };
1085
1086 &saradc {
1087         status = "okay";
1088 };
1089
1090 &pinctrl {
1091         sdio-pwrseq {
1092                 wifi_enable_h: wifi-enable-h {
1093                         rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
1094                 };
1095         };
1096
1097         wireless-bluetooth {
1098                 uart0_gpios: uart0-gpios {
1099                         rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
1100                 };
1101         };
1102
1103         pmic {
1104                 pmic_int_l: pmic-int-l {
1105                         rockchip,pins =
1106                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
1107                 };
1108
1109                 pmic_dvs2: pmic-dvs2 {
1110                         rockchip,pins =
1111                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
1112                 };
1113                 vsel1_gpio: vsel1-gpio {
1114                         rockchip,pins =
1115                                 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
1116                 };
1117                 vsel2_gpio: vsel2-gpio {
1118                         rockchip,pins =
1119                                 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
1120                 };
1121         };
1122
1123         hallsensor {
1124                 mh248_irq_gpio: mh248-irq-gpio {
1125                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
1126                 };
1127         };
1128
1129         headphone {
1130                 hp_det: hp-det {
1131                         rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
1132                 };
1133         };
1134
1135         lcdpwr-enable {
1136                 lcdpwr_enable_h: lcdpwr-enable-h {
1137                         rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
1138                 };
1139         };
1140
1141         lsm330_a {
1142                 lsm330a_irq_gpio: lsm330a-irq-gpio {
1143                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1144                 };
1145         };
1146
1147         lsm330_g {
1148                 lsm330g_irq_gpio: lsm330g-irq-gpio {
1149                         rockchip,pins = <1 20 RK_FUNC_GPIO &pcfg_pull_none>;
1150                 };
1151         };
1152
1153         mpu6500 {
1154                 mpu6500_irq_gpio: mpu6500-irq-gpio {
1155                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1156                 };
1157         };
1158
1159         ak8963 {
1160                 ak8963_irq_gpio: ak8963-irq-gpio {
1161                         rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
1162                 };
1163         };
1164
1165         cm3218 {
1166                 cm3218_irq_gpio: cm3218-irq-gpio {
1167                         rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_up>;
1168                 };
1169         };
1170
1171         usb2 {
1172                 host_vbus_drv: host-vbus-drv {
1173                         rockchip,pins =
1174                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1175                 };
1176         };
1177
1178         fusb30x {
1179                 fusb0_int: fusb0-int {
1180                         rockchip,pins =
1181                                 <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
1182                 };
1183         };
1184 };
1185
1186 &rk_screen {
1187         #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
1188 };
1189
1190 &cdn_dp_sound {
1191         status = "okay";
1192 };
1193
1194 &cdn_dp_fb {
1195         status = "okay";
1196         extcon = <&fusb0>;
1197         phys = <&tcphy0_dp>;
1198         dp_vop_sel = <DISPLAY_SOURCE_LCDC1>;
1199 };
1200
1201 &vopb_rk_fb {
1202         status = "okay";
1203         rockchip,cabc_mode = <1>;
1204         power_ctr: power_ctr {
1205                 rockchip,debug = <0>;
1206
1207                 lcd_en: lcd-en {
1208                         rockchip,power_type = <GPIO>;
1209                         pinctrl-names = "default";
1210                         pinctrl-0 = <&lcdpwr_enable_h>;
1211                         gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
1212                         rockchip,delay = <10>;
1213                 };
1214         };
1215 };
1216
1217 &vopl_rk_fb {
1218         status = "okay";
1219 };
1220
1221 &edp_rk_fb {
1222         status = "okay";
1223 };