arch/arm64/boot/dts/rockchip/rk3399-firefly-linux.dts

   1 /*
   2  * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 /dts-v1/;
  44
  45 #include "dt-bindings/pwm/pwm.h"
  46 #include "rk3399.dtsi"
  47 #include "rk3399-opp.dtsi"
  48 #include "rk3399-linux.dtsi"
  49 #include <dt-bindings/input/input.h>
  50
  51 / {
  52         model = "Rockchip RK3399 Firefly Board (Linux Opensource)";
  53         compatible = "rockchip,rk3399-firefly-linux", "rockchip,rk3399";
  54
  55         backlight: backlight {
  56                 status = "disabled";
  57                 compatible = "pwm-backlight";
  58                 pwms = <&pwm0 0 25000 0>;
  59                 brightness-levels = <
  60                           0   1   2   3   4   5   6   7
  61                           8   9  10  11  12  13  14  15
  62                          16  17  18  19  20  21  22  23
  63                          24  25  26  27  28  29  30  31
  64                          32  33  34  35  36  37  38  39
  65                          40  41  42  43  44  45  46  47
  66                          48  49  50  51  52  53  54  55
  67                          56  57  58  59  60  61  62  63
  68                          64  65  66  67  68  69  70  71
  69                          72  73  74  75  76  77  78  79
  70                          80  81  82  83  84  85  86  87
  71                          88  89  90  91  92  93  94  95
  72                          96  97  98  99 100 101 102 103
  73                         104 105 106 107 108 109 110 111
  74                         112 113 114 115 116 117 118 119
  75                         120 121 122 123 124 125 126 127
  76                         128 129 130 131 132 133 134 135
  77                         136 137 138 139 140 141 142 143
  78                         144 145 146 147 148 149 150 151
  79                         152 153 154 155 156 157 158 159
  80                         160 161 162 163 164 165 166 167
  81                         168 169 170 171 172 173 174 175
  82                         176 177 178 179 180 181 182 183
  83                         184 185 186 187 188 189 190 191
  84                         192 193 194 195 196 197 198 199
  85                         200 201 202 203 204 205 206 207
  86                         208 209 210 211 212 213 214 215
  87                         216 217 218 219 220 221 222 223
  88                         224 225 226 227 228 229 230 231
  89                         232 233 234 235 236 237 238 239
  90                         240 241 242 243 244 245 246 247
  91                         248 249 250 251 252 253 254 255>;
  92                 default-brightness-level = <200>;
  93         };
  94
  95         clkin_gmac: external-gmac-clock {
  96                 compatible = "fixed-clock";
  97                 clock-frequency = <125000000>;
  98                 clock-output-names = "clkin_gmac";
  99                 #clock-cells = <0>;
 100         };
 101
 102         dw_hdmi_audio: dw-hdmi-audio {
 103                 status = "disabled";
 104                 compatible = "rockchip,dw-hdmi-audio";
 105                 #sound-dai-cells = <0>;
 106         };
 107
 108         edp_panel: edp-panel {
 109                 status = "disabled";
 110                 compatible = "sharp,lcd-f402", "panel-simple";
 111                 backlight = <&backlight>;
 112                 power-supply = <&vcc_lcd>;
 113                 enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
 114                 pinctrl-names = "default";
 115                 pinctrl-0 = <&lcd_panel_reset>;
 116
 117                 ports {
 118                         panel_in_edp: endpoint {
 119                                 remote-endpoint = <&edp_out_panel>;
 120                         };
 121                 };
 122         };
 123
 124         fiq_debugger: fiq-debugger {
 125                 compatible = "rockchip,fiq-debugger";
 126                 rockchip,serial-id = <2>;
 127                 rockchip,signal-irq = <182>;
 128                 rockchip,wake-irq = <0>;
 129                 rockchip,irq-mode-enable = <1>;  /* If enable uart uses irq instead of fiq */
 130                 rockchip,baudrate = <1500000>;  /* Only 115200 and 1500000 */
 131                 pinctrl-names = "default";
 132                 pinctrl-0 = <&uart2c_xfer>;
 133         };
 134
 135         gpio-keys {
 136                 compatible = "gpio-keys";
 137                 #address-cells = <1>;
 138                 #size-cells = <0>;
 139                 autorepeat;
 140
 141                 pinctrl-names = "default";
 142                 pinctrl-0 = <&pwrbtn>;
 143
 144                 button@0 {
 145                         gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
 146                         linux,code = <KEY_POWER>;
 147                         label = "GPIO Key Power";
 148                         linux,input-type = <1>;
 149                         gpio-key,wakeup = <1>;
 150                         debounce-interval = <100>;
 151                 };
 152         };
 153
 154         rt5640-sound {
 155                 compatible = "simple-audio-card";
 156                 simple-audio-card,format = "i2s";
 157                 simple-audio-card,name = "rockchip,rt5640-codec";
 158                 simple-audio-card,mclk-fs = <256>;
 159                 simple-audio-card,widgets =
 160                         "Microphone", "Mic Jack",
 161                         "Headphone", "Headphone Jack";
 162                 simple-audio-card,routing =
 163                         "Mic Jack", "MICBIAS1",
 164                         "IN1P", "Mic Jack",
 165                         "Headphone Jack", "HPOL",
 166                         "Headphone Jack", "HPOR";
 167                 simple-audio-card,cpu {
 168                         sound-dai = <&i2s1>;
 169                 };
 170                 simple-audio-card,codec {
 171                         sound-dai = <&rt5640>;
 172                 };
 173         };
 174
 175         hdmi_sound: hdmi-sound {
 176                 status = "disabled";
 177                 compatible = "simple-audio-card";
 178                 simple-audio-card,format = "i2s";
 179                 simple-audio-card,mclk-fs = <256>;
 180                 simple-audio-card,name = "rockchip,hdmi";
 181
 182                 simple-audio-card,cpu {
 183                         sound-dai = <&i2s2>;
 184                 };
 185                 simple-audio-card,codec {
 186                         sound-dai = <&dw_hdmi_audio>;
 187                 };
 188         };
 189
 190         hdmi_codec: hdmi-codec {
 191                 compatible = "simple-audio-card";
 192                 simple-audio-card,format = "i2s";
 193                 simple-audio-card,mclk-fs = <256>;
 194                 simple-audio-card,name = "HDMI-CODEC";
 195
 196                 simple-audio-card,cpu {
 197                         sound-dai = <&i2s2>;
 198                 };
 199
 200                 simple-audio-card,codec {
 201                         sound-dai = <&hdmi>;
 202                 };
 203         };
 204
 205         spdif-sound {
 206                 status = "okay";
 207                 compatible = "simple-audio-card";
 208                 simple-audio-card,name = "ROCKCHIP,SPDIF";
 209                 simple-audio-card,cpu {
 210                         sound-dai = <&spdif>;
 211                 };
 212                 simple-audio-card,codec {
 213                         sound-dai = <&spdif_out>;
 214                 };
 215         };
 216
 217         spdif_out: spdif-out {
 218                 status = "okay";
 219                 compatible = "linux,spdif-dit";
 220                 #sound-dai-cells = <0>;
 221         };
 222
 223         sdio_pwrseq: sdio-pwrseq {
 224                 compatible = "mmc-pwrseq-simple";
 225                 clocks = <&rk808 1>;
 226                 clock-names = "ext_clock";
 227                 pinctrl-names = "default";
 228                 pinctrl-0 = <&wifi_enable_h>;
 229
 230                 /*
 231                  * On the module itself this is one of these (depending
 232                  * on the actual card populated):
 233                  * - SDIO_RESET_L_WL_REG_ON
 234                  * - PDN (power down when low)
 235                  */
 236                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
 237         };
 238
 239         vcc3v3_pcie: vcc3v3-pcie-regulator {
 240                 compatible = "regulator-fixed";
 241                 enable-active-high;
 242                 regulator-always-on;
 243                 regulator-boot-on;
 244                 gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 245                 pinctrl-names = "default";
 246                 pinctrl-0 = <&pcie_drv>;
 247                 regulator-name = "vcc3v3_pcie";
 248         };
 249
 250         vcc3v3_sys: vcc3v3-sys {
 251                 compatible = "regulator-fixed";
 252                 regulator-name = "vcc3v3_sys";
 253                 regulator-always-on;
 254                 regulator-boot-on;
 255                 regulator-min-microvolt = <3300000>;
 256                 regulator-max-microvolt = <3300000>;
 257         };
 258
 259         vcc5v0_host: vcc5v0-host-regulator {
 260                 compatible = "regulator-fixed";
 261                 enable-active-high;
 262                 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
 263                 pinctrl-names = "default";
 264                 pinctrl-0 = <&host_vbus_drv>;
 265                 regulator-name = "vcc5v0_host";
 266                 regulator-always-on;
 267         };
 268
 269         vcc5v0_sys: vcc5v0-sys {
 270                 compatible = "regulator-fixed";
 271                 regulator-name = "vcc5v0_sys";
 272                 regulator-always-on;
 273                 regulator-boot-on;
 274                 regulator-min-microvolt = <5000000>;
 275                 regulator-max-microvolt = <5000000>;
 276         };
 277
 278         vcc_phy: vcc-phy-regulator {
 279                 compatible = "regulator-fixed";
 280                 regulator-name = "vcc_phy";
 281                 regulator-always-on;
 282                 regulator-boot-on;
 283         };
 284
 285         vdd_log: vdd-log {
 286                 compatible = "pwm-regulator";
 287                 pwms = <&pwm2 0 25000 1>;
 288                 regulator-name = "vdd_log";
 289                 regulator-min-microvolt = <800000>;
 290                 regulator-max-microvolt = <1400000>;
 291                 regulator-always-on;
 292                 regulator-boot-on;
 293
 294                 /* for rockchip boot on */
 295                 rockchip,pwm_id= <2>;
 296                 rockchip,pwm_voltage = <1000000>;
 297         };
 298
 299         vccadc_ref: vccadc-ref {
 300                 compatible = "regulator-fixed";
 301                 regulator-name = "vcc1v8_sys";
 302                 regulator-always-on;
 303                 regulator-boot-on;
 304                 regulator-min-microvolt = <1800000>;
 305                 regulator-max-microvolt = <1800000>;
 306         };
 307
 308         vcc_lcd: vcc-lcd-regulator {
 309                 compatible = "regulator-fixed";
 310                 regulator-always-on;
 311                 regulator-boot-on;
 312                 enable-active-high;
 313                 gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
 314                 pinctrl-names = "default";
 315                 pinctrl-0 = <&lcd_en>;
 316                 regulator-name = "vcc_lcd";
 317         };
 318
 319         wireless-wlan {
 320                 compatible = "wlan-platdata";
 321                 rockchip,grf = <&grf>;
 322                 wifi_chip_type = "ap6354";
 323                 sdio_vref = <1800>;
 324                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
 325                 status = "okay";
 326         };
 327
 328         wireless-bluetooth {
 329                 compatible = "bluetooth-platdata";
 330                 //wifi-bt-power-toggle;
 331                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
 332                 pinctrl-names = "default", "rts_gpio";
 333                 pinctrl-0 = <&uart0_rts>;
 334                 pinctrl-1 = <&uart0_gpios>;
 335                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
 336                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
 337                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
 338                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
 339                 status = "okay";
 340         };
 341 };
 342
 343 &cpu_l0 {
 344         cpu-supply = <&vdd_cpu_l>;
 345 };
 346
 347 &cpu_l1 {
 348         cpu-supply = <&vdd_cpu_l>;
 349 };
 350
 351 &cpu_l2 {
 352         cpu-supply = <&vdd_cpu_l>;
 353 };
 354
 355 &cpu_l3 {
 356         cpu-supply = <&vdd_cpu_l>;
 357 };
 358
 359 &cpu_b0 {
 360         cpu-supply = <&vdd_cpu_b>;
 361 };
 362
 363 &cpu_b1 {
 364         cpu-supply = <&vdd_cpu_b>;
 365 };
 366
 367 &display_subsystem {
 368         status = "okay";
 369 };
 370
 371 &edp {
 372         status = "disabled";
 373
 374         ports {
 375                 edp_out: port@1 {
 376                         reg = <1>;
 377                         #address-cells = <1>;
 378                         #size-cells = <0>;
 379
 380                         edp_out_panel: endpoint@0 {
 381                                 reg = <0>;
 382                                 remote-endpoint = <&panel_in_edp>;
 383                         };
 384                 };
 385         };
 386 };
 387
 388 &emmc_phy {
 389         status = "okay";
 390 };
 391
 392 &gmac {
 393         phy-supply = <&vcc_phy>;
 394         phy-mode = "rgmii";
 395         clock_in_out = "input";
 396         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
 397         snps,reset-active-low;
 398         snps,reset-delays-us = <0 10000 50000>;
 399         assigned-clocks = <&cru SCLK_RMII_SRC>;
 400         assigned-clock-parents = <&clkin_gmac>;
 401         pinctrl-names = "default";
 402         pinctrl-0 = <&rgmii_pins>;
 403         tx_delay = <0x28>;
 404         rx_delay = <0x11>;
 405         status = "okay";
 406 };
 407
 408 &gpu {
 409         status = "okay";
 410         mali-supply = <&vdd_gpu>;
 411 };
 412
 413 &hdmi {
 414         #address-cells = <1>;
 415         #size-cells = <0>;
 416         #sound-dai-cells = <0>;
 417         status = "okay";
 418 };
 419
 420 &i2c0 {
 421         status = "okay";
 422         i2c-scl-rising-time-ns = <168>;
 423         i2c-scl-falling-time-ns = <4>;
 424         clock-frequency = <400000>;
 425
 426         vdd_cpu_b: syr827@40 {
 427                 compatible = "silergy,syr827";
 428                 reg = <0x40>;
 429                 vin-supply = <&vcc5v0_sys>;
 430                 regulator-compatible = "fan53555-reg";
 431                 regulator-name = "vdd_cpu_b";
 432                 regulator-min-microvolt = <712500>;
 433                 regulator-max-microvolt = <1500000>;
 434                 regulator-ramp-delay = <1000>;
 435                 vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
 436                 fcs,suspend-voltage-selector = <1>;
 437                 regulator-always-on;
 438                 regulator-boot-on;
 439                 regulator-initial-state = <3>;
 440                         regulator-state-mem {
 441                         regulator-off-in-suspend;
 442                 };
 443         };
 444
 445         vdd_gpu: syr828@41 {
 446                 compatible = "silergy,syr828";
 447                 reg = <0x41>;
 448                 vin-supply = <&vcc5v0_sys>;
 449                 regulator-compatible = "fan53555-reg";
 450                 regulator-name = "vdd_gpu";
 451                 regulator-min-microvolt = <712500>;
 452                 regulator-max-microvolt = <1500000>;
 453                 regulator-ramp-delay = <1000>;
 454                 fcs,suspend-voltage-selector = <1>;
 455                 regulator-always-on;
 456                 regulator-boot-on;
 457                 regulator-initial-state = <3>;
 458                         regulator-state-mem {
 459                         regulator-off-in-suspend;
 460                 };
 461         };
 462
 463         rk808: pmic@1b {
 464                 compatible = "rockchip,rk808";
 465                 reg = <0x1b>;
 466                 interrupt-parent = <&gpio1>;
 467                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 468                 pinctrl-names = "default";
 469                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
 470                 rockchip,system-power-controller;
 471                 wakeup-source;
 472                 #clock-cells = <1>;
 473                 clock-output-names = "xin32k", "rk808-clkout2";
 474
 475                 vcc1-supply = <&vcc3v3_sys>;
 476                 vcc2-supply = <&vcc3v3_sys>;
 477                 vcc3-supply = <&vcc3v3_sys>;
 478                 vcc4-supply = <&vcc3v3_sys>;
 479                 vcc6-supply = <&vcc3v3_sys>;
 480                 vcc7-supply = <&vcc3v3_sys>;
 481                 vcc8-supply = <&vcc3v3_sys>;
 482                 vcc9-supply = <&vcc3v3_sys>;
 483                 vcc10-supply = <&vcc3v3_sys>;
 484                 vcc11-supply = <&vcc3v3_sys>;
 485                 vcc12-supply = <&vcc3v3_sys>;
 486                 vddio-supply = <&vcc1v8_pmu>;
 487
 488                 regulators {
 489                         vdd_center: DCDC_REG1 {
 490                                 regulator-always-on;
 491                                 regulator-boot-on;
 492                                 regulator-min-microvolt = <750000>;
 493                                 regulator-max-microvolt = <1350000>;
 494                                 regulator-ramp-delay = <6001>;
 495                                 regulator-name = "vdd_center";
 496                                 regulator-state-mem {
 497                                         regulator-off-in-suspend;
 498                                 };
 499                         };
 500
 501                         vdd_cpu_l: DCDC_REG2 {
 502                                 regulator-always-on;
 503                                 regulator-boot-on;
 504                                 regulator-min-microvolt = <750000>;
 505                                 regulator-max-microvolt = <1350000>;
 506                                 regulator-ramp-delay = <6001>;
 507                                 regulator-name = "vdd_cpu_l";
 508                                 regulator-state-mem {
 509                                         regulator-off-in-suspend;
 510                                 };
 511                         };
 512
 513                         vcc_ddr: DCDC_REG3 {
 514                                 regulator-always-on;
 515                                 regulator-boot-on;
 516                                 regulator-name = "vcc_ddr";
 517                                 regulator-state-mem {
 518                                         regulator-on-in-suspend;
 519                                 };
 520                         };
 521
 522                         vcc_1v8: DCDC_REG4 {
 523                                 regulator-always-on;
 524                                 regulator-boot-on;
 525                                 regulator-min-microvolt = <1800000>;
 526                                 regulator-max-microvolt = <1800000>;
 527                                 regulator-name = "vcc_1v8";
 528                                 regulator-state-mem {
 529                                         regulator-on-in-suspend;
 530                                         regulator-suspend-microvolt = <1800000>;
 531                                 };
 532                         };
 533
 534                         vcc1v8_dvp: LDO_REG1 {
 535                                 regulator-always-on;
 536                                 regulator-boot-on;
 537                                 regulator-min-microvolt = <1800000>;
 538                                 regulator-max-microvolt = <1800000>;
 539                                 regulator-name = "vcc1v8_dvp";
 540                                 regulator-state-mem {
 541                                         regulator-off-in-suspend;
 542                                 };
 543                         };
 544
 545                         vcc3v0_tp: LDO_REG2 {
 546                                 regulator-always-on;
 547                                 regulator-boot-on;
 548                                 regulator-min-microvolt = <3000000>;
 549                                 regulator-max-microvolt = <3000000>;
 550                                 regulator-name = "vcc3v0_tp";
 551                                 regulator-state-mem {
 552                                         regulator-off-in-suspend;
 553                                 };
 554                         };
 555
 556                         vcc1v8_pmu: LDO_REG3 {
 557                                 regulator-always-on;
 558                                 regulator-boot-on;
 559                                 regulator-min-microvolt = <1800000>;
 560                                 regulator-max-microvolt = <1800000>;
 561                                 regulator-name = "vcc1v8_pmu";
 562                                 regulator-state-mem {
 563                                         regulator-on-in-suspend;
 564                                         regulator-suspend-microvolt = <1800000>;
 565                                 };
 566                         };
 567
 568                         vcc_sd: LDO_REG4 {
 569                                 regulator-always-on;
 570                                 regulator-boot-on;
 571                                 regulator-min-microvolt = <1800000>;
 572                                 regulator-max-microvolt = <3300000>;
 573                                 regulator-name = "vcc_sd";
 574                                 regulator-state-mem {
 575                                         regulator-on-in-suspend;
 576                                         regulator-suspend-microvolt = <3300000>;
 577                                 };
 578                         };
 579
 580                         vcca3v0_codec: LDO_REG5 {
 581                                 regulator-always-on;
 582                                 regulator-boot-on;
 583                                 regulator-min-microvolt = <3000000>;
 584                                 regulator-max-microvolt = <3000000>;
 585                                 regulator-name = "vcca3v0_codec";
 586                                 regulator-state-mem {
 587                                         regulator-off-in-suspend;
 588                                 };
 589                         };
 590
 591                         vcc_1v5: LDO_REG6 {
 592                                 regulator-always-on;
 593                                 regulator-boot-on;
 594                                 regulator-min-microvolt = <1500000>;
 595                                 regulator-max-microvolt = <1500000>;
 596                                 regulator-name = "vcc_1v5";
 597                                 regulator-state-mem {
 598                                         regulator-on-in-suspend;
 599                                         regulator-suspend-microvolt = <1500000>;
 600                                 };
 601                         };
 602
 603                         vcca1v8_codec: LDO_REG7 {
 604                                 regulator-always-on;
 605                                 regulator-boot-on;
 606                                 regulator-min-microvolt = <1800000>;
 607                                 regulator-max-microvolt = <1800000>;
 608                                 regulator-name = "vcca1v8_codec";
 609                                 regulator-state-mem {
 610                                         regulator-off-in-suspend;
 611                                 };
 612                         };
 613
 614                         vcc_3v0: LDO_REG8 {
 615                                 regulator-always-on;
 616                                 regulator-boot-on;
 617                                 regulator-min-microvolt = <3000000>;
 618                                 regulator-max-microvolt = <3000000>;
 619                                 regulator-name = "vcc_3v0";
 620                                 regulator-state-mem {
 621                                         regulator-on-in-suspend;
 622                                         regulator-suspend-microvolt = <3000000>;
 623                                 };
 624                         };
 625
 626                         vcc3v3_s3: SWITCH_REG1 {
 627                                 regulator-always-on;
 628                                 regulator-boot-on;
 629                                 regulator-name = "vcc3v3_s3";
 630                                 regulator-state-mem {
 631                                         regulator-off-in-suspend;
 632                                 };
 633                         };
 634
 635                         vcc3v3_s0: SWITCH_REG2 {
 636                                 regulator-always-on;
 637                                 regulator-boot-on;
 638                                 regulator-name = "vcc3v3_s0";
 639                                 regulator-state-mem {
 640                                         regulator-off-in-suspend;
 641                                 };
 642                         };
 643                 };
 644         };
 645 };
 646
 647 &i2c1 {
 648         status = "okay";
 649         i2c-scl-rising-time-ns = <300>;
 650         i2c-scl-falling-time-ns = <15>;
 651
 652         rt5640: rt5640@1c {
 653                 #sound-dai-cells = <0>;
 654                 compatible = "realtek,rt5640";
 655                 reg = <0x1c>;
 656                 clocks = <&cru SCLK_I2S_8CH_OUT>;
 657                 clock-names = "mclk";
 658                 realtek,in1-differential;
 659                 pinctrl-names = "default";
 660                 pinctrl-0 = <&rt5640_hpcon>;
 661                 hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
 662                 //hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
 663                 io-channels = <&saradc 4>;
 664                 hp-det-adc-value = <500>;
 665         };
 666 };
 667
 668 &i2c3 {
 669         status = "okay";
 670         i2c-scl-rising-time-ns = <450>;
 671         i2c-scl-falling-time-ns = <15>;
 672 };
 673
 674 &i2c4 {
 675         status = "okay";
 676         i2c-scl-rising-time-ns = <600>;
 677         i2c-scl-falling-time-ns = <20>;
 678
 679         fusb0: fusb30x@22 {
 680                 compatible = "fairchild,fusb302";
 681                 reg = <0x22>;
 682                 pinctrl-names = "default";
 683                 pinctrl-0 = <&fusb0_int>;
 684                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 685                 vbus-5v-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
 686                 status = "okay";
 687         };
 688
 689         gsl3680: gsl3680@41 {
 690                 status = "disabled";
 691                 compatible = "gslX680-pad";
 692                 reg = <0x41>;
 693                 screen_max_x = <1536>;
 694                 screen_max_y = <2048>;
 695                 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
 696                 reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
 697         };
 698
 699         mpu6050: mpu@68 {
 700                 status = "disabled";
 701                 compatible = "invensense,mpu6050";
 702                 reg = <0x68>;
 703                 mpu-int_config = <0x10>;
 704                 mpu-level_shifter = <0>;
 705                 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
 706                 orientation-x= <1>;
 707                 orientation-y= <1>;
 708                 orientation-z= <1>;
 709                 irq-gpio = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>;
 710                 mpu-debug = <1>;
 711         };
 712 };
 713
 714 &i2s0 {
 715         status = "okay";
 716         rockchip,i2s-broken-burst-len;
 717         rockchip,playback-channels = <8>;
 718         rockchip,capture-channels = <8>;
 719         #sound-dai-cells = <0>;
 720 };
 721
 722 &i2s1 {
 723         status = "okay";
 724         rockchip,i2s-broken-burst-len;
 725         rockchip,playback-channels = <2>;
 726         rockchip,capture-channels = <2>;
 727         #sound-dai-cells = <0>;
 728 };
 729
 730 &i2s2 {
 731         #sound-dai-cells = <0>;
 732         status = "okay";
 733 };
 734
 735 &io_domains {
 736         status = "okay";
 737
 738         bt656-supply = <&vcc1v8_dvp>;           /* bt656_gpio2ab_ms */
 739         audio-supply = <&vcca1v8_codec>;        /* audio_gpio3d4a_ms */
 740         sdmmc-supply = <&vcc_sd>;               /* sdmmc_gpio4b_ms */
 741         gpio1830-supply = <&vcc_3v0>;           /* gpio1833_gpio4cd_ms */
 742 };
 743
 744 &pcie_phy {
 745         status = "okay";
 746 };
 747
 748 &pcie0 {
 749         ep-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
 750         num-lanes = <4>;
 751         pinctrl-names = "default";
 752         pinctrl-0 = <&pcie_clkreqn_cpm>;
 753         status = "okay";
 754 };
 755
 756 &pmu_io_domains {
 757         status = "okay";
 758         pmu1830-supply = <&vcc_3v0>;
 759 };
 760
 761 &pinctrl {
 762         buttons {
 763                 pwrbtn: pwrbtn {
 764                         rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
 765                 };
 766         };
 767
 768         lcd-panel {
 769                 lcd_panel_reset: lcd-panel-reset {
 770                         rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_up>;
 771                 };
 772
 773                 lcd_en: lcd-en {
 774                         rockchip,pins = <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
 775                 };
 776         };
 777
 778         pcie {
 779                 pcie_drv: pcie-drv {
 780                         rockchip,pins =
 781                                 <1 17 RK_FUNC_GPIO &pcfg_pull_none>;
 782                         };
 783                         pcie_3g_drv: pcie-3g-drv {
 784                         rockchip,pins =
 785                                 <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
 786                 };
 787         };
 788
 789         pmic {
 790                 vsel1_gpio: vsel1-gpio {
 791                         rockchip,pins =
 792                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
 793                 };
 794
 795                 vsel2_gpio: vsel2-gpio {
 796                         rockchip,pins =
 797                         <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
 798                 };
 799         };
 800
 801         sdio-pwrseq {
 802                 wifi_enable_h: wifi-enable-h {
 803                         rockchip,pins =
 804                                 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
 805                 };
 806         };
 807
 808         wireless-bluetooth {
 809                 uart0_gpios: uart0-gpios {
 810                         rockchip,pins =
 811                                 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
 812                 };
 813         };
 814
 815         rt5640 {
 816                 rt5640_hpcon: rt5640-hpcon {
 817                         rockchip,pins = <4 21 RK_FUNC_GPIO &pcfg_pull_none>;
 818                 };
 819         };
 820
 821         pmic {
 822                 pmic_int_l: pmic-int-l {
 823                         rockchip,pins =
 824                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 825                 };
 826
 827                 pmic_dvs2: pmic-dvs2 {
 828                         rockchip,pins =
 829                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
 830                 };
 831         };
 832
 833         usb2 {
 834                 host_vbus_drv: host-vbus-drv {
 835                         rockchip,pins =
 836                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
 837                 };
 838         };
 839
 840         fusb30x {
 841                 fusb0_int: fusb0-int {
 842                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
 843                 };
 844         };
 845 };
 846
 847 &pwm0 {
 848         status = "okay";
 849 };
 850
 851 &pwm2 {
 852         status = "okay";
 853 };
 854
 855 &rkvdec {
 856         status = "okay";
 857 };
 858
 859 &rockchip_suspend {
 860         rockchip,power-ctrl =
 861                 <&gpio1 18 GPIO_ACTIVE_LOW>,
 862                 <&gpio1 14 GPIO_ACTIVE_HIGH>;
 863 };
 864
 865 &route_edp {
 866         status = "disabled";
 867 };
 868
 869 &saradc {
 870         status = "okay";
 871         vref-supply = <&vccadc_ref>;
 872 };
 873
 874 &sdhci {
 875         bus-width = <8>;
 876         keep-power-in-suspend;
 877         mmc-hs400-1_8v;
 878         mmc-hs400-enhanced-strobe;
 879         non-removable;
 880         status = "okay";
 881         supports-emmc;
 882 };
 883
 884 &sdmmc {
 885         max-frequency = <150000000>;
 886         supports-sd;
 887         bus-width = <4>;
 888         cap-mmc-highspeed;
 889         cap-sd-highspeed;
 890         disable-wp;
 891         num-slots = <1>;
 892         vqmmc-supply = <&vcc_sd>;
 893         pinctrl-names = "default";
 894         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 895         status = "okay";
 896 };
 897
 898 &sdio0 {
 899         max-frequency = <50000000>;
 900         supports-sdio;
 901         bus-width = <4>;
 902         disable-wp;
 903         cap-sd-highspeed;
 904         keep-power-in-suspend;
 905         mmc-pwrseq = <&sdio_pwrseq>;
 906         non-removable;
 907         num-slots = <1>;
 908         pinctrl-names = "default";
 909         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 910         sd-uhs-sdr104;
 911         status = "okay";
 912 };
 913
 914 &spdif {
 915         status = "okay";
 916         pinctrl-0 = <&spdif_bus_1>;
 917         i2c-scl-rising-time-ns = <450>;
 918         i2c-scl-falling-time-ns = <15>;
 919         #sound-dai-cells = <0>;
 920 };
 921
 922 &tcphy0 {
 923         extcon = <&fusb0>;
 924         status = "okay";
 925 };
 926
 927 &tcphy1 {
 928         status = "okay";
 929 };
 930
 931 &tsadc {
 932         /* tshut mode 0:CRU 1:GPIO */
 933         rockchip,hw-tshut-mode = <1>;
 934         /* tshut polarity 0:LOW 1:HIGH */
 935         rockchip,hw-tshut-polarity = <1>;
 936         status = "okay";
 937 };
 938
 939 &u2phy0 {
 940         status = "okay";
 941         extcon = <&fusb0>;
 942
 943         u2phy0_otg: otg-port {
 944                 status = "okay";
 945         };
 946
 947         u2phy0_host: host-port {
 948                 phy-supply = <&vcc5v0_host>;
 949                 status = "okay";
 950         };
 951 };
 952
 953 &u2phy1 {
 954         status = "okay";
 955
 956         u2phy1_otg: otg-port {
 957                 status = "okay";
 958         };
 959
 960         u2phy1_host: host-port {
 961                 phy-supply = <&vcc5v0_host>;
 962                 status = "okay";
 963         };
 964 };
 965
 966 &uart0 {
 967         pinctrl-names = "default";
 968         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 969         status = "okay";
 970 };
 971
 972 &uart2 {
 973         status = "okay";
 974 };
 975
 976 &usbdrd3_0 {
 977         status = "okay";
 978         extcon = <&fusb0>;
 979 };
 980
 981 &usbdrd3_1 {
 982         status = "okay";
 983 };
 984
 985 &usbdrd_dwc3_0 {
 986         status = "okay";
 987 };
 988
 989 &usbdrd_dwc3_1 {
 990         status = "okay";
 991         dr_mode = "host";
 992 };
 993
 994 &usb_host0_ehci {
 995         status = "okay";
 996 };
 997
 998 &usb_host0_ohci {
 999         status = "okay";
1000 };
1001
1002 &usb_host1_ehci {
1003         status = "okay";
1004 };
1005
1006 &usb_host1_ohci {
1007         status = "okay";
1008 };
1009
1010 &vopb {
1011         status = "okay";
1012 };
1013
1014 &vopb_mmu {
1015         status = "okay";
1016 };
1017
1018 &vopl {
1019         status = "okay";
1020 };
1021
1022 &vopl_mmu {
1023         status = "okay";
1024 };
1025
1026 &vpu {
1027         status = "okay";
1028 };