d2c307394d98109c7b5c67317eaa89aedd00e2b9
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-firefly-linux.dts
1 /*
2  * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 /dts-v1/;
44
45 #include "dt-bindings/pwm/pwm.h"
46 #include "rk3399.dtsi"
47 #include "rk3399-opp.dtsi"
48 #include "rk3399-linux.dtsi"
49 #include <dt-bindings/input/input.h>
50
51 / {
52         model = "Rockchip RK3399 Firefly Board (Linux Opensource)";
53         compatible = "rockchip,rk3399-firefly-linux", "rockchip,rk3399";
54
55         backlight: backlight {
56                 status = "disabled";
57                 compatible = "pwm-backlight";
58                 pwms = <&pwm0 0 25000 0>;
59                 brightness-levels = <
60                           0   1   2   3   4   5   6   7
61                           8   9  10  11  12  13  14  15
62                          16  17  18  19  20  21  22  23
63                          24  25  26  27  28  29  30  31
64                          32  33  34  35  36  37  38  39
65                          40  41  42  43  44  45  46  47
66                          48  49  50  51  52  53  54  55
67                          56  57  58  59  60  61  62  63
68                          64  65  66  67  68  69  70  71
69                          72  73  74  75  76  77  78  79
70                          80  81  82  83  84  85  86  87
71                          88  89  90  91  92  93  94  95
72                          96  97  98  99 100 101 102 103
73                         104 105 106 107 108 109 110 111
74                         112 113 114 115 116 117 118 119
75                         120 121 122 123 124 125 126 127
76                         128 129 130 131 132 133 134 135
77                         136 137 138 139 140 141 142 143
78                         144 145 146 147 148 149 150 151
79                         152 153 154 155 156 157 158 159
80                         160 161 162 163 164 165 166 167
81                         168 169 170 171 172 173 174 175
82                         176 177 178 179 180 181 182 183
83                         184 185 186 187 188 189 190 191
84                         192 193 194 195 196 197 198 199
85                         200 201 202 203 204 205 206 207
86                         208 209 210 211 212 213 214 215
87                         216 217 218 219 220 221 222 223
88                         224 225 226 227 228 229 230 231
89                         232 233 234 235 236 237 238 239
90                         240 241 242 243 244 245 246 247
91                         248 249 250 251 252 253 254 255>;
92                 default-brightness-level = <200>;
93         };
94
95         clkin_gmac: external-gmac-clock {
96                 compatible = "fixed-clock";
97                 clock-frequency = <125000000>;
98                 clock-output-names = "clkin_gmac";
99                 #clock-cells = <0>;
100         };
101
102         dw_hdmi_audio: dw-hdmi-audio {
103                 status = "disabled";
104                 compatible = "rockchip,dw-hdmi-audio";
105                 #sound-dai-cells = <0>;
106         };
107
108         edp_panel: edp-panel {
109                 status = "disabled";
110                 compatible = "sharp,lcd-f402", "panel-simple";
111                 backlight = <&backlight>;
112                 power-supply = <&vcc_lcd>;
113                 enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
114                 pinctrl-names = "default";
115                 pinctrl-0 = <&lcd_panel_reset>;
116
117                 ports {
118                         panel_in_edp: endpoint {
119                                 remote-endpoint = <&edp_out_panel>;
120                         };
121                 };
122         };
123
124         fiq_debugger: fiq-debugger {
125                 compatible = "rockchip,fiq-debugger";
126                 rockchip,serial-id = <2>;
127                 rockchip,signal-irq = <182>;
128                 rockchip,wake-irq = <0>;
129                 rockchip,irq-mode-enable = <1>;  /* If enable uart uses irq instead of fiq */
130                 rockchip,baudrate = <1500000>;  /* Only 115200 and 1500000 */
131                 pinctrl-names = "default";
132                 pinctrl-0 = <&uart2c_xfer>;
133         };
134
135         gpio-keys {
136                 compatible = "gpio-keys";
137                 #address-cells = <1>;
138                 #size-cells = <0>;
139                 autorepeat;
140
141                 pinctrl-names = "default";
142                 pinctrl-0 = <&pwrbtn>;
143
144                 button@0 {
145                         gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
146                         linux,code = <KEY_POWER>;
147                         label = "GPIO Key Power";
148                         linux,input-type = <1>;
149                         gpio-key,wakeup = <1>;
150                         debounce-interval = <100>;
151                 };
152         };
153
154         rt5640-sound {
155                 compatible = "simple-audio-card";
156                 simple-audio-card,format = "i2s";
157                 simple-audio-card,name = "rockchip,rt5640-codec";
158                 simple-audio-card,mclk-fs = <256>;
159                 simple-audio-card,widgets =
160                         "Microphone", "Mic Jack",
161                         "Headphone", "Headphone Jack";
162                 simple-audio-card,routing =
163                         "Mic Jack", "MICBIAS1",
164                         "IN1P", "Mic Jack",
165                         "Headphone Jack", "HPOL",
166                         "Headphone Jack", "HPOR";
167                 simple-audio-card,cpu {
168                         sound-dai = <&i2s1>;
169                 };
170                 simple-audio-card,codec {
171                         sound-dai = <&rt5640>;
172                 };
173         };
174
175         hdmi_sound: hdmi-sound {
176                 status = "disabled";
177                 compatible = "simple-audio-card";
178                 simple-audio-card,format = "i2s";
179                 simple-audio-card,mclk-fs = <256>;
180                 simple-audio-card,name = "rockchip,hdmi";
181
182                 simple-audio-card,cpu {
183                         sound-dai = <&i2s2>;
184                 };
185                 simple-audio-card,codec {
186                         sound-dai = <&dw_hdmi_audio>;
187                 };
188         };
189
190         hdmi_codec: hdmi-codec {
191                 compatible = "simple-audio-card";
192                 simple-audio-card,format = "i2s";
193                 simple-audio-card,mclk-fs = <256>;
194                 simple-audio-card,name = "HDMI-CODEC";
195
196                 simple-audio-card,cpu {
197                         sound-dai = <&i2s2>;
198                 };
199
200                 simple-audio-card,codec {
201                         sound-dai = <&hdmi>;
202                 };
203         };
204
205         spdif-sound {
206                 status = "okay";
207                 compatible = "simple-audio-card";
208                 simple-audio-card,name = "ROCKCHIP,SPDIF";
209                 simple-audio-card,cpu {
210                         sound-dai = <&spdif>;
211                 };
212                 simple-audio-card,codec {
213                         sound-dai = <&spdif_out>;
214                 };
215         };
216
217         spdif_out: spdif-out {
218                 status = "okay";
219                 compatible = "linux,spdif-dit";
220                 #sound-dai-cells = <0>;
221         };
222
223         sdio_pwrseq: sdio-pwrseq {
224                 compatible = "mmc-pwrseq-simple";
225                 clocks = <&rk808 1>;
226                 clock-names = "ext_clock";
227                 pinctrl-names = "default";
228                 pinctrl-0 = <&wifi_enable_h>;
229
230                 /*
231                  * On the module itself this is one of these (depending
232                  * on the actual card populated):
233                  * - SDIO_RESET_L_WL_REG_ON
234                  * - PDN (power down when low)
235                  */
236                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
237         };
238
239         vcc3v3_pcie: vcc3v3-pcie-regulator {
240                 compatible = "regulator-fixed";
241                 enable-active-high;
242                 regulator-always-on;
243                 regulator-boot-on;
244                 gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
245                 pinctrl-names = "default";
246                 pinctrl-0 = <&pcie_drv>;
247                 regulator-name = "vcc3v3_pcie";
248         };
249
250         vcc3v3_3g: vcc3v3-3g-regulator {
251                 compatible = "regulator-fixed";
252                 enable-active-high;
253                 regulator-always-on;
254                 regulator-boot-on;
255                 gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
256                 pinctrl-names = "default";
257                 pinctrl-0 = <&pcie_3g_drv>;
258                 regulator-name = "vcc3v3_3g";
259     };
260
261         vcc3v3_sys: vcc3v3-sys {
262                 compatible = "regulator-fixed";
263                 regulator-name = "vcc3v3_sys";
264                 regulator-always-on;
265                 regulator-boot-on;
266                 regulator-min-microvolt = <3300000>;
267                 regulator-max-microvolt = <3300000>;
268         };
269
270         vcc5v0_host: vcc5v0-host-regulator {
271                 compatible = "regulator-fixed";
272                 enable-active-high;
273                 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
274                 pinctrl-names = "default";
275                 pinctrl-0 = <&host_vbus_drv>;
276                 regulator-name = "vcc5v0_host";
277                 regulator-always-on;
278         };
279
280         vcc5v0_sys: vcc5v0-sys {
281                 compatible = "regulator-fixed";
282                 regulator-name = "vcc5v0_sys";
283                 regulator-always-on;
284                 regulator-boot-on;
285                 regulator-min-microvolt = <5000000>;
286                 regulator-max-microvolt = <5000000>;
287         };
288
289         vcc_phy: vcc-phy-regulator {
290                 compatible = "regulator-fixed";
291                 regulator-name = "vcc_phy";
292                 regulator-always-on;
293                 regulator-boot-on;
294         };
295
296         vdd_log: vdd-log {
297                 compatible = "pwm-regulator";
298                 pwms = <&pwm2 0 25000 1>;
299                 regulator-name = "vdd_log";
300                 regulator-min-microvolt = <800000>;
301                 regulator-max-microvolt = <1400000>;
302                 regulator-always-on;
303                 regulator-boot-on;
304
305                 /* for rockchip boot on */
306                 rockchip,pwm_id= <2>;
307                 rockchip,pwm_voltage = <1000000>;
308         };
309
310         vccadc_ref: vccadc-ref {
311                 compatible = "regulator-fixed";
312                 regulator-name = "vcc1v8_sys";
313                 regulator-always-on;
314                 regulator-boot-on;
315                 regulator-min-microvolt = <1800000>;
316                 regulator-max-microvolt = <1800000>;
317         };
318
319         vcc_lcd: vcc-lcd-regulator {
320                 compatible = "regulator-fixed";
321                 regulator-always-on;
322                 regulator-boot-on;
323                 enable-active-high;
324                 gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
325                 pinctrl-names = "default";
326                 pinctrl-0 = <&lcd_en>;
327                 regulator-name = "vcc_lcd";
328         };
329
330         wireless-wlan {
331                 compatible = "wlan-platdata";
332                 rockchip,grf = <&grf>;
333                 wifi_chip_type = "ap6354";
334                 sdio_vref = <1800>;
335                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
336                 status = "okay";
337         };
338
339         wireless-bluetooth {
340                 compatible = "bluetooth-platdata";
341                 //wifi-bt-power-toggle;
342                 clocks = <&rk808 1>;
343                 clock-names = "ext_clock";
344                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
345                 pinctrl-names = "default", "rts_gpio";
346                 pinctrl-0 = <&uart0_rts>;
347                 pinctrl-1 = <&uart0_gpios>;
348                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
349                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
350                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
351                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
352                 status = "okay";
353         };
354
355     leds {
356        compatible = "gpio-leds";
357        power {
358            label = "firefly:blue:power";
359            linux,default-trigger = "ir-power-click";
360            default-state = "on";
361            gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
362            pinctrl-names = "default";
363            pinctrl-0 = <&led_power>;
364        };
365        user {
366            label = "firefly:yellow:user";
367            linux,default-trigger = "ir-user-click";
368            default-state = "off";
369            gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
370            pinctrl-names = "default";
371            pinctrl-0 = <&led_user>;
372        };
373    };
374 };
375
376 &cpu_l0 {
377         cpu-supply = <&vdd_cpu_l>;
378 };
379
380 &cpu_l1 {
381         cpu-supply = <&vdd_cpu_l>;
382 };
383
384 &cpu_l2 {
385         cpu-supply = <&vdd_cpu_l>;
386 };
387
388 &cpu_l3 {
389         cpu-supply = <&vdd_cpu_l>;
390 };
391
392 &cpu_b0 {
393         cpu-supply = <&vdd_cpu_b>;
394 };
395
396 &cpu_b1 {
397         cpu-supply = <&vdd_cpu_b>;
398 };
399
400 &display_subsystem {
401         status = "okay";
402 };
403
404 &edp {
405         status = "disabled";
406
407         ports {
408                 edp_out: port@1 {
409                         reg = <1>;
410                         #address-cells = <1>;
411                         #size-cells = <0>;
412
413                         edp_out_panel: endpoint@0 {
414                                 reg = <0>;
415                                 remote-endpoint = <&panel_in_edp>;
416                         };
417                 };
418         };
419 };
420
421 &emmc_phy {
422         status = "okay";
423 };
424
425 &gmac {
426         phy-supply = <&vcc_phy>;
427         phy-mode = "rgmii";
428         clock_in_out = "input";
429         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
430         snps,reset-active-low;
431         snps,reset-delays-us = <0 10000 50000>;
432         assigned-clocks = <&cru SCLK_RMII_SRC>;
433         assigned-clock-parents = <&clkin_gmac>;
434         pinctrl-names = "default";
435         pinctrl-0 = <&rgmii_pins>;
436         tx_delay = <0x28>;
437         rx_delay = <0x1B>;
438         status = "okay";
439 };
440
441 &gpu {
442         status = "okay";
443         mali-supply = <&vdd_gpu>;
444 };
445
446 &hdmi {
447         #address-cells = <1>;
448         #size-cells = <0>;
449         #sound-dai-cells = <0>;
450         status = "okay";
451 };
452
453 &i2c0 {
454         status = "okay";
455         i2c-scl-rising-time-ns = <168>;
456         i2c-scl-falling-time-ns = <4>;
457         clock-frequency = <400000>;
458
459         vdd_cpu_b: syr827@40 {
460                 compatible = "silergy,syr827";
461                 reg = <0x40>;
462                 vin-supply = <&vcc5v0_sys>;
463                 regulator-compatible = "fan53555-reg";
464                 regulator-name = "vdd_cpu_b";
465                 regulator-min-microvolt = <712500>;
466                 regulator-max-microvolt = <1500000>;
467                 regulator-ramp-delay = <1000>;
468                 vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
469                 fcs,suspend-voltage-selector = <1>;
470                 regulator-always-on;
471                 regulator-boot-on;
472                 regulator-initial-state = <3>;
473                         regulator-state-mem {
474                         regulator-off-in-suspend;
475                 };
476         };
477
478         vdd_gpu: syr828@41 {
479                 compatible = "silergy,syr828";
480                 reg = <0x41>;
481                 vin-supply = <&vcc5v0_sys>;
482                 regulator-compatible = "fan53555-reg";
483                 regulator-name = "vdd_gpu";
484                 regulator-min-microvolt = <712500>;
485                 regulator-max-microvolt = <1500000>;
486                 regulator-ramp-delay = <1000>;
487                 fcs,suspend-voltage-selector = <1>;
488                 regulator-always-on;
489                 regulator-boot-on;
490                 regulator-initial-state = <3>;
491                         regulator-state-mem {
492                         regulator-off-in-suspend;
493                 };
494         };
495
496         rk808: pmic@1b {
497                 compatible = "rockchip,rk808";
498                 reg = <0x1b>;
499                 interrupt-parent = <&gpio1>;
500                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
501                 pinctrl-names = "default";
502                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
503                 rockchip,system-power-controller;
504                 wakeup-source;
505                 #clock-cells = <1>;
506                 clock-output-names = "xin32k", "rk808-clkout2";
507
508                 vcc1-supply = <&vcc3v3_sys>;
509                 vcc2-supply = <&vcc3v3_sys>;
510                 vcc3-supply = <&vcc3v3_sys>;
511                 vcc4-supply = <&vcc3v3_sys>;
512                 vcc6-supply = <&vcc3v3_sys>;
513                 vcc7-supply = <&vcc3v3_sys>;
514                 vcc8-supply = <&vcc3v3_sys>;
515                 vcc9-supply = <&vcc3v3_sys>;
516                 vcc10-supply = <&vcc3v3_sys>;
517                 vcc11-supply = <&vcc3v3_sys>;
518                 vcc12-supply = <&vcc3v3_sys>;
519                 vddio-supply = <&vcc1v8_pmu>;
520
521                 regulators {
522                         vdd_center: DCDC_REG1 {
523                                 regulator-always-on;
524                                 regulator-boot-on;
525                                 regulator-min-microvolt = <750000>;
526                                 regulator-max-microvolt = <1350000>;
527                                 regulator-ramp-delay = <6001>;
528                                 regulator-name = "vdd_center";
529                                 regulator-state-mem {
530                                         regulator-off-in-suspend;
531                                 };
532                         };
533
534                         vdd_cpu_l: DCDC_REG2 {
535                                 regulator-always-on;
536                                 regulator-boot-on;
537                                 regulator-min-microvolt = <750000>;
538                                 regulator-max-microvolt = <1350000>;
539                                 regulator-ramp-delay = <6001>;
540                                 regulator-name = "vdd_cpu_l";
541                                 regulator-state-mem {
542                                         regulator-off-in-suspend;
543                                 };
544                         };
545
546                         vcc_ddr: DCDC_REG3 {
547                                 regulator-always-on;
548                                 regulator-boot-on;
549                                 regulator-name = "vcc_ddr";
550                                 regulator-state-mem {
551                                         regulator-on-in-suspend;
552                                 };
553                         };
554
555                         vcc_1v8: DCDC_REG4 {
556                                 regulator-always-on;
557                                 regulator-boot-on;
558                                 regulator-min-microvolt = <1800000>;
559                                 regulator-max-microvolt = <1800000>;
560                                 regulator-name = "vcc_1v8";
561                                 regulator-state-mem {
562                                         regulator-on-in-suspend;
563                                         regulator-suspend-microvolt = <1800000>;
564                                 };
565                         };
566
567                         vcc1v8_dvp: LDO_REG1 {
568                                 regulator-always-on;
569                                 regulator-boot-on;
570                                 regulator-min-microvolt = <1800000>;
571                                 regulator-max-microvolt = <1800000>;
572                                 regulator-name = "vcc1v8_dvp";
573                                 regulator-state-mem {
574                                         regulator-off-in-suspend;
575                                 };
576                         };
577
578                         vcc3v0_tp: LDO_REG2 {
579                                 regulator-always-on;
580                                 regulator-boot-on;
581                                 regulator-min-microvolt = <3000000>;
582                                 regulator-max-microvolt = <3000000>;
583                                 regulator-name = "vcc3v0_tp";
584                                 regulator-state-mem {
585                                         regulator-off-in-suspend;
586                                 };
587                         };
588
589                         vcc1v8_pmu: LDO_REG3 {
590                                 regulator-always-on;
591                                 regulator-boot-on;
592                                 regulator-min-microvolt = <1800000>;
593                                 regulator-max-microvolt = <1800000>;
594                                 regulator-name = "vcc1v8_pmu";
595                                 regulator-state-mem {
596                                         regulator-on-in-suspend;
597                                         regulator-suspend-microvolt = <1800000>;
598                                 };
599                         };
600
601                         vcc_sd: LDO_REG4 {
602                                 regulator-always-on;
603                                 regulator-boot-on;
604                                 regulator-min-microvolt = <1800000>;
605                                 regulator-max-microvolt = <3300000>;
606                                 regulator-name = "vcc_sd";
607                                 regulator-state-mem {
608                                         regulator-on-in-suspend;
609                                         regulator-suspend-microvolt = <3300000>;
610                                 };
611                         };
612
613                         vcca3v0_codec: LDO_REG5 {
614                                 regulator-always-on;
615                                 regulator-boot-on;
616                                 regulator-min-microvolt = <3000000>;
617                                 regulator-max-microvolt = <3000000>;
618                                 regulator-name = "vcca3v0_codec";
619                                 regulator-state-mem {
620                                         regulator-off-in-suspend;
621                                 };
622                         };
623
624                         vcc_1v5: LDO_REG6 {
625                                 regulator-always-on;
626                                 regulator-boot-on;
627                                 regulator-min-microvolt = <1500000>;
628                                 regulator-max-microvolt = <1500000>;
629                                 regulator-name = "vcc_1v5";
630                                 regulator-state-mem {
631                                         regulator-on-in-suspend;
632                                         regulator-suspend-microvolt = <1500000>;
633                                 };
634                         };
635
636                         vcca1v8_codec: LDO_REG7 {
637                                 regulator-always-on;
638                                 regulator-boot-on;
639                                 regulator-min-microvolt = <1800000>;
640                                 regulator-max-microvolt = <1800000>;
641                                 regulator-name = "vcca1v8_codec";
642                                 regulator-state-mem {
643                                         regulator-off-in-suspend;
644                                 };
645                         };
646
647                         vcc_3v0: LDO_REG8 {
648                                 regulator-always-on;
649                                 regulator-boot-on;
650                                 regulator-min-microvolt = <3000000>;
651                                 regulator-max-microvolt = <3000000>;
652                                 regulator-name = "vcc_3v0";
653                                 regulator-state-mem {
654                                         regulator-on-in-suspend;
655                                         regulator-suspend-microvolt = <3000000>;
656                                 };
657                         };
658
659                         vcc3v3_s3: SWITCH_REG1 {
660                                 regulator-always-on;
661                                 regulator-boot-on;
662                                 regulator-name = "vcc3v3_s3";
663                                 regulator-state-mem {
664                                         regulator-off-in-suspend;
665                                 };
666                         };
667
668                         vcc3v3_s0: SWITCH_REG2 {
669                                 regulator-always-on;
670                                 regulator-boot-on;
671                                 regulator-name = "vcc3v3_s0";
672                                 regulator-state-mem {
673                                         regulator-off-in-suspend;
674                                 };
675                         };
676                 };
677         };
678 };
679
680 &i2c1 {
681         status = "okay";
682         i2c-scl-rising-time-ns = <300>;
683         i2c-scl-falling-time-ns = <15>;
684
685         rt5640: rt5640@1c {
686                 #sound-dai-cells = <0>;
687                 compatible = "realtek,rt5640";
688                 reg = <0x1c>;
689                 clocks = <&cru SCLK_I2S_8CH_OUT>;
690                 clock-names = "mclk";
691                 realtek,in1-differential;
692                 pinctrl-names = "default";
693                 pinctrl-0 = <&rt5640_hpcon>;
694                 hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
695                 //hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
696                 io-channels = <&saradc 4>;
697                 hp-det-adc-value = <500>;
698         };
699 };
700
701 &i2c3 {
702         status = "okay";
703         i2c-scl-rising-time-ns = <450>;
704         i2c-scl-falling-time-ns = <15>;
705 };
706
707 &i2c4 {
708         status = "okay";
709         i2c-scl-rising-time-ns = <475>;
710         i2c-scl-falling-time-ns = <26>;
711
712         fusb0: fusb30x@22 {
713                 compatible = "fairchild,fusb302";
714                 reg = <0x22>;
715                 pinctrl-names = "default";
716                 pinctrl-0 = <&fusb0_int>;
717                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
718                 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
719                 status = "okay";
720         };
721
722     gsl3680: gsl3680@41 {
723                         status = "disabled";
724                         compatible = "gslX680-pad";
725                         reg = <0x41>;
726                         screen_max_x = <1536>;
727                         screen_max_y = <2048>;
728                         touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
729                         reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
730       };
731
732         mpu6050:mpu@68{
733                         status = "disabled";
734             compatible = "invensense,mpu6050";
735             reg = <0x68>;
736             mpu-int_config = <0x10>;
737             mpu-level_shifter = <0>;
738             mpu-orientation = <0 1 0 1 0 0 0 0 1>;
739             orientation-x= <1>;
740             orientation-y= <1>;
741             orientation-z= <1>;
742             irq-gpio = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>;
743             mpu-debug = <1>;
744         };
745 };
746
747 &i2s0 {
748         status = "okay";
749         rockchip,i2s-broken-burst-len;
750         rockchip,playback-channels = <8>;
751         rockchip,capture-channels = <8>;
752         #sound-dai-cells = <0>;
753 };
754
755 &i2s1 {
756         status = "okay";
757         rockchip,i2s-broken-burst-len;
758         rockchip,playback-channels = <2>;
759         rockchip,capture-channels = <2>;
760         #sound-dai-cells = <0>;
761 };
762
763 &i2s2 {
764         #sound-dai-cells = <0>;
765         status = "okay";
766 };
767
768 &io_domains {
769         status = "okay";
770
771         bt656-supply = <&vcc1v8_dvp>;           /* bt656_gpio2ab_ms */
772         audio-supply = <&vcca1v8_codec>;        /* audio_gpio3d4a_ms */
773         sdmmc-supply = <&vcc_sd>;               /* sdmmc_gpio4b_ms */
774         gpio1830-supply = <&vcc_3v0>;           /* gpio1833_gpio4cd_ms */
775 };
776
777 &pcie_phy {
778         status = "okay";
779 };
780
781 &pcie0 {
782         ep-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
783         num-lanes = <4>;
784         pinctrl-names = "default";
785         pinctrl-0 = <&pcie_clkreqn_cpm>;
786         status = "okay";
787 };
788
789 &pmu_io_domains {
790         status = "okay";
791         pmu1830-supply = <&vcc_3v0>;
792 };
793
794 &pinctrl {
795         buttons {
796                 pwrbtn: pwrbtn {
797                         rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
798                 };
799         };
800
801         lcd-panel {
802                 lcd_panel_reset: lcd-panel-reset {
803                         rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_up>;
804                 };
805
806                 lcd_en: lcd-en {
807                         rockchip,pins = <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
808                 };
809         };
810
811         pcie {
812                 pcie_drv: pcie-drv {
813                         rockchip,pins =
814                                 <1 17 RK_FUNC_GPIO &pcfg_pull_none>;
815                 };
816                 pcie_3g_drv: pcie-3g-drv {
817                 rockchip,pins =
818                                 <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
819                 };
820
821         };
822
823         pmic {
824                 vsel1_gpio: vsel1-gpio {
825                         rockchip,pins =
826                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
827                 };
828
829                 vsel2_gpio: vsel2-gpio {
830                         rockchip,pins =
831                         <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
832                 };
833         };
834
835         sdio-pwrseq {
836                 wifi_enable_h: wifi-enable-h {
837                         rockchip,pins =
838                                 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
839                 };
840         };
841
842         wireless-bluetooth {
843                 uart0_gpios: uart0-gpios {
844                         rockchip,pins =
845                                 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
846                 };
847         };
848
849         leds {
850                 led_power: led-power {
851                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
852                 };
853
854                 led_user: led-user {
855                         rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_none>;
856                 };
857         };
858
859         rt5640 {
860                 rt5640_hpcon: rt5640-hpcon {
861                         rockchip,pins = <4 21 RK_FUNC_GPIO &pcfg_pull_none>;
862                 };
863         };
864
865         pmic {
866                 pmic_int_l: pmic-int-l {
867                         rockchip,pins =
868                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
869                 };
870
871                 pmic_dvs2: pmic-dvs2 {
872                         rockchip,pins =
873                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
874                 };
875         };
876
877         usb2 {
878                 host_vbus_drv: host-vbus-drv {
879                         rockchip,pins =
880                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
881                 };
882         };
883
884         fusb30x {
885                 fusb0_int: fusb0-int {
886                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
887                 };
888         };
889 };
890
891 &pwm0 {
892         status = "okay";
893 };
894
895 &pwm2 {
896         status = "okay";
897 };
898
899 &rkvdec {
900         status = "okay";
901 };
902
903 &rockchip_suspend {
904         rockchip,power-ctrl =
905                 <&gpio1 18 GPIO_ACTIVE_LOW>,
906                 <&gpio1 14 GPIO_ACTIVE_HIGH>;
907 };
908
909 &route_edp {
910         status = "disabled";
911 };
912
913 &route_hdmi {
914         status = "okay";
915         logo,mode = "center";
916 };
917
918 &cdn_dp {
919         status = "okay";
920         extcon = <&fusb0>;
921         phys = <&tcphy0_dp>;
922 };
923
924 &dp_in_vopb {
925         status = "disabled";
926 };
927
928 &saradc {
929         status = "okay";
930         vref-supply = <&vccadc_ref>;
931 };
932
933 &sdhci {
934         bus-width = <8>;
935         keep-power-in-suspend;
936         mmc-hs400-1_8v;
937         mmc-hs400-enhanced-strobe;
938         non-removable;
939         status = "okay";
940         supports-emmc;
941 };
942
943 &sdmmc {
944         max-frequency = <150000000>;
945         supports-sd;
946         bus-width = <4>;
947         cap-mmc-highspeed;
948         cap-sd-highspeed;
949         disable-wp;
950         num-slots = <1>;
951         vqmmc-supply = <&vcc_sd>;
952         pinctrl-names = "default";
953         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
954         status = "okay";
955 };
956
957 &sdio0 {
958         max-frequency = <50000000>;
959         supports-sdio;
960         bus-width = <4>;
961         disable-wp;
962         cap-sd-highspeed;
963         keep-power-in-suspend;
964         mmc-pwrseq = <&sdio_pwrseq>;
965         non-removable;
966         num-slots = <1>;
967         pinctrl-names = "default";
968         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
969         sd-uhs-sdr104;
970         status = "okay";
971 };
972
973 &spdif {
974         status = "okay";
975         pinctrl-0 = <&spdif_bus_1>;
976         i2c-scl-rising-time-ns = <450>;
977         i2c-scl-falling-time-ns = <15>;
978         #sound-dai-cells = <0>;
979 };
980
981 &tcphy0 {
982         extcon = <&fusb0>;
983         status = "okay";
984 };
985
986 &tcphy1 {
987         status = "okay";
988 };
989
990 &tsadc {
991         /* tshut mode 0:CRU 1:GPIO */
992         rockchip,hw-tshut-mode = <1>;
993         /* tshut polarity 0:LOW 1:HIGH */
994         rockchip,hw-tshut-polarity = <1>;
995         status = "okay";
996 };
997
998 &u2phy0 {
999         status = "okay";
1000         extcon = <&fusb0>;
1001
1002         u2phy0_otg: otg-port {
1003                 status = "okay";
1004         };
1005
1006         u2phy0_host: host-port {
1007                 phy-supply = <&vcc5v0_host>;
1008                 status = "okay";
1009         };
1010 };
1011
1012 &u2phy1 {
1013         status = "okay";
1014
1015         u2phy1_otg: otg-port {
1016                 status = "okay";
1017         };
1018
1019         u2phy1_host: host-port {
1020                 phy-supply = <&vcc5v0_host>;
1021                 status = "okay";
1022         };
1023 };
1024
1025 &pwm3 {
1026         status = "okay";
1027         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
1028         compatible = "rockchip,remotectl-pwm";
1029         remote_pwm_id = <3>;
1030         handle_cpu_id = <0>;
1031
1032     ir_key1{
1033         rockchip,usercode = <0xff00>;
1034         rockchip,key_table =
1035             <0xeb   KEY_POWER>,
1036             <0xec   KEY_COMPOSE>,
1037             <0xfe   KEY_BACK>,
1038             <0xb7   KEY_HOME>,
1039             <0xa3   KEY_WWW>,
1040             <0xf4   KEY_VOLUMEUP>,
1041             <0xa7   KEY_VOLUMEDOWN>,
1042             <0xf8   KEY_ENTER>,
1043             <0xfc   KEY_UP>,
1044             <0xfd   KEY_DOWN>,
1045             <0xf1   KEY_LEFT>,
1046             <0xe5   KEY_RIGHT>;
1047     };
1048 };
1049
1050 &uart0 {
1051         pinctrl-names = "default";
1052         pinctrl-0 = <&uart0_xfer &uart0_cts>;
1053         status = "okay";
1054 };
1055
1056 &uart2 {
1057         status = "okay";
1058 };
1059
1060 &uart4 {
1061         current-speed = <9600>;
1062         no-loopback-test;
1063         status = "okay";
1064 };
1065
1066 &usbdrd3_0 {
1067         status = "okay";
1068         extcon = <&fusb0>;
1069 };
1070
1071 &usbdrd3_1 {
1072         status = "okay";
1073 };
1074
1075 &usbdrd_dwc3_0 {
1076         status = "okay";
1077 };
1078
1079 &usbdrd_dwc3_1 {
1080         status = "okay";
1081         dr_mode = "host";
1082 };
1083
1084 &usb_host0_ehci {
1085         status = "okay";
1086 };
1087
1088 &usb_host0_ohci {
1089         status = "okay";
1090 };
1091
1092 &usb_host1_ehci {
1093         status = "okay";
1094 };
1095
1096 &usb_host1_ohci {
1097         status = "okay";
1098 };
1099
1100 &vopb {
1101         status = "okay";
1102 };
1103
1104 &vopb_mmu {
1105         status = "okay";
1106 };
1107
1108 &vopl {
1109         status = "okay";
1110 };
1111
1112 &vopl_mmu {
1113         status = "okay";
1114 };
1115
1116 &vpu {
1117         status = "okay";
1118         /* 0 means ion, 1 means drm */
1119         //allocator = <0>;
1120 };