2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include "dt-bindings/pwm/pwm.h"
46 #include "rk3399.dtsi"
47 #include "rk3399-opp.dtsi"
48 #include "rk3399-linux.dtsi"
49 #include <dt-bindings/input/input.h>
52 model = "Rockchip RK3399 Firefly Board (Linux Opensource)";
53 compatible = "rockchip,rk3399-firefly-linux", "rockchip,rk3399";
55 backlight: backlight {
57 compatible = "pwm-backlight";
58 pwms = <&pwm0 0 25000 0>;
62 16 17 18 19 20 21 22 23
63 24 25 26 27 28 29 30 31
64 32 33 34 35 36 37 38 39
65 40 41 42 43 44 45 46 47
66 48 49 50 51 52 53 54 55
67 56 57 58 59 60 61 62 63
68 64 65 66 67 68 69 70 71
69 72 73 74 75 76 77 78 79
70 80 81 82 83 84 85 86 87
71 88 89 90 91 92 93 94 95
72 96 97 98 99 100 101 102 103
73 104 105 106 107 108 109 110 111
74 112 113 114 115 116 117 118 119
75 120 121 122 123 124 125 126 127
76 128 129 130 131 132 133 134 135
77 136 137 138 139 140 141 142 143
78 144 145 146 147 148 149 150 151
79 152 153 154 155 156 157 158 159
80 160 161 162 163 164 165 166 167
81 168 169 170 171 172 173 174 175
82 176 177 178 179 180 181 182 183
83 184 185 186 187 188 189 190 191
84 192 193 194 195 196 197 198 199
85 200 201 202 203 204 205 206 207
86 208 209 210 211 212 213 214 215
87 216 217 218 219 220 221 222 223
88 224 225 226 227 228 229 230 231
89 232 233 234 235 236 237 238 239
90 240 241 242 243 244 245 246 247
91 248 249 250 251 252 253 254 255>;
92 default-brightness-level = <200>;
95 clkin_gmac: external-gmac-clock {
96 compatible = "fixed-clock";
97 clock-frequency = <125000000>;
98 clock-output-names = "clkin_gmac";
102 dw_hdmi_audio: dw-hdmi-audio {
104 compatible = "rockchip,dw-hdmi-audio";
105 #sound-dai-cells = <0>;
108 edp_panel: edp-panel {
110 compatible = "sharp,lcd-f402", "panel-simple";
111 backlight = <&backlight>;
112 power-supply = <&vcc_lcd>;
113 enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
114 pinctrl-names = "default";
115 pinctrl-0 = <&lcd_panel_reset>;
118 panel_in_edp: endpoint {
119 remote-endpoint = <&edp_out_panel>;
124 fiq_debugger: fiq-debugger {
125 compatible = "rockchip,fiq-debugger";
126 rockchip,serial-id = <2>;
127 rockchip,signal-irq = <182>;
128 rockchip,wake-irq = <0>;
129 rockchip,irq-mode-enable = <1>; /* If enable uart uses irq instead of fiq */
130 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
131 pinctrl-names = "default";
132 pinctrl-0 = <&uart2c_xfer>;
136 compatible = "gpio-keys";
137 #address-cells = <1>;
141 pinctrl-names = "default";
142 pinctrl-0 = <&pwrbtn>;
145 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
146 linux,code = <KEY_POWER>;
147 label = "GPIO Key Power";
148 linux,input-type = <1>;
149 gpio-key,wakeup = <1>;
150 debounce-interval = <100>;
155 compatible = "simple-audio-card";
156 simple-audio-card,format = "i2s";
157 simple-audio-card,name = "rockchip,rt5640-codec";
158 simple-audio-card,mclk-fs = <256>;
159 simple-audio-card,widgets =
160 "Microphone", "Mic Jack",
161 "Headphone", "Headphone Jack";
162 simple-audio-card,routing =
163 "Mic Jack", "MICBIAS1",
165 "Headphone Jack", "HPOL",
166 "Headphone Jack", "HPOR";
167 simple-audio-card,cpu {
170 simple-audio-card,codec {
171 sound-dai = <&rt5640>;
175 hdmi_sound: hdmi-sound {
177 compatible = "simple-audio-card";
178 simple-audio-card,format = "i2s";
179 simple-audio-card,mclk-fs = <256>;
180 simple-audio-card,name = "rockchip,hdmi";
182 simple-audio-card,cpu {
185 simple-audio-card,codec {
186 sound-dai = <&dw_hdmi_audio>;
190 hdmi_codec: hdmi-codec {
191 compatible = "simple-audio-card";
192 simple-audio-card,format = "i2s";
193 simple-audio-card,mclk-fs = <256>;
194 simple-audio-card,name = "HDMI-CODEC";
196 simple-audio-card,cpu {
200 simple-audio-card,codec {
207 compatible = "simple-audio-card";
208 simple-audio-card,name = "ROCKCHIP,SPDIF";
209 simple-audio-card,cpu {
210 sound-dai = <&spdif>;
212 simple-audio-card,codec {
213 sound-dai = <&spdif_out>;
217 spdif_out: spdif-out {
219 compatible = "linux,spdif-dit";
220 #sound-dai-cells = <0>;
223 sdio_pwrseq: sdio-pwrseq {
224 compatible = "mmc-pwrseq-simple";
226 clock-names = "ext_clock";
227 pinctrl-names = "default";
228 pinctrl-0 = <&wifi_enable_h>;
231 * On the module itself this is one of these (depending
232 * on the actual card populated):
233 * - SDIO_RESET_L_WL_REG_ON
234 * - PDN (power down when low)
236 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
239 vcc3v3_pcie: vcc3v3-pcie-regulator {
240 compatible = "regulator-fixed";
244 gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
245 pinctrl-names = "default";
246 pinctrl-0 = <&pcie_drv>;
247 regulator-name = "vcc3v3_pcie";
250 vcc3v3_3g: vcc3v3-3g-regulator {
251 compatible = "regulator-fixed";
255 gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
256 pinctrl-names = "default";
257 pinctrl-0 = <&pcie_3g_drv>;
258 regulator-name = "vcc3v3_3g";
261 vcc3v3_sys: vcc3v3-sys {
262 compatible = "regulator-fixed";
263 regulator-name = "vcc3v3_sys";
266 regulator-min-microvolt = <3300000>;
267 regulator-max-microvolt = <3300000>;
270 vcc5v0_host: vcc5v0-host-regulator {
271 compatible = "regulator-fixed";
273 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
274 pinctrl-names = "default";
275 pinctrl-0 = <&host_vbus_drv>;
276 regulator-name = "vcc5v0_host";
280 vcc5v0_sys: vcc5v0-sys {
281 compatible = "regulator-fixed";
282 regulator-name = "vcc5v0_sys";
285 regulator-min-microvolt = <5000000>;
286 regulator-max-microvolt = <5000000>;
289 vcc_phy: vcc-phy-regulator {
290 compatible = "regulator-fixed";
291 regulator-name = "vcc_phy";
297 compatible = "pwm-regulator";
298 pwms = <&pwm2 0 25000 1>;
299 regulator-name = "vdd_log";
300 regulator-min-microvolt = <800000>;
301 regulator-max-microvolt = <1400000>;
305 /* for rockchip boot on */
306 rockchip,pwm_id= <2>;
307 rockchip,pwm_voltage = <1000000>;
310 vccadc_ref: vccadc-ref {
311 compatible = "regulator-fixed";
312 regulator-name = "vcc1v8_sys";
315 regulator-min-microvolt = <1800000>;
316 regulator-max-microvolt = <1800000>;
319 vcc_lcd: vcc-lcd-regulator {
320 compatible = "regulator-fixed";
324 gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
325 pinctrl-names = "default";
326 pinctrl-0 = <&lcd_en>;
327 regulator-name = "vcc_lcd";
331 compatible = "wlan-platdata";
332 rockchip,grf = <&grf>;
333 wifi_chip_type = "ap6354";
335 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
340 compatible = "bluetooth-platdata";
341 //wifi-bt-power-toggle;
343 clock-names = "ext_clock";
344 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
345 pinctrl-names = "default", "rts_gpio";
346 pinctrl-0 = <&uart0_rts>;
347 pinctrl-1 = <&uart0_gpios>;
348 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
349 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
350 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
351 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
356 compatible = "gpio-leds";
358 label = "firefly:blue:power";
359 linux,default-trigger = "ir-power-click";
360 default-state = "on";
361 gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
362 pinctrl-names = "default";
363 pinctrl-0 = <&led_power>;
366 label = "firefly:yellow:user";
367 linux,default-trigger = "ir-user-click";
368 default-state = "off";
369 gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
370 pinctrl-names = "default";
371 pinctrl-0 = <&led_user>;
377 cpu-supply = <&vdd_cpu_l>;
381 cpu-supply = <&vdd_cpu_l>;
385 cpu-supply = <&vdd_cpu_l>;
389 cpu-supply = <&vdd_cpu_l>;
393 cpu-supply = <&vdd_cpu_b>;
397 cpu-supply = <&vdd_cpu_b>;
410 #address-cells = <1>;
413 edp_out_panel: endpoint@0 {
415 remote-endpoint = <&panel_in_edp>;
426 phy-supply = <&vcc_phy>;
428 clock_in_out = "input";
429 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
430 snps,reset-active-low;
431 snps,reset-delays-us = <0 10000 50000>;
432 assigned-clocks = <&cru SCLK_RMII_SRC>;
433 assigned-clock-parents = <&clkin_gmac>;
434 pinctrl-names = "default";
435 pinctrl-0 = <&rgmii_pins>;
443 mali-supply = <&vdd_gpu>;
447 #address-cells = <1>;
449 #sound-dai-cells = <0>;
455 i2c-scl-rising-time-ns = <168>;
456 i2c-scl-falling-time-ns = <4>;
457 clock-frequency = <400000>;
459 vdd_cpu_b: syr827@40 {
460 compatible = "silergy,syr827";
462 vin-supply = <&vcc5v0_sys>;
463 regulator-compatible = "fan53555-reg";
464 regulator-name = "vdd_cpu_b";
465 regulator-min-microvolt = <712500>;
466 regulator-max-microvolt = <1500000>;
467 regulator-ramp-delay = <1000>;
468 vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
469 fcs,suspend-voltage-selector = <1>;
472 regulator-initial-state = <3>;
473 regulator-state-mem {
474 regulator-off-in-suspend;
479 compatible = "silergy,syr828";
481 vin-supply = <&vcc5v0_sys>;
482 regulator-compatible = "fan53555-reg";
483 regulator-name = "vdd_gpu";
484 regulator-min-microvolt = <712500>;
485 regulator-max-microvolt = <1500000>;
486 regulator-ramp-delay = <1000>;
487 fcs,suspend-voltage-selector = <1>;
490 regulator-initial-state = <3>;
491 regulator-state-mem {
492 regulator-off-in-suspend;
497 compatible = "rockchip,rk808";
499 interrupt-parent = <&gpio1>;
500 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
501 pinctrl-names = "default";
502 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
503 rockchip,system-power-controller;
506 clock-output-names = "xin32k", "rk808-clkout2";
508 vcc1-supply = <&vcc3v3_sys>;
509 vcc2-supply = <&vcc3v3_sys>;
510 vcc3-supply = <&vcc3v3_sys>;
511 vcc4-supply = <&vcc3v3_sys>;
512 vcc6-supply = <&vcc3v3_sys>;
513 vcc7-supply = <&vcc3v3_sys>;
514 vcc8-supply = <&vcc3v3_sys>;
515 vcc9-supply = <&vcc3v3_sys>;
516 vcc10-supply = <&vcc3v3_sys>;
517 vcc11-supply = <&vcc3v3_sys>;
518 vcc12-supply = <&vcc3v3_sys>;
519 vddio-supply = <&vcc1v8_pmu>;
522 vdd_center: DCDC_REG1 {
525 regulator-min-microvolt = <750000>;
526 regulator-max-microvolt = <1350000>;
527 regulator-ramp-delay = <6001>;
528 regulator-name = "vdd_center";
529 regulator-state-mem {
530 regulator-off-in-suspend;
534 vdd_cpu_l: DCDC_REG2 {
537 regulator-min-microvolt = <750000>;
538 regulator-max-microvolt = <1350000>;
539 regulator-ramp-delay = <6001>;
540 regulator-name = "vdd_cpu_l";
541 regulator-state-mem {
542 regulator-off-in-suspend;
549 regulator-name = "vcc_ddr";
550 regulator-state-mem {
551 regulator-on-in-suspend;
558 regulator-min-microvolt = <1800000>;
559 regulator-max-microvolt = <1800000>;
560 regulator-name = "vcc_1v8";
561 regulator-state-mem {
562 regulator-on-in-suspend;
563 regulator-suspend-microvolt = <1800000>;
567 vcc1v8_dvp: LDO_REG1 {
570 regulator-min-microvolt = <1800000>;
571 regulator-max-microvolt = <1800000>;
572 regulator-name = "vcc1v8_dvp";
573 regulator-state-mem {
574 regulator-off-in-suspend;
578 vcc3v0_tp: LDO_REG2 {
581 regulator-min-microvolt = <3000000>;
582 regulator-max-microvolt = <3000000>;
583 regulator-name = "vcc3v0_tp";
584 regulator-state-mem {
585 regulator-off-in-suspend;
589 vcc1v8_pmu: LDO_REG3 {
592 regulator-min-microvolt = <1800000>;
593 regulator-max-microvolt = <1800000>;
594 regulator-name = "vcc1v8_pmu";
595 regulator-state-mem {
596 regulator-on-in-suspend;
597 regulator-suspend-microvolt = <1800000>;
604 regulator-min-microvolt = <1800000>;
605 regulator-max-microvolt = <3300000>;
606 regulator-name = "vcc_sd";
607 regulator-state-mem {
608 regulator-on-in-suspend;
609 regulator-suspend-microvolt = <3300000>;
613 vcca3v0_codec: LDO_REG5 {
616 regulator-min-microvolt = <3000000>;
617 regulator-max-microvolt = <3000000>;
618 regulator-name = "vcca3v0_codec";
619 regulator-state-mem {
620 regulator-off-in-suspend;
627 regulator-min-microvolt = <1500000>;
628 regulator-max-microvolt = <1500000>;
629 regulator-name = "vcc_1v5";
630 regulator-state-mem {
631 regulator-on-in-suspend;
632 regulator-suspend-microvolt = <1500000>;
636 vcca1v8_codec: LDO_REG7 {
639 regulator-min-microvolt = <1800000>;
640 regulator-max-microvolt = <1800000>;
641 regulator-name = "vcca1v8_codec";
642 regulator-state-mem {
643 regulator-off-in-suspend;
650 regulator-min-microvolt = <3000000>;
651 regulator-max-microvolt = <3000000>;
652 regulator-name = "vcc_3v0";
653 regulator-state-mem {
654 regulator-on-in-suspend;
655 regulator-suspend-microvolt = <3000000>;
659 vcc3v3_s3: SWITCH_REG1 {
662 regulator-name = "vcc3v3_s3";
663 regulator-state-mem {
664 regulator-off-in-suspend;
668 vcc3v3_s0: SWITCH_REG2 {
671 regulator-name = "vcc3v3_s0";
672 regulator-state-mem {
673 regulator-off-in-suspend;
682 i2c-scl-rising-time-ns = <300>;
683 i2c-scl-falling-time-ns = <15>;
686 #sound-dai-cells = <0>;
687 compatible = "realtek,rt5640";
689 clocks = <&cru SCLK_I2S_8CH_OUT>;
690 clock-names = "mclk";
691 realtek,in1-differential;
692 pinctrl-names = "default";
693 pinctrl-0 = <&rt5640_hpcon>;
694 hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
695 //hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
696 io-channels = <&saradc 4>;
697 hp-det-adc-value = <500>;
703 i2c-scl-rising-time-ns = <450>;
704 i2c-scl-falling-time-ns = <15>;
709 i2c-scl-rising-time-ns = <475>;
710 i2c-scl-falling-time-ns = <26>;
713 compatible = "fairchild,fusb302";
715 pinctrl-names = "default";
716 pinctrl-0 = <&fusb0_int>;
717 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
718 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
722 gsl3680: gsl3680@41 {
724 compatible = "gslX680-pad";
726 screen_max_x = <1536>;
727 screen_max_y = <2048>;
728 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
729 reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
734 compatible = "invensense,mpu6050";
736 mpu-int_config = <0x10>;
737 mpu-level_shifter = <0>;
738 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
742 irq-gpio = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>;
749 rockchip,i2s-broken-burst-len;
750 rockchip,playback-channels = <8>;
751 rockchip,capture-channels = <8>;
752 #sound-dai-cells = <0>;
757 rockchip,i2s-broken-burst-len;
758 rockchip,playback-channels = <2>;
759 rockchip,capture-channels = <2>;
760 #sound-dai-cells = <0>;
764 #sound-dai-cells = <0>;
771 bt656-supply = <&vcc1v8_dvp>; /* bt656_gpio2ab_ms */
772 audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */
773 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
774 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
782 ep-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
784 pinctrl-names = "default";
785 pinctrl-0 = <&pcie_clkreqn_cpm>;
791 pmu1830-supply = <&vcc_3v0>;
797 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
802 lcd_panel_reset: lcd-panel-reset {
803 rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_up>;
807 rockchip,pins = <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
814 <1 17 RK_FUNC_GPIO &pcfg_pull_none>;
816 pcie_3g_drv: pcie-3g-drv {
818 <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
824 vsel1_gpio: vsel1-gpio {
826 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
829 vsel2_gpio: vsel2-gpio {
831 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
836 wifi_enable_h: wifi-enable-h {
838 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
843 uart0_gpios: uart0-gpios {
845 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
850 led_power: led-power {
851 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
855 rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_none>;
860 rt5640_hpcon: rt5640-hpcon {
861 rockchip,pins = <4 21 RK_FUNC_GPIO &pcfg_pull_none>;
866 pmic_int_l: pmic-int-l {
868 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
871 pmic_dvs2: pmic-dvs2 {
873 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
878 host_vbus_drv: host-vbus-drv {
880 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
885 fusb0_int: fusb0-int {
886 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
904 rockchip,power-ctrl =
905 <&gpio1 18 GPIO_ACTIVE_LOW>,
906 <&gpio1 14 GPIO_ACTIVE_HIGH>;
915 logo,mode = "center";
930 vref-supply = <&vccadc_ref>;
935 keep-power-in-suspend;
937 mmc-hs400-enhanced-strobe;
944 max-frequency = <150000000>;
951 vqmmc-supply = <&vcc_sd>;
952 pinctrl-names = "default";
953 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
958 max-frequency = <50000000>;
963 keep-power-in-suspend;
964 mmc-pwrseq = <&sdio_pwrseq>;
967 pinctrl-names = "default";
968 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
975 pinctrl-0 = <&spdif_bus_1>;
976 i2c-scl-rising-time-ns = <450>;
977 i2c-scl-falling-time-ns = <15>;
978 #sound-dai-cells = <0>;
991 /* tshut mode 0:CRU 1:GPIO */
992 rockchip,hw-tshut-mode = <1>;
993 /* tshut polarity 0:LOW 1:HIGH */
994 rockchip,hw-tshut-polarity = <1>;
1002 u2phy0_otg: otg-port {
1006 u2phy0_host: host-port {
1007 phy-supply = <&vcc5v0_host>;
1015 u2phy1_otg: otg-port {
1019 u2phy1_host: host-port {
1020 phy-supply = <&vcc5v0_host>;
1027 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
1028 compatible = "rockchip,remotectl-pwm";
1029 remote_pwm_id = <3>;
1030 handle_cpu_id = <0>;
1033 rockchip,usercode = <0xff00>;
1034 rockchip,key_table =
1040 <0xf4 KEY_VOLUMEUP>,
1041 <0xa7 KEY_VOLUMEDOWN>,
1051 pinctrl-names = "default";
1052 pinctrl-0 = <&uart0_xfer &uart0_cts>;
1112 /* 0 means ion, 1 means drm */