2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include "dt-bindings/pwm/pwm.h"
46 #include "rk3399.dtsi"
47 #include "rk3399-opp.dtsi"
48 #include "rk3399-linux.dtsi"
49 #include <dt-bindings/input/input.h>
52 model = "Rockchip RK3399 Firefly Board (Linux Opensource)";
53 compatible = "rockchip,rk3399-firefly-linux", "rockchip,rk3399";
56 compatible = "adc-keys";
57 io-channels = <&saradc 1>;
58 io-channel-names = "buttons";
59 poll-interval = <100>;
60 keyup-threshold-microvolt = <1800000>;
64 linux,code = <KEY_VOLUMEUP>;
65 press-threshold-microvolt = <100000>;
69 label = "Volume Down";
70 linux,code = <KEY_VOLUMEDOWN>;
71 press-threshold-microvolt = <300000>;
76 linux,code = <KEY_BACK>;
77 press-threshold-microvolt = <985000>;
82 linux,code = <KEY_MENU>;
83 press-threshold-microvolt = <1314000>;
87 backlight: backlight {
89 compatible = "pwm-backlight";
90 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
91 pwms = <&pwm0 0 25000 0>;
95 16 17 18 19 20 21 22 23
96 24 25 26 27 28 29 30 31
97 32 33 34 35 36 37 38 39
98 40 41 42 43 44 45 46 47
99 48 49 50 51 52 53 54 55
100 56 57 58 59 60 61 62 63
101 64 65 66 67 68 69 70 71
102 72 73 74 75 76 77 78 79
103 80 81 82 83 84 85 86 87
104 88 89 90 91 92 93 94 95
105 96 97 98 99 100 101 102 103
106 104 105 106 107 108 109 110 111
107 112 113 114 115 116 117 118 119
108 120 121 122 123 124 125 126 127
109 128 129 130 131 132 133 134 135
110 136 137 138 139 140 141 142 143
111 144 145 146 147 148 149 150 151
112 152 153 154 155 156 157 158 159
113 160 161 162 163 164 165 166 167
114 168 169 170 171 172 173 174 175
115 176 177 178 179 180 181 182 183
116 184 185 186 187 188 189 190 191
117 192 193 194 195 196 197 198 199
118 200 201 202 203 204 205 206 207
119 208 209 210 211 212 213 214 215
120 216 217 218 219 220 221 222 223
121 224 225 226 227 228 229 230 231
122 232 233 234 235 236 237 238 239
123 240 241 242 243 244 245 246 247
124 248 249 250 251 252 253 254 255>;
125 default-brightness-level = <200>;
128 clkin_gmac: external-gmac-clock {
129 compatible = "fixed-clock";
130 clock-frequency = <125000000>;
131 clock-output-names = "clkin_gmac";
135 dw_hdmi_audio: dw-hdmi-audio {
137 compatible = "rockchip,dw-hdmi-audio";
138 #sound-dai-cells = <0>;
141 edp_panel: edp-panel {
142 compatible = "lg,lp079qx1-sp0v", "panel-simple";
143 backlight = <&backlight>;
144 power-supply = <&vcc3v3_s0>;
145 enable-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
146 pinctrl-names = "default";
147 pinctrl-0 = <&lcd_panel_reset>;
150 panel_in_edp: endpoint {
151 remote-endpoint = <&edp_out_panel>;
156 fiq_debugger: fiq-debugger {
157 compatible = "rockchip,fiq-debugger";
158 rockchip,serial-id = <2>;
159 rockchip,signal-irq = <182>;
160 rockchip,wake-irq = <0>;
161 rockchip,irq-mode-enable = <1>; /* If enable uart uses irq instead of fiq */
162 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
163 pinctrl-names = "default";
164 pinctrl-0 = <&uart2c_xfer>;
168 compatible = "gpio-keys";
169 #address-cells = <1>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&pwrbtn>;
177 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
178 linux,code = <KEY_POWER>;
179 label = "GPIO Key Power";
180 linux,input-type = <1>;
181 gpio-key,wakeup = <1>;
182 debounce-interval = <100>;
187 compatible = "simple-audio-card";
188 simple-audio-card,format = "i2s";
189 simple-audio-card,name = "rockchip,rt5640-codec";
190 simple-audio-card,mclk-fs = <256>;
191 simple-audio-card,widgets =
192 "Microphone", "Mic Jack",
193 "Headphone", "Headphone Jack";
194 simple-audio-card,routing =
195 "Mic Jack", "MICBIAS1",
197 "Headphone Jack", "HPOL",
198 "Headphone Jack", "HPOR";
199 simple-audio-card,cpu {
202 simple-audio-card,codec {
203 sound-dai = <&rt5640>;
207 hdmi_sound: hdmi-sound {
209 compatible = "simple-audio-card";
210 simple-audio-card,format = "i2s";
211 simple-audio-card,mclk-fs = <256>;
212 simple-audio-card,name = "rockchip,hdmi";
214 simple-audio-card,cpu {
217 simple-audio-card,codec {
218 sound-dai = <&dw_hdmi_audio>;
222 hdmi_codec: hdmi-codec {
223 compatible = "simple-audio-card";
224 simple-audio-card,format = "i2s";
225 simple-audio-card,mclk-fs = <256>;
226 simple-audio-card,name = "HDMI-CODEC";
228 simple-audio-card,cpu {
232 simple-audio-card,codec {
239 compatible = "simple-audio-card";
240 simple-audio-card,name = "ROCKCHIP,SPDIF";
241 simple-audio-card,cpu {
242 sound-dai = <&spdif>;
244 simple-audio-card,codec {
245 sound-dai = <&spdif_out>;
249 spdif_out: spdif-out {
251 compatible = "linux,spdif-dit";
252 #sound-dai-cells = <0>;
255 sdio_pwrseq: sdio-pwrseq {
256 compatible = "mmc-pwrseq-simple";
258 clock-names = "ext_clock";
259 pinctrl-names = "default";
260 pinctrl-0 = <&wifi_enable_h>;
263 * On the module itself this is one of these (depending
264 * on the actual card populated):
265 * - SDIO_RESET_L_WL_REG_ON
266 * - PDN (power down when low)
268 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
271 vcc3v3_pcie: vcc3v3-pcie-regulator {
272 compatible = "regulator-fixed";
276 gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&pcie_drv>;
279 regulator-name = "vcc3v3_pcie";
282 vcc3v3_sys: vcc3v3-sys {
283 compatible = "regulator-fixed";
284 regulator-name = "vcc3v3_sys";
287 regulator-min-microvolt = <3300000>;
288 regulator-max-microvolt = <3300000>;
291 vcc5v0_host: vcc5v0-host-regulator {
292 compatible = "regulator-fixed";
294 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
295 pinctrl-names = "default";
296 pinctrl-0 = <&host_vbus_drv>;
297 regulator-name = "vcc5v0_host";
301 vcc5v0_sys: vcc5v0-sys {
302 compatible = "regulator-fixed";
303 regulator-name = "vcc5v0_sys";
306 regulator-min-microvolt = <5000000>;
307 regulator-max-microvolt = <5000000>;
310 vcc_phy: vcc-phy-regulator {
311 compatible = "regulator-fixed";
312 regulator-name = "vcc_phy";
318 compatible = "pwm-regulator";
319 pwms = <&pwm2 0 25000 1>;
320 regulator-name = "vdd_log";
321 regulator-min-microvolt = <800000>;
322 regulator-max-microvolt = <1400000>;
326 /* for rockchip boot on */
327 rockchip,pwm_id= <2>;
328 rockchip,pwm_voltage = <1000000>;
331 vccadc_ref: vccadc-ref {
332 compatible = "regulator-fixed";
333 regulator-name = "vcc1v8_sys";
336 regulator-min-microvolt = <1800000>;
337 regulator-max-microvolt = <1800000>;
341 compatible = "wlan-platdata";
342 rockchip,grf = <&grf>;
343 wifi_chip_type = "ap6354";
345 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
350 compatible = "bluetooth-platdata";
351 //wifi-bt-power-toggle;
352 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
353 pinctrl-names = "default", "rts_gpio";
354 pinctrl-0 = <&uart0_rts>;
355 pinctrl-1 = <&uart0_gpios>;
356 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
357 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
358 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
359 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
365 cpu-supply = <&vdd_cpu_l>;
369 cpu-supply = <&vdd_cpu_l>;
373 cpu-supply = <&vdd_cpu_l>;
377 cpu-supply = <&vdd_cpu_l>;
381 cpu-supply = <&vdd_cpu_b>;
385 cpu-supply = <&vdd_cpu_b>;
398 #address-cells = <1>;
401 edp_out_panel: endpoint@0 {
403 remote-endpoint = <&panel_in_edp>;
414 phy-supply = <&vcc_phy>;
416 clock_in_out = "input";
417 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
418 snps,reset-active-low;
419 snps,reset-delays-us = <0 10000 50000>;
420 assigned-clocks = <&cru SCLK_RMII_SRC>;
421 assigned-clock-parents = <&clkin_gmac>;
422 pinctrl-names = "default";
423 pinctrl-0 = <&rgmii_pins>;
431 mali-supply = <&vdd_gpu>;
435 #address-cells = <1>;
437 #sound-dai-cells = <0>;
438 ddc-i2c-bus = <&i2c3>;
444 i2c-scl-rising-time-ns = <168>;
445 i2c-scl-falling-time-ns = <4>;
446 clock-frequency = <400000>;
448 vdd_cpu_b: syr827@40 {
449 compatible = "silergy,syr827";
451 vin-supply = <&vcc5v0_sys>;
452 regulator-compatible = "fan53555-reg";
453 regulator-name = "vdd_cpu_b";
454 regulator-min-microvolt = <712500>;
455 regulator-max-microvolt = <1500000>;
456 regulator-ramp-delay = <1000>;
457 vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
458 fcs,suspend-voltage-selector = <1>;
461 regulator-initial-state = <3>;
462 regulator-state-mem {
463 regulator-off-in-suspend;
468 compatible = "silergy,syr828";
470 vin-supply = <&vcc5v0_sys>;
471 regulator-compatible = "fan53555-reg";
472 regulator-name = "vdd_gpu";
473 regulator-min-microvolt = <712500>;
474 regulator-max-microvolt = <1500000>;
475 regulator-ramp-delay = <1000>;
476 fcs,suspend-voltage-selector = <1>;
479 regulator-initial-state = <3>;
480 regulator-state-mem {
481 regulator-off-in-suspend;
486 compatible = "rockchip,rk808";
488 interrupt-parent = <&gpio1>;
489 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
490 pinctrl-names = "default";
491 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
492 rockchip,system-power-controller;
495 clock-output-names = "xin32k", "rk808-clkout2";
497 vcc1-supply = <&vcc3v3_sys>;
498 vcc2-supply = <&vcc3v3_sys>;
499 vcc3-supply = <&vcc3v3_sys>;
500 vcc4-supply = <&vcc3v3_sys>;
501 vcc6-supply = <&vcc3v3_sys>;
502 vcc7-supply = <&vcc3v3_sys>;
503 vcc8-supply = <&vcc3v3_sys>;
504 vcc9-supply = <&vcc3v3_sys>;
505 vcc10-supply = <&vcc3v3_sys>;
506 vcc11-supply = <&vcc3v3_sys>;
507 vcc12-supply = <&vcc3v3_sys>;
508 vddio-supply = <&vcc1v8_pmu>;
511 vdd_center: DCDC_REG1 {
514 regulator-min-microvolt = <750000>;
515 regulator-max-microvolt = <1350000>;
516 regulator-ramp-delay = <6001>;
517 regulator-name = "vdd_center";
518 regulator-state-mem {
519 regulator-off-in-suspend;
523 vdd_cpu_l: DCDC_REG2 {
526 regulator-min-microvolt = <750000>;
527 regulator-max-microvolt = <1350000>;
528 regulator-ramp-delay = <6001>;
529 regulator-name = "vdd_cpu_l";
530 regulator-state-mem {
531 regulator-off-in-suspend;
538 regulator-name = "vcc_ddr";
539 regulator-state-mem {
540 regulator-on-in-suspend;
547 regulator-min-microvolt = <1800000>;
548 regulator-max-microvolt = <1800000>;
549 regulator-name = "vcc_1v8";
550 regulator-state-mem {
551 regulator-on-in-suspend;
552 regulator-suspend-microvolt = <1800000>;
556 vcc1v8_dvp: LDO_REG1 {
559 regulator-min-microvolt = <1800000>;
560 regulator-max-microvolt = <1800000>;
561 regulator-name = "vcc1v8_dvp";
562 regulator-state-mem {
563 regulator-off-in-suspend;
567 vcc3v0_tp: LDO_REG2 {
570 regulator-min-microvolt = <3000000>;
571 regulator-max-microvolt = <3000000>;
572 regulator-name = "vcc3v0_tp";
573 regulator-state-mem {
574 regulator-off-in-suspend;
578 vcc1v8_pmu: LDO_REG3 {
581 regulator-min-microvolt = <1800000>;
582 regulator-max-microvolt = <1800000>;
583 regulator-name = "vcc1v8_pmu";
584 regulator-state-mem {
585 regulator-on-in-suspend;
586 regulator-suspend-microvolt = <1800000>;
593 regulator-min-microvolt = <1800000>;
594 regulator-max-microvolt = <3300000>;
595 regulator-name = "vcc_sd";
596 regulator-state-mem {
597 regulator-on-in-suspend;
598 regulator-suspend-microvolt = <3300000>;
602 vcca3v0_codec: LDO_REG5 {
605 regulator-min-microvolt = <3000000>;
606 regulator-max-microvolt = <3000000>;
607 regulator-name = "vcca3v0_codec";
608 regulator-state-mem {
609 regulator-off-in-suspend;
616 regulator-min-microvolt = <1500000>;
617 regulator-max-microvolt = <1500000>;
618 regulator-name = "vcc_1v5";
619 regulator-state-mem {
620 regulator-on-in-suspend;
621 regulator-suspend-microvolt = <1500000>;
625 vcca1v8_codec: LDO_REG7 {
628 regulator-min-microvolt = <1800000>;
629 regulator-max-microvolt = <1800000>;
630 regulator-name = "vcca1v8_codec";
631 regulator-state-mem {
632 regulator-off-in-suspend;
639 regulator-min-microvolt = <3000000>;
640 regulator-max-microvolt = <3000000>;
641 regulator-name = "vcc_3v0";
642 regulator-state-mem {
643 regulator-on-in-suspend;
644 regulator-suspend-microvolt = <3000000>;
648 vcc3v3_s3: SWITCH_REG1 {
651 regulator-name = "vcc3v3_s3";
652 regulator-state-mem {
653 regulator-off-in-suspend;
657 vcc3v3_s0: SWITCH_REG2 {
660 regulator-name = "vcc3v3_s0";
661 regulator-state-mem {
662 regulator-off-in-suspend;
671 i2c-scl-rising-time-ns = <300>;
672 i2c-scl-falling-time-ns = <15>;
674 gsl3673: gsl3673@40 {
675 compatible = "GSL,GSL3673";
677 screen_max_x = <1536>;
678 screen_max_y = <2048>;
679 irq_gpio_number = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
680 rst_gpio_number = <&gpio4 22 GPIO_ACTIVE_HIGH>;
684 #sound-dai-cells = <0>;
685 compatible = "realtek,rt5640";
687 clocks = <&cru SCLK_I2S_8CH_OUT>;
688 clock-names = "mclk";
689 realtek,in1-differential;
690 pinctrl-names = "default";
691 pinctrl-0 = <&rt5640_hpcon>;
692 hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
693 //hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
694 io-channels = <&saradc 4>;
695 hp-det-adc-value = <500>;
701 i2c-scl-rising-time-ns = <450>;
702 i2c-scl-falling-time-ns = <15>;
707 i2c-scl-rising-time-ns = <600>;
708 i2c-scl-falling-time-ns = <20>;
711 compatible = "fairchild,fusb302";
713 pinctrl-names = "default";
714 pinctrl-0 = <&fusb0_int>;
715 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
716 vbus-5v-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
722 compatible = "invensense,mpu6500";
724 irq-gpio = <&gpio1 22 IRQ_TYPE_EDGE_RISING>;
725 mpu-int_config = <0x10>;
726 mpu-level_shifter = <0>;
727 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
737 rockchip,i2s-broken-burst-len;
738 rockchip,playback-channels = <8>;
739 rockchip,capture-channels = <8>;
740 #sound-dai-cells = <0>;
745 rockchip,i2s-broken-burst-len;
746 rockchip,playback-channels = <2>;
747 rockchip,capture-channels = <2>;
748 #sound-dai-cells = <0>;
752 #sound-dai-cells = <0>;
759 bt656-supply = <&vcc1v8_dvp>; /* bt656_gpio2ab_ms */
760 audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */
761 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
762 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
770 ep-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
772 pinctrl-names = "default";
773 pinctrl-0 = <&pcie_clkreqn_cpm>;
779 pmu1830-supply = <&vcc_3v0>;
785 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
790 lcd_panel_reset: lcd-panel-reset {
791 rockchip,pins = <4 30 RK_FUNC_GPIO &pcfg_pull_up>;
798 <1 17 RK_FUNC_GPIO &pcfg_pull_none>;
800 pcie_3g_drv: pcie-3g-drv {
802 <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
807 vsel1_gpio: vsel1-gpio {
809 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
812 vsel2_gpio: vsel2-gpio {
814 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
819 wifi_enable_h: wifi-enable-h {
821 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
826 uart0_gpios: uart0-gpios {
828 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
833 rt5640_hpcon: rt5640-hpcon {
834 rockchip,pins = <4 21 RK_FUNC_GPIO &pcfg_pull_none>;
839 pmic_int_l: pmic-int-l {
841 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
844 pmic_dvs2: pmic-dvs2 {
846 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
851 host_vbus_drv: host-vbus-drv {
853 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
858 fusb0_int: fusb0-int {
859 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
877 rockchip,power-ctrl =
878 <&gpio1 18 GPIO_ACTIVE_LOW>,
879 <&gpio1 14 GPIO_ACTIVE_HIGH>;
888 vref-supply = <&vccadc_ref>;
893 keep-power-in-suspend;
895 mmc-hs400-enhanced-strobe;
902 max-frequency = <150000000>;
909 vqmmc-supply = <&vcc_sd>;
910 pinctrl-names = "default";
911 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
916 max-frequency = <50000000>;
921 keep-power-in-suspend;
922 mmc-pwrseq = <&sdio_pwrseq>;
925 pinctrl-names = "default";
926 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
933 pinctrl-0 = <&spdif_bus_1>;
934 i2c-scl-rising-time-ns = <450>;
935 i2c-scl-falling-time-ns = <15>;
936 #sound-dai-cells = <0>;
949 /* tshut mode 0:CRU 1:GPIO */
950 rockchip,hw-tshut-mode = <1>;
951 /* tshut polarity 0:LOW 1:HIGH */
952 rockchip,hw-tshut-polarity = <1>;
960 u2phy0_otg: otg-port {
964 u2phy0_host: host-port {
965 phy-supply = <&vcc5v0_host>;
973 u2phy1_otg: otg-port {
977 u2phy1_host: host-port {
978 phy-supply = <&vcc5v0_host>;
984 pinctrl-names = "default";
985 pinctrl-0 = <&uart0_xfer &uart0_cts>;