ARM64: DTS: Fix Firefly board audio driver
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-firefly-linux-edp.dts
1 /*
2  * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 /dts-v1/;
44
45 #include "dt-bindings/pwm/pwm.h"
46 #include "rk3399.dtsi"
47 #include "rk3399-opp.dtsi"
48 #include "rk3399-linux.dtsi"
49 #include <dt-bindings/input/input.h>
50
51 / {
52         model = "Rockchip RK3399 Firefly Board (Linux Opensource)";
53         compatible = "rockchip,rk3399-firefly-linux", "rockchip,rk3399";
54
55         backlight: backlight {
56                 status = "okay";
57                 compatible = "pwm-backlight";
58                 pwms = <&pwm0 0 25000 0>;
59                 brightness-levels = <
60                           0   1   2   3   4   5   6   7
61                           8   9  10  11  12  13  14  15
62                          16  17  18  19  20  21  22  23
63                          24  25  26  27  28  29  30  31
64                          32  33  34  35  36  37  38  39
65                          40  41  42  43  44  45  46  47
66                          48  49  50  51  52  53  54  55
67                          56  57  58  59  60  61  62  63
68                          64  65  66  67  68  69  70  71
69                          72  73  74  75  76  77  78  79
70                          80  81  82  83  84  85  86  87
71                          88  89  90  91  92  93  94  95
72                          96  97  98  99 100 101 102 103
73                         104 105 106 107 108 109 110 111
74                         112 113 114 115 116 117 118 119
75                         120 121 122 123 124 125 126 127
76                         128 129 130 131 132 133 134 135
77                         136 137 138 139 140 141 142 143
78                         144 145 146 147 148 149 150 151
79                         152 153 154 155 156 157 158 159
80                         160 161 162 163 164 165 166 167
81                         168 169 170 171 172 173 174 175
82                         176 177 178 179 180 181 182 183
83                         184 185 186 187 188 189 190 191
84                         192 193 194 195 196 197 198 199
85                         200 201 202 203 204 205 206 207
86                         208 209 210 211 212 213 214 215
87                         216 217 218 219 220 221 222 223
88                         224 225 226 227 228 229 230 231
89                         232 233 234 235 236 237 238 239
90                         240 241 242 243 244 245 246 247
91                         248 249 250 251 252 253 254 255>;
92                 default-brightness-level = <200>;
93         };
94
95         clkin_gmac: external-gmac-clock {
96                 compatible = "fixed-clock";
97                 clock-frequency = <125000000>;
98                 clock-output-names = "clkin_gmac";
99                 #clock-cells = <0>;
100         };
101
102         dw_hdmi_audio: dw-hdmi-audio {
103                 status = "disabled";
104                 compatible = "rockchip,dw-hdmi-audio";
105                 #sound-dai-cells = <0>;
106         };
107
108         edp_panel: edp-panel {
109                 compatible = "sharp,lcd-f402", "panel-simple";
110                 backlight = <&backlight>;
111                 power-supply = <&vcc_lcd>;
112                 enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
113                 pinctrl-names = "default";
114                 pinctrl-0 = <&lcd_panel_reset>;
115
116                 ports {
117                         panel_in_edp: endpoint {
118                                 remote-endpoint = <&edp_out_panel>;
119                         };
120                 };
121         };
122
123         fiq_debugger: fiq-debugger {
124                 compatible = "rockchip,fiq-debugger";
125                 rockchip,serial-id = <2>;
126                 rockchip,signal-irq = <182>;
127                 rockchip,wake-irq = <0>;
128                 rockchip,irq-mode-enable = <1>;  /* If enable uart uses irq instead of fiq */
129                 rockchip,baudrate = <1500000>;  /* Only 115200 and 1500000 */
130                 pinctrl-names = "default";
131                 pinctrl-0 = <&uart2c_xfer>;
132         };
133
134         gpio-keys {
135                 compatible = "gpio-keys";
136                 #address-cells = <1>;
137                 #size-cells = <0>;
138                 autorepeat;
139
140                 pinctrl-names = "default";
141                 pinctrl-0 = <&pwrbtn>;
142
143                 button@0 {
144                         gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
145                         linux,code = <KEY_POWER>;
146                         label = "GPIO Key Power";
147                         linux,input-type = <1>;
148                         gpio-key,wakeup = <1>;
149                         debounce-interval = <100>;
150                 };
151         };
152
153         rt5640-sound {
154                 compatible = "simple-audio-card";
155                 simple-audio-card,format = "i2s";
156                 simple-audio-card,name = "rockchip,rt5640-codec";
157                 simple-audio-card,mclk-fs = <256>;
158                 simple-audio-card,widgets =
159                         "Microphone", "Mic Jack",
160                         "Headphone", "Headphone Jack";
161                 simple-audio-card,routing =
162                         "Mic Jack", "MICBIAS1",
163                         "IN1P", "Mic Jack",
164                         "Headphone Jack", "HPOL",
165                         "Headphone Jack", "HPOR";
166                 simple-audio-card,cpu {
167                         sound-dai = <&i2s1>;
168                 };
169                 simple-audio-card,codec {
170                         sound-dai = <&rt5640>;
171                 };
172         };
173
174         hdmi_sound: hdmi-sound {
175                 status = "disabled";
176                 compatible = "simple-audio-card";
177                 simple-audio-card,format = "i2s";
178                 simple-audio-card,mclk-fs = <256>;
179                 simple-audio-card,name = "rockchip,hdmi";
180
181                 simple-audio-card,cpu {
182                         sound-dai = <&i2s2>;
183                 };
184                 simple-audio-card,codec {
185                         sound-dai = <&dw_hdmi_audio>;
186                 };
187         };
188
189         hdmi_codec: hdmi-codec {
190                 compatible = "simple-audio-card";
191                 simple-audio-card,format = "i2s";
192                 simple-audio-card,mclk-fs = <256>;
193                 simple-audio-card,name = "HDMI-CODEC";
194
195                 simple-audio-card,cpu {
196                         sound-dai = <&i2s2>;
197                 };
198
199                 simple-audio-card,codec {
200                         sound-dai = <&hdmi>;
201                 };
202         };
203
204         spdif-sound {
205                 status = "okay";
206                 compatible = "simple-audio-card";
207                 simple-audio-card,name = "ROCKCHIP,SPDIF";
208                 simple-audio-card,cpu {
209                         sound-dai = <&spdif>;
210                 };
211                 simple-audio-card,codec {
212                         sound-dai = <&spdif_out>;
213                 };
214         };
215
216         spdif_out: spdif-out {
217                 status = "okay";
218                 compatible = "linux,spdif-dit";
219                 #sound-dai-cells = <0>;
220         };
221
222         sdio_pwrseq: sdio-pwrseq {
223                 compatible = "mmc-pwrseq-simple";
224                 clocks = <&rk808 1>;
225                 clock-names = "ext_clock";
226                 pinctrl-names = "default";
227                 pinctrl-0 = <&wifi_enable_h>;
228
229                 /*
230                  * On the module itself this is one of these (depending
231                  * on the actual card populated):
232                  * - SDIO_RESET_L_WL_REG_ON
233                  * - PDN (power down when low)
234                  */
235                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
236         };
237
238         vcc3v3_pcie: vcc3v3-pcie-regulator {
239                 compatible = "regulator-fixed";
240                 enable-active-high;
241                 regulator-always-on;
242                 regulator-boot-on;
243                 gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
244                 pinctrl-names = "default";
245                 pinctrl-0 = <&pcie_drv>;
246                 regulator-name = "vcc3v3_pcie";
247         };
248
249         vcc3v3_sys: vcc3v3-sys {
250                 compatible = "regulator-fixed";
251                 regulator-name = "vcc3v3_sys";
252                 regulator-always-on;
253                 regulator-boot-on;
254                 regulator-min-microvolt = <3300000>;
255                 regulator-max-microvolt = <3300000>;
256         };
257
258         vcc5v0_host: vcc5v0-host-regulator {
259                 compatible = "regulator-fixed";
260                 enable-active-high;
261                 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
262                 pinctrl-names = "default";
263                 pinctrl-0 = <&host_vbus_drv>;
264                 regulator-name = "vcc5v0_host";
265                 regulator-always-on;
266         };
267
268         vcc5v0_sys: vcc5v0-sys {
269                 compatible = "regulator-fixed";
270                 regulator-name = "vcc5v0_sys";
271                 regulator-always-on;
272                 regulator-boot-on;
273                 regulator-min-microvolt = <5000000>;
274                 regulator-max-microvolt = <5000000>;
275         };
276
277         vcc_phy: vcc-phy-regulator {
278                 compatible = "regulator-fixed";
279                 regulator-name = "vcc_phy";
280                 regulator-always-on;
281                 regulator-boot-on;
282         };
283
284         vdd_log: vdd-log {
285                 compatible = "pwm-regulator";
286                 pwms = <&pwm2 0 25000 1>;
287                 regulator-name = "vdd_log";
288                 regulator-min-microvolt = <800000>;
289                 regulator-max-microvolt = <1400000>;
290                 regulator-always-on;
291                 regulator-boot-on;
292
293                 /* for rockchip boot on */
294                 rockchip,pwm_id= <2>;
295                 rockchip,pwm_voltage = <1000000>;
296         };
297
298         vccadc_ref: vccadc-ref {
299                 compatible = "regulator-fixed";
300                 regulator-name = "vcc1v8_sys";
301                 regulator-always-on;
302                 regulator-boot-on;
303                 regulator-min-microvolt = <1800000>;
304                 regulator-max-microvolt = <1800000>;
305         };
306
307         vcc_lcd: vcc-lcd-regulator {
308                 compatible = "regulator-fixed";
309                 regulator-always-on;
310                 regulator-boot-on;
311                 enable-active-high;
312                 gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
313                 pinctrl-names = "default";
314                 pinctrl-0 = <&lcd_en>;
315                 regulator-name = "vcc_lcd";
316         };
317
318         wireless-wlan {
319                 compatible = "wlan-platdata";
320                 rockchip,grf = <&grf>;
321                 wifi_chip_type = "ap6354";
322                 sdio_vref = <1800>;
323                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
324                 status = "okay";
325         };
326
327         wireless-bluetooth {
328                 compatible = "bluetooth-platdata";
329                 //wifi-bt-power-toggle;
330                 clocks = <&rk808 1>;
331                 clock-names = "ext_clock";
332                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
333                 pinctrl-names = "default", "rts_gpio";
334                 pinctrl-0 = <&uart0_rts>;
335                 pinctrl-1 = <&uart0_gpios>;
336                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
337                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
338                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
339                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
340                 status = "okay";
341         };
342
343     leds {
344        compatible = "gpio-leds";
345        power {
346            label = "firefly:blue:power";
347            linux,default-trigger = "ir-power-click";
348            default-state = "on";
349            gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
350            pinctrl-names = "default";
351            pinctrl-0 = <&led_power>;
352        };
353        user {
354            label = "firefly:yellow:user";
355            linux,default-trigger = "ir-user-click";
356            default-state = "off";
357            gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
358            pinctrl-names = "default";
359            pinctrl-0 = <&led_user>;
360        };
361    };
362 };
363
364 &cpu_l0 {
365         cpu-supply = <&vdd_cpu_l>;
366 };
367
368 &cpu_l1 {
369         cpu-supply = <&vdd_cpu_l>;
370 };
371
372 &cpu_l2 {
373         cpu-supply = <&vdd_cpu_l>;
374 };
375
376 &cpu_l3 {
377         cpu-supply = <&vdd_cpu_l>;
378 };
379
380 &cpu_b0 {
381         cpu-supply = <&vdd_cpu_b>;
382 };
383
384 &cpu_b1 {
385         cpu-supply = <&vdd_cpu_b>;
386 };
387
388 &display_subsystem {
389         status = "okay";
390 };
391
392 &edp {
393         status = "okay";
394
395         ports {
396                 edp_out: port@1 {
397                         reg = <1>;
398                         #address-cells = <1>;
399                         #size-cells = <0>;
400
401                         edp_out_panel: endpoint@0 {
402                                 reg = <0>;
403                                 remote-endpoint = <&panel_in_edp>;
404                         };
405                 };
406         };
407 };
408
409 &emmc_phy {
410         status = "okay";
411 };
412
413 &gmac {
414         phy-supply = <&vcc_phy>;
415         phy-mode = "rgmii";
416         clock_in_out = "input";
417         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
418         snps,reset-active-low;
419         snps,reset-delays-us = <0 10000 50000>;
420         assigned-clocks = <&cru SCLK_RMII_SRC>;
421         assigned-clock-parents = <&clkin_gmac>;
422         pinctrl-names = "default";
423         pinctrl-0 = <&rgmii_pins>;
424         tx_delay = <0x28>;
425         rx_delay = <0x11>;
426         status = "okay";
427 };
428
429 &gpu {
430         status = "okay";
431         mali-supply = <&vdd_gpu>;
432 };
433
434 &hdmi {
435         #address-cells = <1>;
436         #size-cells = <0>;
437         #sound-dai-cells = <0>;
438         ddc-i2c-bus = <&i2c3>;
439         status = "okay";
440 };
441
442 &i2c0 {
443         status = "okay";
444         i2c-scl-rising-time-ns = <168>;
445         i2c-scl-falling-time-ns = <4>;
446         clock-frequency = <400000>;
447
448         vdd_cpu_b: syr827@40 {
449                 compatible = "silergy,syr827";
450                 reg = <0x40>;
451                 vin-supply = <&vcc5v0_sys>;
452                 regulator-compatible = "fan53555-reg";
453                 regulator-name = "vdd_cpu_b";
454                 regulator-min-microvolt = <712500>;
455                 regulator-max-microvolt = <1500000>;
456                 regulator-ramp-delay = <1000>;
457                 vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
458                 fcs,suspend-voltage-selector = <1>;
459                 regulator-always-on;
460                 regulator-boot-on;
461                 regulator-initial-state = <3>;
462                         regulator-state-mem {
463                         regulator-off-in-suspend;
464                 };
465         };
466
467         vdd_gpu: syr828@41 {
468                 compatible = "silergy,syr828";
469                 reg = <0x41>;
470                 vin-supply = <&vcc5v0_sys>;
471                 regulator-compatible = "fan53555-reg";
472                 regulator-name = "vdd_gpu";
473                 regulator-min-microvolt = <712500>;
474                 regulator-max-microvolt = <1500000>;
475                 regulator-ramp-delay = <1000>;
476                 fcs,suspend-voltage-selector = <1>;
477                 regulator-always-on;
478                 regulator-boot-on;
479                 regulator-initial-state = <3>;
480                         regulator-state-mem {
481                         regulator-off-in-suspend;
482                 };
483         };
484
485         rk808: pmic@1b {
486                 compatible = "rockchip,rk808";
487                 reg = <0x1b>;
488                 interrupt-parent = <&gpio1>;
489                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
490                 pinctrl-names = "default";
491                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
492                 rockchip,system-power-controller;
493                 wakeup-source;
494                 #clock-cells = <1>;
495                 clock-output-names = "xin32k", "rk808-clkout2";
496
497                 vcc1-supply = <&vcc3v3_sys>;
498                 vcc2-supply = <&vcc3v3_sys>;
499                 vcc3-supply = <&vcc3v3_sys>;
500                 vcc4-supply = <&vcc3v3_sys>;
501                 vcc6-supply = <&vcc3v3_sys>;
502                 vcc7-supply = <&vcc3v3_sys>;
503                 vcc8-supply = <&vcc3v3_sys>;
504                 vcc9-supply = <&vcc3v3_sys>;
505                 vcc10-supply = <&vcc3v3_sys>;
506                 vcc11-supply = <&vcc3v3_sys>;
507                 vcc12-supply = <&vcc3v3_sys>;
508                 vddio-supply = <&vcc1v8_pmu>;
509
510                 regulators {
511                         vdd_center: DCDC_REG1 {
512                                 regulator-always-on;
513                                 regulator-boot-on;
514                                 regulator-min-microvolt = <750000>;
515                                 regulator-max-microvolt = <1350000>;
516                                 regulator-ramp-delay = <6001>;
517                                 regulator-name = "vdd_center";
518                                 regulator-state-mem {
519                                         regulator-off-in-suspend;
520                                 };
521                         };
522
523                         vdd_cpu_l: DCDC_REG2 {
524                                 regulator-always-on;
525                                 regulator-boot-on;
526                                 regulator-min-microvolt = <750000>;
527                                 regulator-max-microvolt = <1350000>;
528                                 regulator-ramp-delay = <6001>;
529                                 regulator-name = "vdd_cpu_l";
530                                 regulator-state-mem {
531                                         regulator-off-in-suspend;
532                                 };
533                         };
534
535                         vcc_ddr: DCDC_REG3 {
536                                 regulator-always-on;
537                                 regulator-boot-on;
538                                 regulator-name = "vcc_ddr";
539                                 regulator-state-mem {
540                                         regulator-on-in-suspend;
541                                 };
542                         };
543
544                         vcc_1v8: DCDC_REG4 {
545                                 regulator-always-on;
546                                 regulator-boot-on;
547                                 regulator-min-microvolt = <1800000>;
548                                 regulator-max-microvolt = <1800000>;
549                                 regulator-name = "vcc_1v8";
550                                 regulator-state-mem {
551                                         regulator-on-in-suspend;
552                                         regulator-suspend-microvolt = <1800000>;
553                                 };
554                         };
555
556                         vcc1v8_dvp: LDO_REG1 {
557                                 regulator-always-on;
558                                 regulator-boot-on;
559                                 regulator-min-microvolt = <1800000>;
560                                 regulator-max-microvolt = <1800000>;
561                                 regulator-name = "vcc1v8_dvp";
562                                 regulator-state-mem {
563                                         regulator-off-in-suspend;
564                                 };
565                         };
566
567                         vcc3v0_tp: LDO_REG2 {
568                                 regulator-always-on;
569                                 regulator-boot-on;
570                                 regulator-min-microvolt = <3000000>;
571                                 regulator-max-microvolt = <3000000>;
572                                 regulator-name = "vcc3v0_tp";
573                                 regulator-state-mem {
574                                         regulator-off-in-suspend;
575                                 };
576                         };
577
578                         vcc1v8_pmu: LDO_REG3 {
579                                 regulator-always-on;
580                                 regulator-boot-on;
581                                 regulator-min-microvolt = <1800000>;
582                                 regulator-max-microvolt = <1800000>;
583                                 regulator-name = "vcc1v8_pmu";
584                                 regulator-state-mem {
585                                         regulator-on-in-suspend;
586                                         regulator-suspend-microvolt = <1800000>;
587                                 };
588                         };
589
590                         vcc_sd: LDO_REG4 {
591                                 regulator-always-on;
592                                 regulator-boot-on;
593                                 regulator-min-microvolt = <1800000>;
594                                 regulator-max-microvolt = <3300000>;
595                                 regulator-name = "vcc_sd";
596                                 regulator-state-mem {
597                                         regulator-on-in-suspend;
598                                         regulator-suspend-microvolt = <3300000>;
599                                 };
600                         };
601
602                         vcca3v0_codec: LDO_REG5 {
603                                 regulator-always-on;
604                                 regulator-boot-on;
605                                 regulator-min-microvolt = <3000000>;
606                                 regulator-max-microvolt = <3000000>;
607                                 regulator-name = "vcca3v0_codec";
608                                 regulator-state-mem {
609                                         regulator-off-in-suspend;
610                                 };
611                         };
612
613                         vcc_1v5: LDO_REG6 {
614                                 regulator-always-on;
615                                 regulator-boot-on;
616                                 regulator-min-microvolt = <1500000>;
617                                 regulator-max-microvolt = <1500000>;
618                                 regulator-name = "vcc_1v5";
619                                 regulator-state-mem {
620                                         regulator-on-in-suspend;
621                                         regulator-suspend-microvolt = <1500000>;
622                                 };
623                         };
624
625                         vcca1v8_codec: LDO_REG7 {
626                                 regulator-always-on;
627                                 regulator-boot-on;
628                                 regulator-min-microvolt = <1800000>;
629                                 regulator-max-microvolt = <1800000>;
630                                 regulator-name = "vcca1v8_codec";
631                                 regulator-state-mem {
632                                         regulator-off-in-suspend;
633                                 };
634                         };
635
636                         vcc_3v0: LDO_REG8 {
637                                 regulator-always-on;
638                                 regulator-boot-on;
639                                 regulator-min-microvolt = <3000000>;
640                                 regulator-max-microvolt = <3000000>;
641                                 regulator-name = "vcc_3v0";
642                                 regulator-state-mem {
643                                         regulator-on-in-suspend;
644                                         regulator-suspend-microvolt = <3000000>;
645                                 };
646                         };
647
648                         vcc3v3_s3: SWITCH_REG1 {
649                                 regulator-always-on;
650                                 regulator-boot-on;
651                                 regulator-name = "vcc3v3_s3";
652                                 regulator-state-mem {
653                                         regulator-off-in-suspend;
654                                 };
655                         };
656
657                         vcc3v3_s0: SWITCH_REG2 {
658                                 regulator-always-on;
659                                 regulator-boot-on;
660                                 regulator-name = "vcc3v3_s0";
661                                 regulator-state-mem {
662                                         regulator-off-in-suspend;
663                                 };
664                         };
665                 };
666         };
667 };
668
669 &i2c1 {
670         status = "okay";
671         i2c-scl-rising-time-ns = <300>;
672         i2c-scl-falling-time-ns = <15>;
673
674         rt5640: rt5640@1c {
675                 #sound-dai-cells = <0>;
676                 compatible = "realtek,rt5640";
677                 reg = <0x1c>;
678                 clocks = <&cru SCLK_I2S_8CH_OUT>;
679                 clock-names = "mclk";
680                 realtek,in1-differential;
681                 pinctrl-names = "default";
682                 pinctrl-0 = <&rt5640_hpcon>;
683                 hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
684                 //hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
685                 io-channels = <&saradc 4>;
686                 hp-det-adc-value = <500>;
687         };
688 };
689
690 &i2c3 {
691         status = "okay";
692         i2c-scl-rising-time-ns = <450>;
693         i2c-scl-falling-time-ns = <15>;
694 };
695
696 &i2c4 {
697         status = "okay";
698         i2c-scl-rising-time-ns = <475>;
699         i2c-scl-falling-time-ns = <26>;
700
701         fusb0: fusb30x@22 {
702                 compatible = "fairchild,fusb302";
703                 reg = <0x22>;
704                 pinctrl-names = "default";
705                 pinctrl-0 = <&fusb0_int>;
706                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
707                 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
708                 status = "okay";
709         };
710
711     gsl3680: gsl3680@41 {
712               status = "okay";
713               compatible = "gslX680-pad";
714               reg = <0x41>;
715               screen_max_x = <1536>;
716               screen_max_y = <2048>;
717               touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
718               reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
719       };
720
721         mpu6050:mpu@68{
722             compatible = "invensense,mpu6050";
723             reg = <0x68>;
724             mpu-int_config = <0x10>;
725             mpu-level_shifter = <0>;
726             mpu-orientation = <0 1 0 1 0 0 0 0 1>;
727             orientation-x= <1>;
728             orientation-y= <1>;
729             orientation-z= <1>;
730             irq-gpio = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>;
731             mpu-debug = <1>;
732         };
733 };
734
735 &i2s0 {
736         status = "okay";
737         rockchip,i2s-broken-burst-len;
738         rockchip,playback-channels = <8>;
739         rockchip,capture-channels = <8>;
740         assigned-clocks = <&cru SCLK_I2S0_DIV>, <&cru SCLK_I2S_8CH>;
741         assigned-clock-parents = <&cru PLL_GPLL>, <&cru SCLK_I2S0_8CH>;
742         #sound-dai-cells = <0>;
743 };
744
745 &i2s1 {
746         status = "okay";
747         rockchip,i2s-broken-burst-len;
748         rockchip,playback-channels = <2>;
749         rockchip,capture-channels = <2>;
750         assigned-clocks = <&cru SCLK_I2S1_DIV>, <&cru SCLK_I2S_8CH>;
751         assigned-clock-parents = <&cru PLL_GPLL>, <&cru SCLK_I2S1_8CH>;
752         #sound-dai-cells = <0>;
753 };
754
755 &i2s2 {
756         #sound-dai-cells = <0>;
757         status = "okay";
758 };
759
760 &io_domains {
761         status = "okay";
762
763         bt656-supply = <&vcc1v8_dvp>;           /* bt656_gpio2ab_ms */
764         audio-supply = <&vcca1v8_codec>;        /* audio_gpio3d4a_ms */
765         sdmmc-supply = <&vcc_sd>;               /* sdmmc_gpio4b_ms */
766         gpio1830-supply = <&vcc_3v0>;           /* gpio1833_gpio4cd_ms */
767 };
768
769 &pcie_phy {
770         status = "okay";
771 };
772
773 &pcie0 {
774         ep-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
775         num-lanes = <4>;
776         pinctrl-names = "default";
777         pinctrl-0 = <&pcie_clkreqn_cpm>;
778         status = "okay";
779 };
780
781 &pmu_io_domains {
782         status = "okay";
783         pmu1830-supply = <&vcc_3v0>;
784 };
785
786 &pinctrl {
787         buttons {
788                 pwrbtn: pwrbtn {
789                         rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
790                 };
791         };
792
793         lcd-panel {
794                 lcd_panel_reset: lcd-panel-reset {
795                         rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_up>;
796                 };
797
798                 lcd_en: lcd-en {
799                         rockchip,pins = <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
800                 };
801         };
802
803         pcie {
804                 pcie_drv: pcie-drv {
805                         rockchip,pins =
806                                 <1 17 RK_FUNC_GPIO &pcfg_pull_none>;
807                         };
808                         pcie_3g_drv: pcie-3g-drv {
809                         rockchip,pins =
810                                 <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
811                 };
812
813         };
814
815         pmic {
816                 vsel1_gpio: vsel1-gpio {
817                         rockchip,pins =
818                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
819                 };
820
821                 vsel2_gpio: vsel2-gpio {
822                         rockchip,pins =
823                         <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
824                 };
825         };
826
827         sdio-pwrseq {
828                 wifi_enable_h: wifi-enable-h {
829                         rockchip,pins =
830                                 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
831                 };
832         };
833
834         wireless-bluetooth {
835                 uart0_gpios: uart0-gpios {
836                         rockchip,pins =
837                                 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
838                 };
839         };
840
841         leds {
842                 led_power: led-power {
843                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
844                 };
845
846                 led_user: led-user {
847                         rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_none>;
848                 };
849         };
850
851         rt5640 {
852                 rt5640_hpcon: rt5640-hpcon {
853                         rockchip,pins = <4 21 RK_FUNC_GPIO &pcfg_pull_none>;
854                 };
855         };
856
857         pmic {
858                 pmic_int_l: pmic-int-l {
859                         rockchip,pins =
860                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
861                 };
862
863                 pmic_dvs2: pmic-dvs2 {
864                         rockchip,pins =
865                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
866                 };
867         };
868
869         usb2 {
870                 host_vbus_drv: host-vbus-drv {
871                         rockchip,pins =
872                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
873                 };
874         };
875
876         fusb30x {
877                 fusb0_int: fusb0-int {
878                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
879                 };
880         };
881 };
882
883 &pwm0 {
884         status = "okay";
885 };
886
887 &pwm2 {
888         status = "okay";
889 };
890
891 &rkvdec {
892         status = "okay";
893 };
894
895 &rockchip_suspend {
896         rockchip,power-ctrl =
897                 <&gpio1 18 GPIO_ACTIVE_LOW>,
898                 <&gpio1 14 GPIO_ACTIVE_HIGH>;
899 };
900
901 &route_edp {
902         status = "okay";
903 };
904
905 &route_hdmi {
906         status = "okay";
907         logo,mode = "center";
908 };
909
910 &saradc {
911         status = "okay";
912         vref-supply = <&vccadc_ref>;
913 };
914
915 &sdhci {
916         bus-width = <8>;
917         keep-power-in-suspend;
918         mmc-hs400-1_8v;
919         mmc-hs400-enhanced-strobe;
920         non-removable;
921         status = "okay";
922         supports-emmc;
923 };
924
925 &sdmmc {
926         max-frequency = <150000000>;
927         supports-sd;
928         bus-width = <4>;
929         cap-mmc-highspeed;
930         cap-sd-highspeed;
931         disable-wp;
932         num-slots = <1>;
933         vqmmc-supply = <&vcc_sd>;
934         pinctrl-names = "default";
935         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
936         status = "okay";
937 };
938
939 &sdio0 {
940         max-frequency = <50000000>;
941         supports-sdio;
942         bus-width = <4>;
943         disable-wp;
944         cap-sd-highspeed;
945         keep-power-in-suspend;
946         mmc-pwrseq = <&sdio_pwrseq>;
947         non-removable;
948         num-slots = <1>;
949         pinctrl-names = "default";
950         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
951         sd-uhs-sdr104;
952         status = "okay";
953 };
954
955 &spdif {
956         status = "okay";
957         pinctrl-0 = <&spdif_bus_1>;
958         i2c-scl-rising-time-ns = <450>;
959         i2c-scl-falling-time-ns = <15>;
960         #sound-dai-cells = <0>;
961 };
962
963 &tcphy0 {
964         extcon = <&fusb0>;
965         status = "okay";
966 };
967
968 &tcphy1 {
969         status = "okay";
970 };
971
972 &tsadc {
973         /* tshut mode 0:CRU 1:GPIO */
974         rockchip,hw-tshut-mode = <1>;
975         /* tshut polarity 0:LOW 1:HIGH */
976         rockchip,hw-tshut-polarity = <1>;
977         status = "okay";
978 };
979
980 &u2phy0 {
981         status = "okay";
982         extcon = <&fusb0>;
983
984         u2phy0_otg: otg-port {
985                 status = "okay";
986         };
987
988         u2phy0_host: host-port {
989                 phy-supply = <&vcc5v0_host>;
990                 status = "okay";
991         };
992 };
993
994 &u2phy1 {
995         status = "okay";
996
997         u2phy1_otg: otg-port {
998                 status = "okay";
999         };
1000
1001         u2phy1_host: host-port {
1002                 phy-supply = <&vcc5v0_host>;
1003                 status = "okay";
1004         };
1005 };
1006
1007 &pwm3 {
1008         status = "okay";
1009         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
1010         compatible = "rockchip,remotectl-pwm";
1011         remote_pwm_id = <3>;
1012         handle_cpu_id = <0>;
1013
1014     ir_key1{
1015         rockchip,usercode = <0xff00>;
1016         rockchip,key_table =
1017             <0xeb   KEY_POWER>,
1018             <0xec   KEY_COMPOSE>,
1019             <0xfe   KEY_BACK>,
1020             <0xb7   KEY_HOME>,
1021             <0xa3   KEY_WWW>,
1022             <0xf4   KEY_VOLUMEUP>,
1023             <0xa7   KEY_VOLUMEDOWN>,
1024             <0xf8   KEY_ENTER>,
1025             <0xfc   KEY_UP>,
1026             <0xfd   KEY_DOWN>,
1027             <0xf1   KEY_LEFT>,
1028             <0xe5   KEY_RIGHT>;
1029     };
1030 };
1031
1032 &uart0 {
1033         pinctrl-names = "default";
1034         pinctrl-0 = <&uart0_xfer &uart0_cts>;
1035         status = "okay";
1036 };
1037
1038 &uart2 {
1039         status = "okay";
1040 };
1041
1042 &usbdrd3_0 {
1043         status = "okay";
1044         extcon = <&fusb0>;
1045 };
1046
1047 &usbdrd3_1 {
1048         status = "okay";
1049 };
1050
1051 &usbdrd_dwc3_0 {
1052         status = "okay";
1053 };
1054
1055 &usbdrd_dwc3_1 {
1056         status = "okay";
1057         dr_mode = "host";
1058 };
1059
1060 &usb_host0_ehci {
1061         status = "okay";
1062 };
1063
1064 &usb_host0_ohci {
1065         status = "okay";
1066 };
1067
1068 &usb_host1_ehci {
1069         status = "okay";
1070 };
1071
1072 &usb_host1_ohci {
1073         status = "okay";
1074 };
1075
1076 &vopb {
1077         status = "okay";
1078 };
1079
1080 &vopb_mmu {
1081         status = "okay";
1082 };
1083
1084 &vopl {
1085         status = "okay";
1086 };
1087
1088 &vopl_mmu {
1089         status = "okay";
1090 };
1091
1092 &vpu {
1093         status = "okay";
1094         /* 0 means ion, 1 means drm */
1095         //allocator = <0>;
1096 };