arch/arm64/boot/dts/rockchip/rk3399-firefly-aio-linux.dts

   1 /*
   2  * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 /dts-v1/;
  44
  45 #include "dt-bindings/pwm/pwm.h"
  46 #include "rk3399.dtsi"
  47 #include "rk3399-opp.dtsi"
  48 #include "rk3399-linux.dtsi"
  49 #include <dt-bindings/input/input.h>
  50
  51 / {
  52         model = "Rockchip RK3399 Firefly Board (Linux Opensource)";
  53         compatible = "rockchip,rk3399-firefly-linux", "rockchip,rk3399";
  54
  55         backlight: backlight {
  56                 status = "disabled";
  57                 compatible = "pwm-backlight";
  58                 pwms = <&pwm1 0 25000 0>;
  59                 brightness-levels = <
  60                           0   1   2   3   4   5   6   7
  61                           8   9  10  11  12  13  14  15
  62                          16  17  18  19  20  21  22  23
  63                          24  25  26  27  28  29  30  31
  64                          32  33  34  35  36  37  38  39
  65                          40  41  42  43  44  45  46  47
  66                          48  49  50  51  52  53  54  55
  67                          56  57  58  59  60  61  62  63
  68                          64  65  66  67  68  69  70  71
  69                          72  73  74  75  76  77  78  79
  70                          80  81  82  83  84  85  86  87
  71                          88  89  90  91  92  93  94  95
  72                          96  97  98  99 100 101 102 103
  73                         104 105 106 107 108 109 110 111
  74                         112 113 114 115 116 117 118 119
  75                         120 121 122 123 124 125 126 127
  76                         128 129 130 131 132 133 134 135
  77                         136 137 138 139 140 141 142 143
  78                         144 145 146 147 148 149 150 151
  79                         152 153 154 155 156 157 158 159
  80                         160 161 162 163 164 165 166 167
  81                         168 169 170 171 172 173 174 175
  82                         176 177 178 179 180 181 182 183
  83                         184 185 186 187 188 189 190 191
  84                         192 193 194 195 196 197 198 199
  85                         200 201 202 203 204 205 206 207
  86                         208 209 210 211 212 213 214 215
  87                         216 217 218 219 220 221 222 223
  88                         224 225 226 227 228 229 230 231
  89                         232 233 234 235 236 237 238 239
  90                         240 241 242 243 244 245 246 247
  91                         248 249 250 251 252 253 254 255>;
  92                 default-brightness-level = <200>;
  93         };
  94
  95         clkin_gmac: external-gmac-clock {
  96                 compatible = "fixed-clock";
  97                 clock-frequency = <125000000>;
  98                 clock-output-names = "clkin_gmac";
  99                 #clock-cells = <0>;
 100         };
 101
 102         dw_hdmi_audio: dw-hdmi-audio {
 103                 status = "disabled";
 104                 compatible = "rockchip,dw-hdmi-audio";
 105                 #sound-dai-cells = <0>;
 106         };
 107
 108         edp_panel: edp-panel {
 109                 status = "disabled";
 110                 compatible = "sharp,lcd-f402", "panel-simple";
 111                 backlight = <&backlight>;
 112                 power-supply = <&vcc_lcd>;
 113                 enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
 114                 pinctrl-names = "default";
 115                 pinctrl-0 = <&lcd_panel_reset>;
 116
 117                 ports {
 118                         panel_in_edp: endpoint {
 119                                 remote-endpoint = <&edp_out_panel>;
 120                         };
 121                 };
 122         };
 123
 124         fiq_debugger: fiq-debugger {
 125                 compatible = "rockchip,fiq-debugger";
 126                 rockchip,serial-id = <2>;
 127                 rockchip,signal-irq = <182>;
 128                 rockchip,wake-irq = <0>;
 129                 rockchip,irq-mode-enable = <1>;  /* If enable uart uses irq instead of fiq */
 130                 rockchip,baudrate = <1500000>;  /* Only 115200 and 1500000 */
 131                 pinctrl-names = "default";
 132                 pinctrl-0 = <&uart2c_xfer>;
 133         };
 134
 135         gpio-keys {
 136                 compatible = "gpio-keys";
 137                 #address-cells = <1>;
 138                 #size-cells = <0>;
 139                 autorepeat;
 140
 141                 pinctrl-names = "default";
 142                 pinctrl-0 = <&pwrbtn>;
 143
 144                 button@0 {
 145                         gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
 146                         linux,code = <KEY_POWER>;
 147                         label = "GPIO Key Power";
 148                         linux,input-type = <1>;
 149                         gpio-key,wakeup = <1>;
 150                         debounce-interval = <100>;
 151                 };
 152         };
 153
 154         rt5640-sound {
 155                 compatible = "simple-audio-card";
 156                 simple-audio-card,format = "i2s";
 157                 simple-audio-card,name = "rockchip,rt5640-codec";
 158                 simple-audio-card,mclk-fs = <256>;
 159                 simple-audio-card,widgets =
 160                         "Microphone", "Mic Jack",
 161                         "Headphone", "Headphone Jack";
 162                 simple-audio-card,routing =
 163                         "Mic Jack", "MICBIAS1",
 164                         "IN1P", "Mic Jack",
 165                         "Headphone Jack", "HPOL",
 166                         "Headphone Jack", "HPOR";
 167                 simple-audio-card,cpu {
 168                         sound-dai = <&i2s1>;
 169                 };
 170                 simple-audio-card,codec {
 171                         sound-dai = <&rt5640>;
 172                 };
 173         };
 174
 175         hdmi_sound: hdmi-sound {
 176                 status = "disabled";
 177                 compatible = "simple-audio-card";
 178                 simple-audio-card,format = "i2s";
 179                 simple-audio-card,mclk-fs = <256>;
 180                 simple-audio-card,name = "rockchip,hdmi";
 181
 182                 simple-audio-card,cpu {
 183                         sound-dai = <&i2s2>;
 184                 };
 185                 simple-audio-card,codec {
 186                         sound-dai = <&dw_hdmi_audio>;
 187                 };
 188         };
 189
 190         hdmi_codec: hdmi-codec {
 191                 compatible = "simple-audio-card";
 192                 simple-audio-card,format = "i2s";
 193                 simple-audio-card,mclk-fs = <256>;
 194                 simple-audio-card,name = "HDMI-CODEC";
 195
 196                 simple-audio-card,cpu {
 197                         sound-dai = <&i2s2>;
 198                 };
 199
 200                 simple-audio-card,codec {
 201                         sound-dai = <&hdmi>;
 202                 };
 203         };
 204
 205         spdif-sound {
 206                 status = "okay";
 207                 compatible = "simple-audio-card";
 208                 simple-audio-card,name = "ROCKCHIP,SPDIF";
 209                 simple-audio-card,cpu {
 210                         sound-dai = <&spdif>;
 211                 };
 212                 simple-audio-card,codec {
 213                         sound-dai = <&spdif_out>;
 214                 };
 215         };
 216
 217         spdif_out: spdif-out {
 218                 status = "okay";
 219                 compatible = "linux,spdif-dit";
 220                 #sound-dai-cells = <0>;
 221         };
 222
 223         sdio_pwrseq: sdio-pwrseq {
 224                 compatible = "mmc-pwrseq-simple";
 225                 clocks = <&rk808 1>;
 226                 clock-names = "ext_clock";
 227                 pinctrl-names = "default";
 228                 pinctrl-0 = <&wifi_enable_h>;
 229
 230                 /*
 231                  * On the module itself this is one of these (depending
 232                  * on the actual card populated):
 233                  * - SDIO_RESET_L_WL_REG_ON
 234                  * - PDN (power down when low)
 235                  */
 236                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
 237         };
 238
 239         vcc3v3_pcie: vcc3v3-pcie-regulator {
 240                 compatible = "regulator-fixed";
 241                 enable-active-high;
 242                 regulator-always-on;
 243                 regulator-boot-on;
 244                 //gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 245                 gpio = <&gpio2 2 GPIO_ACTIVE_HIGH>;
 246                 pinctrl-names = "default";
 247                 pinctrl-0 = <&pcie_drv>;
 248                 regulator-name = "vcc3v3_pcie";
 249         };
 250
 251         vcc3v3_3g: vcc3v3-3g-regulator {
 252                 compatible = "regulator-fixed";
 253                 enable-active-high;
 254                 regulator-always-on;
 255                 regulator-boot-on;
 256                 gpio = <&gpio2 6 GPIO_ACTIVE_HIGH>;
 257                 pinctrl-names = "default";
 258                 pinctrl-0 = <&pcie_3g_drv>;
 259                 regulator-name = "vcc3v3_3g";
 260     };
 261
 262         vcc3v3_sys: vcc3v3-sys {
 263                 compatible = "regulator-fixed";
 264                 regulator-name = "vcc3v3_sys";
 265                 regulator-always-on;
 266                 regulator-boot-on;
 267                 regulator-min-microvolt = <3300000>;
 268                 regulator-max-microvolt = <3300000>;
 269         };
 270
 271         vcc5v0_host: vcc5v0-host-regulator {
 272                 compatible = "regulator-fixed";
 273                 enable-active-high;
 274                 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
 275                 pinctrl-names = "default";
 276                 pinctrl-0 = <&host_vbus_drv>;
 277                 regulator-name = "vcc5v0_host";
 278                 regulator-always-on;
 279         };
 280
 281     vbus_5v: vbus-5v-regulator {
 282                 compatible = "regulator-fixed";
 283                 enable-active-high;
 284                 regulator-always-on;
 285                 regulator-boot-on;
 286                 gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
 287                 pinctrl-names = "default";
 288                 pinctrl-0 = <&vbus_5v_drv>;
 289                 regulator-name = "vbus_5v";
 290     };
 291
 292         vcc5v0_sys: vcc5v0-sys {
 293                 compatible = "regulator-fixed";
 294                 regulator-name = "vcc5v0_sys";
 295                 regulator-always-on;
 296                 regulator-boot-on;
 297                 regulator-min-microvolt = <5000000>;
 298                 regulator-max-microvolt = <5000000>;
 299         };
 300
 301         vcc_phy: vcc-phy-regulator {
 302                 compatible = "regulator-fixed";
 303                 regulator-name = "vcc_phy";
 304                 regulator-always-on;
 305                 regulator-boot-on;
 306         };
 307
 308         vdd_log: vdd-log {
 309                 compatible = "pwm-regulator";
 310                 pwms = <&pwm2 0 25000 1>;
 311                 regulator-name = "vdd_log";
 312                 regulator-min-microvolt = <800000>;
 313                 regulator-max-microvolt = <1100000>;
 314                 regulator-always-on;
 315                 regulator-boot-on;
 316
 317                 /* for rockchip boot on */
 318                 rockchip,pwm_id= <2>;
 319                 rockchip,pwm_voltage = <1000000>;
 320         };
 321
 322         vccadc_ref: vccadc-ref {
 323                 compatible = "regulator-fixed";
 324                 regulator-name = "vcc1v8_sys";
 325                 regulator-always-on;
 326                 regulator-boot-on;
 327                 regulator-min-microvolt = <1800000>;
 328                 regulator-max-microvolt = <1800000>;
 329         };
 330
 331         vcc_lcd: vcc-lcd-regulator {
 332                 compatible = "regulator-fixed";
 333                 regulator-always-on;
 334                 regulator-boot-on;
 335                 enable-active-high;
 336                 gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
 337                 pinctrl-names = "default";
 338                 pinctrl-0 = <&lcd_en>;
 339                 regulator-name = "vcc_lcd";
 340         };
 341
 342         wireless-wlan {
 343                 compatible = "wlan-platdata";
 344                 rockchip,grf = <&grf>;
 345                 wifi_chip_type = "ap6354";
 346                 sdio_vref = <1800>;
 347                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
 348                 status = "okay";
 349         };
 350
 351         wireless-bluetooth {
 352                 compatible = "bluetooth-platdata";
 353                 //wifi-bt-power-toggle;
 354                 clocks = <&rk808 1>;
 355                 clock-names = "ext_clock";
 356                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
 357                 pinctrl-names = "default", "rts_gpio";
 358                 pinctrl-0 = <&uart0_rts>;
 359                 pinctrl-1 = <&uart0_gpios>;
 360                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
 361                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
 362                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
 363                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
 364                 status = "okay";
 365         };
 366
 367     leds {
 368        compatible = "gpio-leds";
 369        power {
 370            label = "firefly:blue:power";
 371            linux,default-trigger = "ir-power-click";
 372            default-state = "on";
 373            gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
 374            pinctrl-names = "default";
 375            pinctrl-0 = <&led_power>;
 376        };
 377        user {
 378            label = "firefly:yellow:user";
 379            linux,default-trigger = "ir-user-click";
 380            default-state = "off";
 381            gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
 382            pinctrl-names = "default";
 383            pinctrl-0 = <&led_user>;
 384        };
 385    };
 386 };
 387
 388 &dsi {
 389         status = "disabled";
 390         dsi_panel: panel {
 391                 compatible ="simple-panel-dsi";
 392                 reg = <0>;
 393                 backlight = <&backlight>;
 394                 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST)>;
 395                 dsi,format = <MIPI_DSI_FMT_RGB888>;
 396                 //bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
 397                 dsi,lanes = <4>;
 398                 /*
 399                 dsi,channel = <0>;
 400                 delay,enable = <35>;
 401                 delay,prepare = <6>;
 402                 delay,unprepare = <0>;
 403                 delay,disable = <20>;
 404                 size,width = <120>;
 405                 size,height = <170>;
 406                 */
 407                 status = "disabled";
 408
 409                 panel-init-sequence = [
 410                         05 20 01 29
 411                         05 96 01 11
 412                 ];
 413
 414                 panel-exit-sequence = [
 415                                 05 05 01 28
 416                                 05 78 01 10
 417                 ];
 418
 419                 disp_timings: display-timings {
 420                         native-mode = <&timing0>;
 421                         timing0: timing0 {
 422                            clock-frequency = <64000000>;
 423                            hactive = <768>;
 424                            vactive = <1024>;
 425                            hsync-len = <5>;   //20, 50
 426                            hback-porch = <25>; //50, 56
 427                            hfront-porch = <150>;//50, 30
 428                            vsync-len = <1>;
 429                            vback-porch = <15>;
 430                            vfront-porch = <100>;
 431                            hsync-active = <0>;
 432                            vsync-active = <0>;
 433                            de-active = <0>;
 434                            pixelclk-active = <0>;
 435                         };
 436                 };
 437         };
 438 };
 439
 440 &cpu_l0 {
 441         cpu-supply = <&vdd_cpu_l>;
 442 };
 443
 444 &cpu_l1 {
 445         cpu-supply = <&vdd_cpu_l>;
 446 };
 447
 448 &cpu_l2 {
 449         cpu-supply = <&vdd_cpu_l>;
 450 };
 451
 452 &cpu_l3 {
 453         cpu-supply = <&vdd_cpu_l>;
 454 };
 455
 456 &cpu_b0 {
 457         cpu-supply = <&vdd_cpu_b>;
 458 };
 459
 460 &cpu_b1 {
 461         cpu-supply = <&vdd_cpu_b>;
 462 };
 463
 464 &display_subsystem {
 465         status = "okay";
 466 };
 467
 468 &edp {
 469         status = "disabled";
 470
 471         ports {
 472                 edp_out: port@1 {
 473                         reg = <1>;
 474                         #address-cells = <1>;
 475                         #size-cells = <0>;
 476
 477                         edp_out_panel: endpoint@0 {
 478                                 reg = <0>;
 479                                 remote-endpoint = <&panel_in_edp>;
 480                         };
 481                 };
 482         };
 483 };
 484
 485 &emmc_phy {
 486         status = "okay";
 487 };
 488
 489 &gmac {
 490         phy-supply = <&vcc_phy>;
 491         phy-mode = "rgmii";
 492         clock_in_out = "input";
 493         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
 494         snps,reset-active-low;
 495         snps,reset-delays-us = <0 10000 50000>;
 496         assigned-clocks = <&cru SCLK_RMII_SRC>;
 497         assigned-clock-parents = <&clkin_gmac>;
 498         pinctrl-names = "default";
 499         pinctrl-0 = <&rgmii_pins>;
 500         tx_delay = <0x28>;
 501         rx_delay = <0x1B>;
 502         status = "okay";
 503 };
 504
 505 &gpu {
 506         status = "okay";
 507         mali-supply = <&vdd_gpu>;
 508 };
 509
 510 &hdmi {
 511         #address-cells = <1>;
 512         #size-cells = <0>;
 513         #sound-dai-cells = <0>;
 514         status = "okay";
 515 };
 516
 517 &i2c0 {
 518         status = "okay";
 519         i2c-scl-rising-time-ns = <168>;
 520         i2c-scl-falling-time-ns = <4>;
 521         clock-frequency = <400000>;
 522
 523         vdd_cpu_b: syr827@40 {
 524                 compatible = "silergy,syr827";
 525                 reg = <0x40>;
 526                 vin-supply = <&vcc5v0_sys>;
 527                 regulator-compatible = "fan53555-reg";
 528                 regulator-name = "vdd_cpu_b";
 529                 regulator-min-microvolt = <712500>;
 530                 regulator-max-microvolt = <1500000>;
 531                 regulator-ramp-delay = <1000>;
 532                 vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
 533                 fcs,suspend-voltage-selector = <1>;
 534                 regulator-always-on;
 535                 regulator-boot-on;
 536                 regulator-initial-state = <3>;
 537                         regulator-state-mem {
 538                         regulator-off-in-suspend;
 539                 };
 540         };
 541
 542         vdd_gpu: syr828@41 {
 543                 compatible = "silergy,syr828";
 544                 reg = <0x41>;
 545                 vin-supply = <&vcc5v0_sys>;
 546                 regulator-compatible = "fan53555-reg";
 547                 regulator-name = "vdd_gpu";
 548                 pinctrl-0 = <&vsel2_gpio>;
 549                 vsel-gpios = <&gpio1 14 0>;
 550                 regulator-min-microvolt = <712500>;
 551                 regulator-max-microvolt = <1500000>;
 552                 regulator-ramp-delay = <1000>;
 553                 fcs,suspend-voltage-selector = <1>;
 554                 regulator-always-on;
 555                 regulator-boot-on;
 556                 regulator-initial-state = <3>;
 557                         regulator-state-mem {
 558                         regulator-off-in-suspend;
 559                 };
 560         };
 561
 562         rk808: pmic@1b {
 563                 compatible = "rockchip,rk808";
 564                 reg = <0x1b>;
 565                 interrupt-parent = <&gpio1>;
 566                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 567                 pmic,stby-gpio = <&gpio1 24 GPIO_ACTIVE_LOW>;
 568                 pmic,hold-gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
 569                 pinctrl-names = "default";
 570                 pinctrl-0 = <&pmic_int_l &pmic_dvs2 &pmic_stby &pmic_hold>;
 571                 rockchip,system-power-controller;
 572                 wakeup-source;
 573                 #clock-cells = <1>;
 574                 clock-output-names = "xin32k", "rk808-clkout2";
 575
 576                 vcc1-supply = <&vcc3v3_sys>;
 577                 vcc2-supply = <&vcc3v3_sys>;
 578                 vcc3-supply = <&vcc3v3_sys>;
 579                 vcc4-supply = <&vcc3v3_sys>;
 580                 vcc6-supply = <&vcc3v3_sys>;
 581                 vcc7-supply = <&vcc3v3_sys>;
 582                 vcc8-supply = <&vcc3v3_sys>;
 583                 vcc9-supply = <&vcc3v3_sys>;
 584                 vcc10-supply = <&vcc3v3_sys>;
 585                 vcc11-supply = <&vcc3v3_sys>;
 586                 vcc12-supply = <&vcc3v3_sys>;
 587                 vddio-supply = <&vcc1v8_pmu>;
 588
 589                 regulators {
 590                         vdd_center: DCDC_REG1 {
 591                                 regulator-always-on;
 592                                 regulator-boot-on;
 593                                 regulator-min-microvolt = <750000>;
 594                                 regulator-max-microvolt = <1350000>;
 595                                 regulator-ramp-delay = <6001>;
 596                                 regulator-name = "vdd_center";
 597                                 regulator-state-mem {
 598                                         regulator-off-in-suspend;
 599                                 };
 600                         };
 601
 602                         vdd_cpu_l: DCDC_REG2 {
 603                                 regulator-always-on;
 604                                 regulator-boot-on;
 605                                 regulator-min-microvolt = <750000>;
 606                                 regulator-max-microvolt = <1350000>;
 607                                 regulator-ramp-delay = <6001>;
 608                                 regulator-name = "vdd_cpu_l";
 609                                 regulator-state-mem {
 610                                         regulator-off-in-suspend;
 611                                 };
 612                         };
 613
 614                         vcc_ddr: DCDC_REG3 {
 615                                 regulator-always-on;
 616                                 regulator-boot-on;
 617                                 regulator-name = "vcc_ddr";
 618                                 regulator-state-mem {
 619                                         regulator-on-in-suspend;
 620                                 };
 621                         };
 622
 623                         vcc_1v8: DCDC_REG4 {
 624                                 regulator-always-on;
 625                                 regulator-boot-on;
 626                                 regulator-min-microvolt = <1800000>;
 627                                 regulator-max-microvolt = <1800000>;
 628                                 regulator-name = "vcc_1v8";
 629                                 regulator-state-mem {
 630                                         regulator-on-in-suspend;
 631                                         regulator-suspend-microvolt = <1800000>;
 632                                 };
 633                         };
 634
 635                         vcc1v8_dvp: LDO_REG1 {
 636                                 regulator-always-on;
 637                                 regulator-boot-on;
 638                                 regulator-min-microvolt = <1800000>;
 639                                 regulator-max-microvolt = <1800000>;
 640                                 regulator-name = "vcc1v8_dvp";
 641                                 regulator-state-mem {
 642                                         regulator-off-in-suspend;
 643                                 };
 644                         };
 645
 646                         vcc3v0_tp: LDO_REG2 {
 647                                 regulator-always-on;
 648                                 regulator-boot-on;
 649                                 regulator-min-microvolt = <3000000>;
 650                                 regulator-max-microvolt = <3000000>;
 651                                 regulator-name = "vcc3v0_tp";
 652                                 regulator-state-mem {
 653                                         regulator-off-in-suspend;
 654                                 };
 655                         };
 656
 657                         vcc1v8_pmu: LDO_REG3 {
 658                                 regulator-always-on;
 659                                 regulator-boot-on;
 660                                 regulator-min-microvolt = <1800000>;
 661                                 regulator-max-microvolt = <1800000>;
 662                                 regulator-name = "vcc1v8_pmu";
 663                                 regulator-state-mem {
 664                                         regulator-on-in-suspend;
 665                                         regulator-suspend-microvolt = <1800000>;
 666                                 };
 667                         };
 668
 669                         vcc_sd: LDO_REG4 {
 670                                 regulator-always-on;
 671                                 regulator-boot-on;
 672                                 regulator-min-microvolt = <1800000>;
 673                                 regulator-max-microvolt = <3300000>;
 674                                 regulator-name = "vcc_sd";
 675                                 regulator-state-mem {
 676                                         regulator-on-in-suspend;
 677                                         regulator-suspend-microvolt = <3300000>;
 678                                 };
 679                         };
 680
 681                         vcca3v0_codec: LDO_REG5 {
 682                                 regulator-always-on;
 683                                 regulator-boot-on;
 684                                 regulator-min-microvolt = <3000000>;
 685                                 regulator-max-microvolt = <3000000>;
 686                                 regulator-name = "vcca3v0_codec";
 687                                 regulator-state-mem {
 688                                         regulator-off-in-suspend;
 689                                 };
 690                         };
 691
 692                         vcc_1v5: LDO_REG6 {
 693                                 regulator-always-on;
 694                                 regulator-boot-on;
 695                                 regulator-min-microvolt = <1500000>;
 696                                 regulator-max-microvolt = <1500000>;
 697                                 regulator-name = "vcc_1v5";
 698                                 regulator-state-mem {
 699                                         regulator-on-in-suspend;
 700                                         regulator-suspend-microvolt = <1500000>;
 701                                 };
 702                         };
 703
 704                         vcca1v8_codec: LDO_REG7 {
 705                                 regulator-always-on;
 706                                 regulator-boot-on;
 707                                 regulator-min-microvolt = <1800000>;
 708                                 regulator-max-microvolt = <1800000>;
 709                                 regulator-name = "vcca1v8_codec";
 710                                 regulator-state-mem {
 711                                         regulator-off-in-suspend;
 712                                 };
 713                         };
 714
 715                         vcc_3v0: LDO_REG8 {
 716                                 regulator-always-on;
 717                                 regulator-boot-on;
 718                                 regulator-min-microvolt = <3000000>;
 719                                 regulator-max-microvolt = <3000000>;
 720                                 regulator-name = "vcc_3v0";
 721                                 regulator-state-mem {
 722                                         regulator-on-in-suspend;
 723                                         regulator-suspend-microvolt = <3000000>;
 724                                 };
 725                         };
 726
 727                         vcc3v3_s3: SWITCH_REG1 {
 728                                 regulator-always-on;
 729                                 regulator-boot-on;
 730                                 regulator-name = "vcc3v3_s3";
 731                                 regulator-state-mem {
 732                                         regulator-off-in-suspend;
 733                                 };
 734                         };
 735
 736                         vcc3v3_s0: SWITCH_REG2 {
 737                                 regulator-always-on;
 738                                 regulator-boot-on;
 739                                 regulator-name = "vcc3v3_s0";
 740                                 regulator-state-mem {
 741                                         regulator-off-in-suspend;
 742                                 };
 743                         };
 744                 };
 745         };
 746 };
 747
 748 &vdd_cpu_b {
 749     /delete-property/ vsel-gpios;  //wk2xxx reset pin
 750 };
 751
 752 &i2c1 {
 753         status = "okay";
 754         i2c-scl-rising-time-ns = <300>;
 755         i2c-scl-falling-time-ns = <15>;
 756
 757         rt5640: rt5640@1c {
 758                 #sound-dai-cells = <0>;
 759                 compatible = "realtek,rt5640";
 760                 reg = <0x1c>;
 761                 clocks = <&cru SCLK_I2S_8CH_OUT>;
 762                 clock-names = "mclk";
 763                 realtek,in1-differential;
 764                 pinctrl-names = "default";
 765                 pinctrl-0 = <&rt5640_hpcon>;
 766                 hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
 767                 //hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
 768                 aux-det-gpio = <&gpio2 0 GPIO_ACTIVE_LOW>;
 769                 io-channels = <&saradc 4>;
 770                 hp-det-adc-value = <500>;
 771         };
 772 };
 773
 774 &i2c3 {
 775         status = "okay";
 776         i2c-scl-rising-time-ns = <450>;
 777         i2c-scl-falling-time-ns = <15>;
 778 };
 779
 780 &i2c4 {
 781         status = "okay";
 782         i2c-scl-rising-time-ns = <475>;
 783         i2c-scl-falling-time-ns = <26>;
 784
 785         fusb0: fusb30x@22 {
 786                 status = "disabled";
 787                 compatible = "fairchild,fusb302";
 788                 reg = <0x22>;
 789                 pinctrl-names = "default";
 790                 pinctrl-0 = <&fusb0_int>;
 791                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 792                 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
 793         };
 794
 795         gsl3680: gsl3680@40 {
 796                 status = "disabled";
 797                 compatible = "gslX680";
 798                 reg = <0x40>;
 799                 screen_max_x = <2048>;
 800                 screen_max_y = <1536>;
 801                 revert_xy = <1>;
 802                 revert_x = <1>;
 803                 revert_y = <0>;
 804                 touch-gpio = <&gpio4 28 IRQ_TYPE_LEVEL_LOW>;
 805                 reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
 806     };
 807
 808         mpu6050:mpu@68{
 809                 status = "disabled";
 810                 compatible = "invensense,mpu6050";
 811                 reg = <0x68>;
 812                 mpu-int_config = <0x10>;
 813                 mpu-level_shifter = <0>;
 814                 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
 815                 orientation-x= <1>;
 816                 orientation-y= <1>;
 817                 orientation-z= <1>;
 818                 irq-gpio = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>;
 819                 mpu-debug = <1>;
 820         };
 821 };
 822
 823 &i2s0 {
 824         status = "okay";
 825         rockchip,i2s-broken-burst-len;
 826         rockchip,playback-channels = <8>;
 827         rockchip,capture-channels = <8>;
 828         assigned-clocks = <&cru SCLK_I2S0_DIV>, <&cru SCLK_I2S_8CH>;
 829         assigned-clock-parents = <&cru PLL_GPLL>, <&cru SCLK_I2S0_8CH>;
 830         #sound-dai-cells = <0>;
 831 };
 832
 833 &i2s1 {
 834         status = "okay";
 835         rockchip,i2s-broken-burst-len;
 836         rockchip,playback-channels = <2>;
 837         rockchip,capture-channels = <2>;
 838         assigned-clocks = <&cru SCLK_I2S1_DIV>, <&cru SCLK_I2S_8CH>;
 839         assigned-clock-parents = <&cru PLL_GPLL>, <&cru SCLK_I2S1_8CH>;
 840         #sound-dai-cells = <0>;
 841 };
 842
 843 &i2s2 {
 844         status = "okay";
 845         #sound-dai-cells = <0>;
 846 };
 847
 848 &io_domains {
 849         status = "okay";
 850
 851         bt656-supply = <&vcc1v8_dvp>;           /* bt656_gpio2ab_ms */
 852         audio-supply = <&vcca1v8_codec>;        /* audio_gpio3d4a_ms */
 853         sdmmc-supply = <&vcc_sd>;               /* sdmmc_gpio4b_ms */
 854         gpio1830-supply = <&vcc_3v0>;           /* gpio1833_gpio4cd_ms */
 855 };
 856
 857 &pcie_phy {
 858         status = "okay";
 859 };
 860
 861 &pcie0 {
 862         ep-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
 863         num-lanes = <4>;
 864         pinctrl-names = "default";
 865         pinctrl-0 = <&pcie_clkreqn_cpm>;
 866         status = "okay";
 867 };
 868
 869 &pmu_io_domains {
 870         status = "okay";
 871         pmu1830-supply = <&vcc_3v0>;
 872 };
 873
 874 &pinctrl {
 875         buttons {
 876                 pwrbtn: pwrbtn {
 877                         rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
 878                 };
 879         };
 880
 881         lcd-panel {
 882                 lcd_panel_reset: lcd-panel-reset {
 883                         rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_up>;
 884                 };
 885
 886                 lcd_en: lcd-en {
 887                         rockchip,pins = <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
 888                 };
 889         };
 890
 891         pcie {
 892                 pcie_drv: pcie-drv {
 893                         rockchip,pins =
 894                                 <2 2 RK_FUNC_GPIO &pcfg_pull_none>;
 895                 };
 896                 pcie_3g_drv: pcie-3g-drv {
 897                 rockchip,pins =
 898                                 <2 6 RK_FUNC_GPIO &pcfg_pull_up>;
 899                 };
 900
 901         };
 902
 903         pmic {
 904                 vsel1_gpio: vsel1-gpio {
 905                         rockchip,pins =
 906                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
 907                 };
 908
 909                 vsel2_gpio: vsel2-gpio {
 910                         rockchip,pins =
 911                         <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
 912                 };
 913         };
 914
 915         sdio-pwrseq {
 916                 wifi_enable_h: wifi-enable-h {
 917                         rockchip,pins =
 918                                 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
 919                 };
 920         };
 921
 922         wireless-bluetooth {
 923                 uart0_gpios: uart0-gpios {
 924                         rockchip,pins =
 925                                 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
 926                 };
 927         };
 928
 929         leds {
 930                 led_power: led-power {
 931                         rockchip,pins =
 932                                 <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
 933                 };
 934                 led_user: led-user {
 935                         rockchip,pins =
 936                                 <0 13 RK_FUNC_GPIO &pcfg_pull_none>;
 937                 };
 938         };
 939
 940         rt5640 {
 941                 rt5640_hpcon: rt5640-hpcon {
 942                         rockchip,pins = <4 21 RK_FUNC_GPIO &pcfg_pull_none>;
 943                 };
 944         };
 945
 946         pmic {
 947                 pmic_int_l: pmic-int-l {
 948                         rockchip,pins =
 949                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 950                 };
 951
 952                 pmic_dvs2: pmic-dvs2 {
 953                         rockchip,pins =
 954                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
 955                 };
 956                 pmic_stby: pmic-stby {
 957                         rockchip,pins =
 958                                 <1 24 RK_FUNC_GPIO &pcfg_pull_up>;
 959                 };
 960                 pmic_hold: pmic-hold{
 961                         rockchip,pins =
 962                                 <1 13 RK_FUNC_GPIO &pcfg_pull_up>;
 963                 };
 964                 vsel1_gpio: vsel1-gpio {
 965                         rockchip,pins =
 966                                 <1 18 0 &pcfg_pull_down>;
 967                 };
 968                 vsel2_gpio: vsel2-gpio {
 969                         rockchip,pins =
 970                                 <1 14 0 &pcfg_pull_down>;
 971                 };
 972         };
 973
 974         usb2 {
 975                 host_vbus_drv: host-vbus-drv {
 976                         rockchip,pins =
 977                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
 978                 };
 979         };
 980
 981         fusb30x {
 982                 fusb0_int: fusb0-int {
 983                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
 984                 };
 985         };
 986         vbus {
 987                 vbus_5v_drv: vbus-5v-drv {
 988                         rockchip,pins =
 989                                 <1 3 RK_FUNC_GPIO &pcfg_pull_up>;
 990                 };
 991     };
 992 };
 993
 994 &pwm0 {
 995         status = "okay";
 996 };
 997
 998 &pwm1 {
 999         status = "okay";
1000 };
1001
1002 &pwm2 {
1003         status = "okay";
1004 };
1005
1006 &rkvdec {
1007         status = "okay";
1008 };
1009
1010 &rockchip_suspend {
1011         rockchip,power-ctrl =
1012                 <&gpio1 17 GPIO_ACTIVE_HIGH>,
1013                 <&gpio1 14 GPIO_ACTIVE_HIGH>;
1014 };
1015
1016 &route_edp {
1017         status = "disabled";
1018 };
1019
1020 &route_hdmi {
1021         status = "okay";
1022         logo,mode = "center";
1023 };
1024
1025 &cdn_dp {
1026         status = "disabled";
1027         extcon = <&fusb0>;
1028         phys = <&tcphy0_dp>;
1029 };
1030
1031 &hdmi_in_vopl {
1032         status = "disabled";
1033 };
1034
1035 &dsi_in_vopb {
1036         status = "okay";
1037 };
1038
1039 &dsi_in_vopl {
1040         status = "okay";
1041 };
1042
1043 &dp_in_vopb {
1044         status = "disabled";
1045 };
1046
1047 &saradc {
1048         status = "okay";
1049         vref-supply = <&vccadc_ref>;
1050 };
1051
1052 &sdhci {
1053         bus-width = <8>;
1054         keep-power-in-suspend;
1055         mmc-hs400-1_8v;
1056         mmc-hs400-enhanced-strobe;
1057         non-removable;
1058         status = "okay";
1059         supports-emmc;
1060 };
1061
1062 &sdmmc {
1063         max-frequency = <150000000>;
1064         supports-sd;
1065         bus-width = <4>;
1066         cap-mmc-highspeed;
1067         cap-sd-highspeed;
1068         disable-wp;
1069         num-slots = <1>;
1070         vqmmc-supply = <&vcc_sd>;
1071         pwrseq-gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;
1072         pinctrl-names = "default";
1073         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
1074         status = "okay";
1075 };
1076
1077 &sdio0 {
1078         max-frequency = <50000000>;
1079         supports-sdio;
1080         bus-width = <4>;
1081         disable-wp;
1082         cap-sd-highspeed;
1083         keep-power-in-suspend;
1084         mmc-pwrseq = <&sdio_pwrseq>;
1085         non-removable;
1086         num-slots = <1>;
1087         pinctrl-names = "default";
1088         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
1089         sd-uhs-sdr104;
1090         status = "okay";
1091 };
1092
1093 &spi1 {
1094         status = "okay";
1095     spi_wk2xxx: spi_wk2xxx@00{
1096         status = "okay";
1097         compatible = "firefly,spi-wk2xxx";
1098         reg = <0x00>;
1099         spi-max-frequency = <10000000>;
1100         power-gpio = <&gpio2 4 GPIO_ACTIVE_HIGH>;
1101         reset-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
1102         irq-gpio = <&gpio1 2 IRQ_TYPE_EDGE_FALLING>;
1103         cs-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
1104         /* rk3399 driver support SPI_CPOL | SPI_CPHA | SPI_CS_HIGH */
1105         //spi-cpha;     /* SPI mode: CPHA=1 */
1106         //spi-cpol;     /* SPI mode: CPOL=1 */
1107         //spi-cs-high;
1108     };
1109 };
1110
1111 &spdif {
1112         status = "okay";
1113         pinctrl-0 = <&spdif_bus_1>;
1114         i2c-scl-rising-time-ns = <450>;
1115         i2c-scl-falling-time-ns = <15>;
1116         #sound-dai-cells = <0>;
1117 };
1118
1119 &tcphy0 {
1120         extcon = <&fusb0>;
1121         /delete-property/ extcon;
1122         status = "okay";
1123 };
1124
1125 &tcphy1 {
1126         status = "okay";
1127 };
1128
1129 &tsadc {
1130         /* tshut mode 0:CRU 1:GPIO */
1131         rockchip,hw-tshut-mode = <1>;
1132         /* tshut polarity 0:LOW 1:HIGH */
1133         rockchip,hw-tshut-polarity = <1>;
1134         status = "okay";
1135 };
1136
1137 &u2phy0 {
1138         status = "okay";
1139         extcon = <&fusb0>;
1140         /delete-property/ extcon;
1141
1142         u2phy0_otg: otg-port {
1143                 rockchip,vbus-always-on;
1144                 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
1145                 status = "okay";
1146         };
1147
1148         u2phy0_host: host-port {
1149                 phy-supply = <&vcc5v0_host>;
1150                 status = "okay";
1151         };
1152 };
1153
1154 &u2phy1 {
1155         status = "okay";
1156
1157         u2phy1_otg: otg-port {
1158                 status = "okay";
1159         };
1160
1161         u2phy1_host: host-port {
1162                 phy-supply = <&vcc5v0_host>;
1163                 status = "okay";
1164         };
1165 };
1166
1167 &pwm3 {
1168         status = "okay";
1169         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
1170         compatible = "rockchip,remotectl-pwm";
1171         remote_pwm_id = <3>;
1172         handle_cpu_id = <0>;
1173
1174     ir_key1{
1175         rockchip,usercode = <0xff00>;
1176         rockchip,key_table =
1177             <0xeb   KEY_POWER>,
1178             <0xec   KEY_COMPOSE>,
1179             <0xfe   KEY_BACK>,
1180             <0xb7   KEY_HOME>,
1181             <0xa3   KEY_WWW>,
1182             <0xf4   KEY_VOLUMEUP>,
1183             <0xa7   KEY_VOLUMEDOWN>,
1184             <0xf8   KEY_ENTER>,
1185             <0xfc   KEY_UP>,
1186             <0xfd   KEY_DOWN>,
1187             <0xf1   KEY_LEFT>,
1188             <0xe5   KEY_RIGHT>;
1189     };
1190 };
1191
1192 &uart0 {
1193         pinctrl-names = "default";
1194         pinctrl-0 = <&uart0_xfer &uart0_cts>;
1195         status = "okay";
1196 };
1197
1198 &uart2 {
1199         status = "okay";
1200 };
1201
1202 &uart4 {
1203         status = "disabled";
1204         current-speed = <9600>;
1205         no-loopback-test;
1206 };
1207
1208 &usbdrd3_0 {
1209         status = "okay";
1210         extcon = <&fusb0>;
1211         /delete-property/ extcon;
1212 };
1213
1214 &usbdrd3_1 {
1215         status = "okay";
1216 };
1217
1218 &usbdrd_dwc3_0 {
1219         status = "okay";
1220         dr_mode = "host";
1221 };
1222
1223 &usbdrd_dwc3_1 {
1224         status = "okay";
1225         dr_mode = "host";
1226 };
1227
1228 &usb_host0_ehci {
1229         status = "okay";
1230 };
1231
1232 &usb_host0_ohci {
1233         status = "okay";
1234 };
1235
1236 &usb_host1_ehci {
1237         status = "okay";
1238 };
1239
1240 &usb_host1_ohci {
1241         status = "okay";
1242 };
1243
1244 &vopb {
1245         status = "okay";
1246 };
1247
1248 &vopb_mmu {
1249         status = "okay";
1250 };
1251
1252 &vopl {
1253         status = "okay";
1254 };
1255
1256 &vopl_mmu {
1257         status = "okay";
1258 };
1259
1260 &vpu {
1261         status = "okay";
1262         /* 0 means ion, 1 means drm */
1263         //allocator = <0>;
1264 };