arch/arm64/boot/dts/rockchip/rk3399-evb.dtsi

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include <dt-bindings/pwm/pwm.h>
  44 #include "rk3399.dtsi"
  45
  46 / {
  47         compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
  48
  49         vcc3v3_sys: vcc3v3-sys {
  50                 compatible = "regulator-fixed";
  51                 regulator-name = "vcc3v3_sys";
  52                 regulator-always-on;
  53                 regulator-boot-on;
  54                 regulator-min-microvolt = <3300000>;
  55                 regulator-max-microvolt = <3300000>;
  56         };
  57
  58         vcc5v0_host: vcc5v0-host-regulator {
  59                 compatible = "regulator-fixed";
  60                 enable-active-high;
  61                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  62                 pinctrl-names = "default";
  63                 pinctrl-0 = <&host_vbus_drv>;
  64                 regulator-name = "vcc5v0_host";
  65         };
  66
  67         backlight: backlight {
  68                 compatible = "pwm-backlight";
  69                 pwms = <&pwm0 0 25000 0>;
  70                 brightness-levels = <
  71                           0   1   2   3   4   5   6   7
  72                           8   9  10  11  12  13  14  15
  73                          16  17  18  19  20  21  22  23
  74                          24  25  26  27  28  29  30  31
  75                          32  33  34  35  36  37  38  39
  76                          40  41  42  43  44  45  46  47
  77                          48  49  50  51  52  53  54  55
  78                          56  57  58  59  60  61  62  63
  79                          64  65  66  67  68  69  70  71
  80                          72  73  74  75  76  77  78  79
  81                          80  81  82  83  84  85  86  87
  82                          88  89  90  91  92  93  94  95
  83                          96  97  98  99 100 101 102 103
  84                         104 105 106 107 108 109 110 111
  85                         112 113 114 115 116 117 118 119
  86                         120 121 122 123 124 125 126 127
  87                         128 129 130 131 132 133 134 135
  88                         136 137 138 139 140 141 142 143
  89                         144 145 146 147 148 149 150 151
  90                         152 153 154 155 156 157 158 159
  91                         160 161 162 163 164 165 166 167
  92                         168 169 170 171 172 173 174 175
  93                         176 177 178 179 180 181 182 183
  94                         184 185 186 187 188 189 190 191
  95                         192 193 194 195 196 197 198 199
  96                         200 201 202 203 204 205 206 207
  97                         208 209 210 211 212 213 214 215
  98                         216 217 218 219 220 221 222 223
  99                         224 225 226 227 228 229 230 231
 100                         232 233 234 235 236 237 238 239
 101                         240 241 242 243 244 245 246 247
 102                         248 249 250 251 252 253 254 255>;
 103                 default-brightness-level = <200>;
 104         };
 105
 106         clkin_gmac: external-gmac-clock {
 107                 compatible = "fixed-clock";
 108                 clock-frequency = <125000000>;
 109                 clock-output-names = "clkin_gmac";
 110                 #clock-cells = <0>;
 111         };
 112
 113         vcc_phy: vcc-phy-regulator {
 114                 compatible = "regulator-fixed";
 115                 regulator-name = "vcc_phy";
 116                 regulator-always-on;
 117                 regulator-boot-on;
 118         };
 119
 120         io-domains {
 121                 compatible = "rockchip,rk3399-io-voltage-domain";
 122                 rockchip,grf = <&grf>;
 123
 124                 bt656-supply = <&vcc1v8_dvp>;
 125                 audio-supply = <&vcca1v8_codec>;
 126                 sdmmc-supply = <&vcc_sd>;
 127                 gpio1830-supply = <&vcc_3v0>;
 128         };
 129
 130         pmu-io-domains {
 131                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 132                 rockchip,grf = <&pmugrf>;
 133
 134                 pmu1830-supply = <&vcc1v8_pmu>;
 135         };
 136
 137         es8316-sound {
 138                 compatible = "simple-audio-card";
 139                 simple-audio-card,format = "i2s";
 140                 simple-audio-card,name = "rockchip,es8316-codec";
 141                 simple-audio-card,mclk-fs = <256>;
 142                 simple-audio-card,widgets =
 143                         "Microphone", "Mic Jack",
 144                         "Headphone", "Headphone Jack";
 145                 simple-audio-card,routing =
 146                         "Mic Jack", "MICBIAS1",
 147                         "IN1P", "Mic Jack",
 148                         "Headphone Jack", "HPOL",
 149                         "Headphone Jack", "HPOR";
 150                 simple-audio-card,cpu {
 151                         sound-dai = <&i2s0>;
 152                 };
 153                 simple-audio-card,codec {
 154                         sound-dai = <&es8316>;
 155                 };
 156         };
 157
 158         hdmi_sound: hdmi-sound {
 159                 status = "disabled";
 160                 compatible = "simple-audio-card";
 161                 simple-audio-card,format = "i2s";
 162                 simple-audio-card,mclk-fs = <256>;
 163                 simple-audio-card,name = "rockchip,hdmi";
 164                 simple-audio-card,cpu {
 165                         sound-dai = <&i2s2>;
 166                 };
 167                 simple-audio-card,codec {
 168                         sound-dai = <&dw_hdmi_audio>;
 169                 };
 170         };
 171
 172         dw_hdmi_audio: dw-hdmi-audio {
 173                 status = "disabled";
 174                 compatible = "rockchip,dw-hdmi-audio";
 175                 #sound-dai-cells = <0>;
 176         };
 177
 178         spdif_sound: spdif-sound {
 179                 status = "disabled";
 180                 compatible = "simple-audio-card";
 181                 simple-audio-card,name = "ROCKCHIP,SPDIF";
 182                 simple-audio-card,cpu {
 183                         sound-dai = <&spdif>;
 184                 };
 185                 simple-audio-card,codec {
 186                         sound-dai = <&spdif_out>;
 187                 };
 188         };
 189
 190         spdif_out: spdif-out {
 191                 status = "disabled";
 192                 compatible = "linux,spdif-dit";
 193                 #sound-dai-cells = <0>;
 194         };
 195
 196         sdio_pwrseq: sdio-pwrseq {
 197                 compatible = "mmc-pwrseq-simple";
 198                 clocks = <&rk808 1>;
 199                 clock-names = "ext_clock";
 200                 pinctrl-names = "default";
 201                 pinctrl-0 = <&wifi_enable_h>;
 202
 203                 /*
 204                  * On the module itself this is one of these (depending
 205                  * on the actual card populated):
 206                  * - SDIO_RESET_L_WL_REG_ON
 207                  * - PDN (power down when low)
 208                  */
 209                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
 210         };
 211
 212         wireless-wlan {
 213                 compatible = "wlan-platdata";
 214                 rockchip,grf = <&grf>;
 215                 wifi_chip_type = "ap6354";
 216                 sdio_vref = <1800>;
 217                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
 218                 status = "okay";
 219         };
 220
 221         wireless-bluetooth {
 222                 compatible = "bluetooth-platdata";
 223                 //wifi-bt-power-toggle;
 224                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
 225                 pinctrl-names = "default", "rts_gpio";
 226                 pinctrl-0 = <&uart0_rts>;
 227                 pinctrl-1 = <&uart0_gpios>;
 228                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
 229                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
 230                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
 231                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
 232                 status = "okay";
 233         };
 234
 235         test-power {
 236                 status = "okay";
 237         };
 238 };
 239
 240 &cpu_l0 {
 241         cpu-supply = <&vdd_cpu_l>;
 242 };
 243
 244 &cpu_l1 {
 245         cpu-supply = <&vdd_cpu_l>;
 246 };
 247
 248 &cpu_l2 {
 249         cpu-supply = <&vdd_cpu_l>;
 250 };
 251
 252 &cpu_l3 {
 253         cpu-supply = <&vdd_cpu_l>;
 254 };
 255
 256 &cpu_b0 {
 257         cpu-supply = <&vdd_cpu_b>;
 258 };
 259
 260 &cpu_b1 {
 261         cpu-supply = <&vdd_cpu_b>;
 262 };
 263
 264 &gpu {
 265         status = "okay";
 266         mali-supply = <&vdd_gpu>;
 267 };
 268
 269 &sdmmc {
 270         clock-frequency = <150000000>;
 271         clock-freq-min-max = <400000 150000000>;
 272         supports-sd;
 273         bus-width = <4>;
 274         cap-mmc-highspeed;
 275         cap-sd-highspeed;
 276         disable-wp;
 277         num-slots = <1>;
 278         sd-uhs-sdr104;
 279         vqmmc-supply = <&vcc_sd>;
 280         pinctrl-names = "default";
 281         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 282         status = "okay";
 283 };
 284
 285 &sdio0 {
 286         clock-frequency = <50000000>;
 287         clock-freq-min-max = <200000 50000000>;
 288         supports-sdio;
 289         bus-width = <4>;
 290         disable-wp;
 291         cap-sd-highspeed;
 292         cap-sdio-irq;
 293         keep-power-in-suspend;
 294         mmc-pwrseq = <&sdio_pwrseq>;
 295         non-removable;
 296         num-slots = <1>;
 297         pinctrl-names = "default";
 298         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 299         sd-uhs-sdr104;
 300         status = "okay";
 301 };
 302
 303 &emmc_phy {
 304         freq-sel = <200000000>;
 305         dr-sel = <50>;
 306         opdelay = <4>;
 307         status = "okay";
 308 };
 309
 310 &sdhci {
 311         bus-width = <8>;
 312         mmc-hs400-1_8v;
 313         supports-emmc;
 314         non-removable;
 315         keep-power-in-suspend;
 316         mmc-hs400-enhanced-strobe;
 317         status = "okay";
 318 };
 319
 320 &i2s0 {
 321         status = "okay";
 322         rockchip,i2s-broken-burst-len;
 323         rockchip,playback-channels = <8>;
 324         rockchip,capture-channels = <8>;
 325         #sound-dai-cells = <0>;
 326 };
 327
 328 &i2s2 {
 329         #sound-dai-cells = <0>;
 330 };
 331
 332 &spdif {
 333         #sound-dai-cells = <0>;
 334 };
 335
 336 &i2c0 {
 337         status = "okay";
 338         i2c-scl-rising-time-ns = <450>;
 339         i2c-scl-falling-time-ns = <15>;
 340 };
 341
 342 &i2c1 {
 343         status = "okay";
 344         i2c-scl-rising-time-ns = <300>;
 345         i2c-scl-falling-time-ns = <15>;
 346
 347         es8316: es8316@10 {
 348                 #sound-dai-cells = <0>;
 349                 compatible = "everest,es8316";
 350                 reg = <0x10>;
 351                 clocks = <&cru SCLK_I2S_8CH_OUT>;
 352                 clock-names = "mclk";
 353                 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
 354                 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
 355         };
 356 };
 357
 358 &i2c4 {
 359         status = "okay";
 360         i2c-scl-rising-time-ns = <600>;
 361         i2c-scl-falling-time-ns = <20>;
 362
 363         gt9xx: gt9xx@14 {
 364                 compatible = "goodix,gt9xx";
 365                 reg = <0x14>;
 366                 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
 367                 reset-gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
 368                 max-x = <1200>;
 369                 max-y = <1900>;
 370                 tp-size = <911>;
 371                 tp-supply = <&vcc3v0_tp>;
 372         };
 373
 374         gsl3673: gsl3673@40 {
 375                 compatible = "GSL,GSL3673";
 376                 reg = <0x40>;
 377                 screen_max_x = <1536>;
 378                 screen_max_y = <2048>;
 379                 irq_gpio_number = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
 380                 rst_gpio_number = <&gpio4 22 GPIO_ACTIVE_HIGH>;
 381         };
 382 };
 383
 384 &pcie0 {
 385         assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
 386         assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
 387         assigned-clock-rates = <100000000>;
 388         ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 389         num-lanes = <4>;
 390         pinctrl-names = "default";
 391         pinctrl-0 = <&pcie_clkreqn>;
 392         status = "okay";
 393 };
 394
 395 &tcphy0 {
 396         extcon = <&fusb0>;
 397         status = "okay";
 398 };
 399
 400 &tcphy1 {
 401         extcon = <&fusb1>;
 402         status = "okay";
 403 };
 404
 405 &tsadc {
 406         rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
 407         rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
 408         status = "okay";
 409 };
 410
 411 &u2phy0 {
 412         status = "okay";
 413         extcon = <&fusb0>;
 414
 415         u2phy0_otg: otg-port {
 416                 status = "okay";
 417         };
 418
 419         u2phy0_host: host-port {
 420                 phy-supply = <&vcc5v0_host>;
 421                 status = "okay";
 422         };
 423 };
 424
 425 &u2phy1 {
 426         status = "okay";
 427         extcon = <&fusb1>;
 428
 429         u2phy1_otg: otg-port {
 430                 status = "okay";
 431         };
 432
 433         u2phy1_host: host-port {
 434                 phy-supply = <&vcc5v0_host>;
 435                 status = "okay";
 436         };
 437 };
 438
 439 &uart0 {
 440         pinctrl-names = "default";
 441         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 442         status = "okay";
 443 };
 444
 445 &uart2 {
 446         status = "okay";
 447 };
 448
 449 &usb_host0_ehci {
 450         status = "okay";
 451 };
 452
 453 &usb_host0_ohci {
 454         status = "okay";
 455 };
 456
 457 &usb_host1_ehci {
 458         status = "okay";
 459 };
 460
 461 &usb_host1_ohci {
 462         status = "okay";
 463 };
 464
 465 &usbdrd3_0 {
 466         extcon = <&fusb0>;
 467         status = "okay";
 468 };
 469
 470 &usbdrd_dwc3_0 {
 471         status = "okay";
 472 };
 473
 474 &usbdrd3_1 {
 475         extcon = <&fusb1>;
 476         status = "okay";
 477 };
 478
 479 &usbdrd_dwc3_1 {
 480         status = "okay";
 481 };
 482
 483 &pwm0 {
 484         status = "okay";
 485 };
 486
 487 &gmac {
 488         phy-supply = <&vcc_phy>;
 489         phy-mode = "rgmii";
 490         clock_in_out = "input";
 491         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
 492         snps,reset-active-low;
 493         snps,reset-delays-us = <0 10000 50000>;
 494         assigned-clocks = <&cru SCLK_RMII_SRC>;
 495         assigned-clock-parents = <&clkin_gmac>;
 496         pinctrl-names = "default";
 497         pinctrl-0 = <&rgmii_pins>;
 498         tx_delay = <0x28>;
 499         rx_delay = <0x11>;
 500         status = "okay";
 501 };
 502
 503 &saradc {
 504         status = "okay";
 505 };
 506
 507 &pinctrl {
 508         sdio-pwrseq {
 509                 wifi_enable_h: wifi-enable-h {
 510                         rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
 511                 };
 512         };
 513
 514         wireless-bluetooth {
 515                 uart0_gpios: uart0-gpios {
 516                         rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
 517                 };
 518         };
 519
 520         pmic {
 521                 pmic_int_l: pmic-int-l {
 522                         rockchip,pins =
 523                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 524                 };
 525
 526                 pmic_dvs2: pmic-dvs2 {
 527                         rockchip,pins =
 528                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
 529                 };
 530         };
 531
 532         usb2 {
 533                 host_vbus_drv: host-vbus-drv {
 534                         rockchip,pins =
 535                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
 536                 };
 537         };
 538
 539         fusb30x {
 540                 fusb0_int: fusb0-int {
 541                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
 542                 };
 543
 544                 fusb1_int: fusb1-int {
 545                         rockchip,pins = <1 24 RK_FUNC_GPIO &pcfg_pull_up>;
 546                 };
 547         };
 548 };