36cfd18a0fdc55a2ed83abe3bd82ade36ddcde85
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-evb-rev3.dtsi
1 /*
2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 #include "rk3399-evb.dtsi"
44
45 / {
46         compatible = "rockchip,rk3399-evb-rev3", "rockchip,rk3399";
47
48         vcc5v0_sys: vcc5v0-sys {
49                 compatible = "regulator-fixed";
50                 regulator-name = "vcc5v0_sys";
51                 regulator-always-on;
52                 regulator-boot-on;
53                 regulator-min-microvolt = <5000000>;
54                 regulator-max-microvolt = <5000000>;
55         };
56
57         vdd_center: vdd-center {
58                 compatible = "pwm-regulator";
59                 rockchip,pwm_id = <2>;
60                 rockchip,pwm_voltage = <900000>;
61                 pwms = <&pwm2 0 25000 0>;
62                 regulator-name = "vdd_center";
63                 regulator-min-microvolt = <800000>;
64                 regulator-max-microvolt = <1400000>;
65                 regulator-always-on;
66                 regulator-boot-on;
67         };
68 };
69
70 &cluster0_opp {
71         opp@408000000 {
72                 opp-hz = /bits/ 64 <408000000>;
73                 opp-microvolt = <800000>;
74                 clock-latency-ns = <40000>;
75         };
76         opp@600000000 {
77                 opp-hz = /bits/ 64 <600000000>;
78                 opp-microvolt = <800000>;
79         };
80         opp@816000000 {
81                 opp-hz = /bits/ 64 <816000000>;
82                 opp-microvolt = <800000>;
83         };
84         opp@1008000000 {
85                 opp-hz = /bits/ 64 <1008000000>;
86                 opp-microvolt = <850000>;
87         };
88         opp@1200000000 {
89                 opp-hz = /bits/ 64 <1200000000>;
90                 opp-microvolt = <925000>;
91         };
92         opp@1416000000 {
93                 opp-hz = /bits/ 64 <1416000000>;
94                 opp-microvolt = <1050000>;
95         };
96         opp@1512000000 {
97                 opp-hz = /bits/ 64 <1512000000>;
98                 opp-microvolt = <1100000>;
99         };
100 };
101
102 &cluster1_opp {
103         opp@408000000 {
104                 opp-hz = /bits/ 64 <408000000>;
105                 opp-microvolt = <800000>;
106                 clock-latency-ns = <40000>;
107         };
108         opp@600000000 {
109                 opp-hz = /bits/ 64 <600000000>;
110                 opp-microvolt = <800000>;
111         };
112         opp@816000000 {
113                 opp-hz = /bits/ 64 <816000000>;
114                 opp-microvolt = <825000>;
115         };
116         opp@1008000000 {
117                 opp-hz = /bits/ 64 <1008000000>;
118                 opp-microvolt = <850000>;
119         };
120         opp@1200000000 {
121                 opp-hz = /bits/ 64 <1200000000>;
122                 opp-microvolt = <900000>;
123         };
124         opp@1416000000 {
125                 opp-hz = /bits/ 64 <1416000000>;
126                 opp-microvolt = <1000000>;
127         };
128         opp@1608000000 {
129                 opp-hz = /bits/ 64 <1608000000>;
130                 opp-microvolt = <1050000>;
131         };
132         opp@1800000000 {
133                 opp-hz = /bits/ 64 <1800000000>;
134                 opp-microvolt = <1150000>;
135         };
136         opp@1992000000 {
137                 opp-hz = /bits/ 64 <1992000000>;
138                 opp-microvolt = <1225000>;
139         };
140 };
141
142 &CPU_COST_A72 {
143         busy-cost-data = <
144                 210   129       /*  408MHz */
145                 308   184       /*  600MHz */
146                 419   246       /*  816MHz */
147                 518   335       /* 1008MHz */
148                 617   428       /* 1200MHz */
149                 728   573       /* 1416MHz */
150                 827   724       /* 1608MHz */
151                 925   900       /* 1800MHz */
152                 1024  1108      /* 1992MHz */
153         >;
154         idle-cost-data = <
155               15
156               15
157                0
158         >;
159 };
160
161 &CPU_COST_A53 {
162         busy-cost-data = <
163                 108    46       /*  408M */
164                 159    67       /*  600M */
165                 216    90       /*  816M */
166                 267    120      /* 1008M */
167                 318    153      /* 1200M */
168                 375    198      /* 1416M */
169                 401    222      /* 1512M */
170         >;
171         idle-cost-data = <
172               6
173               6
174               0
175         >;
176 };
177
178 &CLUSTER_COST_A72 {
179         busy-cost-data = <
180                 210   129       /*  408MHz */
181                 308   184       /*  600MHz */
182                 419   246       /*  816MHz */
183                 518   335       /* 1008MHz */
184                 617   428       /* 1200MHz */
185                 728   573       /* 1416MHz */
186                 827   724       /* 1608MHz */
187                 925   900       /* 1800MHz */
188                 1024  1108      /* 1992MHz */
189         >;
190         idle-cost-data = <
191                  65
192                  65
193                  65
194         >;
195 };
196
197 &CLUSTER_COST_A53 {
198         busy-cost-data = <
199                 108    46       /*  408M */
200                 159    67       /*  600M */
201                 216    90       /*  816M */
202                 267    120      /* 1008M */
203                 318    153      /* 1200M */
204                 375    198      /* 1416M */
205                 401    222      /* 1512M */
206         >;
207         idle-cost-data = <
208                 56
209                 56
210                 56
211         >;
212 };
213
214 &gpu_opp_table {
215         opp@200000000 {
216                 opp-hz = /bits/ 64 <200000000>;
217                 opp-microvolt = <800000>;
218         };
219         opp@300000000 {
220                 opp-hz = /bits/ 64 <300000000>;
221                 opp-microvolt = <800000>;
222         };
223         opp@400000000 {
224                 opp-hz = /bits/ 64 <400000000>;
225                 opp-microvolt = <800000>;
226         };
227         opp@500000000 {
228                 opp-hz = /bits/ 64 <500000000>;
229                 opp-microvolt = <850000>;
230         };
231         opp@600000000 {
232                 opp-hz = /bits/ 64 <600000000>;
233                 opp-microvolt = <900000>;
234         };
235         opp@800000000 {
236                 opp-hz = /bits/ 64 <800000000>;
237                 opp-microvolt = <1000000>;
238         };
239 };
240
241 &i2c0 {
242         fusb1: fusb30x@22 {
243                 compatible = "fairchild,fusb302";
244                 reg = <0x22>;
245                 pinctrl-names = "default";
246                 pinctrl-0 = <&fusb1_int>;
247                 vbus-5v-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
248                 int-n-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
249                 status = "okay";
250         };
251
252         vdd_cpu_b: syr827@40 {
253                 compatible = "silergy,syr827";
254                 reg = <0x40>;
255                 vin-supply = <&vcc5v0_sys>;
256                 regulator-compatible = "fan53555-reg";
257                 pinctrl-0 = <&vsel1_gpio>;
258                 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
259                 regulator-name = "vdd_cpu_b";
260                 regulator-min-microvolt = <712500>;
261                 regulator-max-microvolt = <1500000>;
262                 regulator-ramp-delay = <1000>;
263                 fcs,suspend-voltage-selector = <1>;
264                 regulator-always-on;
265                 regulator-boot-on;
266                 regulator-initial-state = <3>;
267                         regulator-state-mem {
268                         regulator-off-in-suspend;
269                 };
270         };
271
272         vdd_gpu: syr828@41 {
273                 compatible = "silergy,syr828";
274                 reg = <0x41>;
275                 vin-supply = <&vcc5v0_sys>;
276                 regulator-compatible = "fan53555-reg";
277                 pinctrl-0 = <&vsel2_gpio>;
278                 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
279                 regulator-name = "vdd_gpu";
280                 regulator-min-microvolt = <712500>;
281                 regulator-max-microvolt = <1500000>;
282                 regulator-ramp-delay = <1000>;
283                 fcs,suspend-voltage-selector = <1>;
284                 regulator-always-on;
285                 regulator-boot-on;
286                 regulator-initial-state = <3>;
287                         regulator-state-mem {
288                         regulator-off-in-suspend;
289                 };
290         };
291
292         rk808: pmic@1b {
293                 compatible = "rockchip,rk808";
294                 reg = <0x1b>;
295                 interrupt-parent = <&gpio1>;
296                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
297                 pinctrl-names = "default";
298                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
299                 rockchip,system-power-controller;
300                 wakeup-source;
301                 #clock-cells = <1>;
302                 clock-output-names = "xin32k", "rk808-clkout2";
303
304                 vcc1-supply = <&vcc3v3_sys>;
305                 vcc2-supply = <&vcc3v3_sys>;
306                 vcc3-supply = <&vcc3v3_sys>;
307                 vcc4-supply = <&vcc3v3_sys>;
308                 vcc6-supply = <&vcc3v3_sys>;
309                 vcc7-supply = <&vcc3v3_sys>;
310                 vcc8-supply = <&vcc3v3_sys>;
311                 vcc9-supply = <&vcc3v3_sys>;
312                 vcc10-supply = <&vcc3v3_sys>;
313                 vcc11-supply = <&vcc3v3_sys>;
314                 vcc12-supply = <&vcc3v3_sys>;
315                 vddio-supply = <&vcc1v8_pmu>;
316
317                 regulators {
318                         vdd_log: DCDC_REG1 {
319                                 regulator-always-on;
320                                 regulator-boot-on;
321                                 regulator-min-microvolt = <750000>;
322                                 regulator-max-microvolt = <1350000>;
323                                 regulator-ramp-delay = <6001>;
324                                 regulator-name = "vdd_log";
325                                 regulator-state-mem {
326                                         regulator-on-in-suspend;
327                                         regulator-suspend-microvolt = <900000>;
328                                 };
329                         };
330
331                         vdd_cpu_l: DCDC_REG2 {
332                                 regulator-always-on;
333                                 regulator-boot-on;
334                                 regulator-min-microvolt = <750000>;
335                                 regulator-max-microvolt = <1350000>;
336                                 regulator-ramp-delay = <6001>;
337                                 regulator-name = "vdd_cpu_l";
338                                 regulator-state-mem {
339                                         regulator-off-in-suspend;
340                                 };
341                         };
342
343                         vcc_ddr: DCDC_REG3 {
344                                 regulator-always-on;
345                                 regulator-boot-on;
346                                 regulator-name = "vcc_ddr";
347                                 regulator-state-mem {
348                                         regulator-on-in-suspend;
349                                 };
350                         };
351
352                         vcc_1v8: DCDC_REG4 {
353                                 regulator-always-on;
354                                 regulator-boot-on;
355                                 regulator-min-microvolt = <1800000>;
356                                 regulator-max-microvolt = <1800000>;
357                                 regulator-name = "vcc_1v8";
358                                 regulator-state-mem {
359                                         regulator-on-in-suspend;
360                                         regulator-suspend-microvolt = <1800000>;
361                                 };
362                         };
363
364                         vcc1v8_dvp: LDO_REG1 {
365                                 regulator-always-on;
366                                 regulator-boot-on;
367                                 regulator-min-microvolt = <1800000>;
368                                 regulator-max-microvolt = <1800000>;
369                                 regulator-name = "vcc1v8_dvp";
370                                 regulator-state-mem {
371                                         regulator-off-in-suspend;
372                                 };
373                         };
374
375                         vcc3v0_tp: LDO_REG2 {
376                                 regulator-always-on;
377                                 regulator-boot-on;
378                                 regulator-min-microvolt = <3000000>;
379                                 regulator-max-microvolt = <3000000>;
380                                 regulator-name = "vcc3v0_tp";
381                                 regulator-state-mem {
382                                         regulator-off-in-suspend;
383                                 };
384                         };
385
386                         vcc1v8_pmu: LDO_REG3 {
387                                 regulator-always-on;
388                                 regulator-boot-on;
389                                 regulator-min-microvolt = <1800000>;
390                                 regulator-max-microvolt = <1800000>;
391                                 regulator-name = "vcc1v8_pmu";
392                                 regulator-state-mem {
393                                         regulator-on-in-suspend;
394                                         regulator-suspend-microvolt = <1800000>;
395                                 };
396                         };
397
398                         vcc_sd: LDO_REG4 {
399                                 regulator-always-on;
400                                 regulator-boot-on;
401                                 regulator-min-microvolt = <1800000>;
402                                 regulator-max-microvolt = <3300000>;
403                                 regulator-name = "vcc_sd";
404                                 regulator-state-mem {
405                                         regulator-on-in-suspend;
406                                         regulator-suspend-microvolt = <3300000>;
407                                 };
408                         };
409
410                         vcca3v0_codec: LDO_REG5 {
411                                 regulator-always-on;
412                                 regulator-boot-on;
413                                 regulator-min-microvolt = <3000000>;
414                                 regulator-max-microvolt = <3000000>;
415                                 regulator-name = "vcca3v0_codec";
416                                 regulator-state-mem {
417                                         regulator-off-in-suspend;
418                                 };
419                         };
420
421                         vcc_1v5: LDO_REG6 {
422                                 regulator-always-on;
423                                 regulator-boot-on;
424                                 regulator-min-microvolt = <1500000>;
425                                 regulator-max-microvolt = <1500000>;
426                                 regulator-name = "vcc_1v5";
427                                 regulator-state-mem {
428                                         regulator-on-in-suspend;
429                                         regulator-suspend-microvolt = <1500000>;
430                                 };
431                         };
432
433                         vcca1v8_codec: LDO_REG7 {
434                                 regulator-always-on;
435                                 regulator-boot-on;
436                                 regulator-min-microvolt = <1800000>;
437                                 regulator-max-microvolt = <1800000>;
438                                 regulator-name = "vcca1v8_codec";
439                                 regulator-state-mem {
440                                         regulator-off-in-suspend;
441                                 };
442                         };
443
444                         vcc_3v0: LDO_REG8 {
445                                 regulator-always-on;
446                                 regulator-boot-on;
447                                 regulator-min-microvolt = <3000000>;
448                                 regulator-max-microvolt = <3000000>;
449                                 regulator-name = "vcc_3v0";
450                                 regulator-state-mem {
451                                         regulator-on-in-suspend;
452                                         regulator-suspend-microvolt = <3000000>;
453                                 };
454                         };
455
456                         vcc3v3_s3: SWITCH_REG1 {
457                                 regulator-always-on;
458                                 regulator-boot-on;
459                                 regulator-name = "vcc3v3_s3";
460                                 regulator-state-mem {
461                                         regulator-on-in-suspend;
462                                 };
463                         };
464
465                         vcc3v3_s0: SWITCH_REG2 {
466                                 regulator-always-on;
467                                 regulator-boot-on;
468                                 regulator-name = "vcc3v3_s0";
469                                 regulator-state-mem {
470                                         regulator-off-in-suspend;
471                                 };
472                         };
473                 };
474         };
475 };
476
477 &es8316 {
478         reg = <0x11>;
479 };
480
481 &i2c6 {
482         status = "okay";
483         fusb0: fusb30x@22 {
484                 compatible = "fairchild,fusb302";
485                 reg = <0x22>;
486                 pinctrl-names = "default";
487                 pinctrl-0 = <&fusb0_int>;
488                 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
489                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
490                 status = "okay";
491         };
492 };
493
494 &pwm2 {
495         status = "okay";
496 };