2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
42 #include <dt-bindings/pwm/pwm.h>
43 #include <dt-bindings/input/input.h>
44 #include "rk3399.dtsi"
45 #include "rk3399-android.dtsi"
46 #include "rk3399-opp.dtsi"
49 compatible = "rockchip,rk3399-box","rockchip,rk3399";
51 vcc1v8_s0: vcc1v8-s0 {
52 compatible = "regulator-fixed";
53 regulator-name = "vcc1v8_s0";
54 regulator-min-microvolt = <1800000>;
55 regulator-max-microvolt = <1800000>;
60 compatible = "regulator-fixed";
61 regulator-name = "vcc_sys";
62 regulator-min-microvolt = <5000000>;
63 regulator-max-microvolt = <5000000>;
67 vcc_phy: vcc-phy-regulator {
68 compatible = "regulator-fixed";
69 regulator-name = "vcc_phy";
74 vcc3v3_sys: vcc3v3-sys {
75 compatible = "regulator-fixed";
76 regulator-name = "vcc3v3_sys";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
80 vin-supply = <&vcc_sys>;
83 vcc5v0_host: vcc5v0-host-regulator {
84 compatible = "regulator-fixed";
86 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&host_vbus_drv>;
89 regulator-name = "vcc5v0_host";
93 compatible = "pwm-regulator";
94 pwms = <&pwm2 0 25000 0>;
95 regulator-name = "vdd_log";
96 regulator-min-microvolt = <800000>;
97 regulator-max-microvolt = <1400000>;
101 /* for rockchip boot on */
102 rockchip,pwm_id= <2>;
103 rockchip,pwm_voltage = <900000>;
105 vin-supply = <&vcc_sys>;
108 clkin_gmac: external-gmac-clock {
109 compatible = "fixed-clock";
110 clock-frequency = <125000000>;
111 clock-output-names = "clkin_gmac";
116 compatible = "rockchip,rk3399-io-voltage-domain";
117 rockchip,grf = <&grf>;
119 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
120 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
121 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
122 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
126 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
127 rockchip,grf = <&pmugrf>;
129 pmu1830-supply = <&vcc_1v8>;
134 compatible = "simple-audio-card";
135 simple-audio-card,name = "ROCKCHIP,SPDIF";
136 simple-audio-card,cpu {
137 sound-dai = <&spdif>;
139 simple-audio-card,codec {
140 sound-dai = <&spdif_out>;
144 spdif_out: spdif-out {
146 compatible = "linux,spdif-dit";
147 #sound-dai-cells = <0>;
150 hdmi_sound: hdmi-sound {
152 compatible = "simple-audio-card";
153 simple-audio-card,format = "i2s";
154 simple-audio-card,mclk-fs = <256>;
155 simple-audio-card,name = "rockchip,hdmi";
156 simple-audio-card,cpu {
159 simple-audio-card,codec {
160 sound-dai = <&dw_hdmi_audio>;
164 dw_hdmi_audio: dw-hdmi-audio {
166 compatible = "rockchip,dw-hdmi-audio";
167 #sound-dai-cells = <0>;
170 sdio_pwrseq: sdio-pwrseq {
171 compatible = "mmc-pwrseq-simple";
173 clock-names = "ext_clock";
174 pinctrl-names = "default";
175 pinctrl-0 = <&wifi_enable_h>;
178 * On the module itself this is one of these (depending
179 * on the actual card populated):
180 * - SDIO_RESET_L_WL_REG_ON
181 * - PDN (power down when low)
183 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
187 compatible = "wlan-platdata";
188 rockchip,grf = <&grf>;
189 wifi_chip_type = "ap6354";
191 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
196 compatible = "bluetooth-platdata";
198 clock-names = "ext_clock";
199 /* wifi-bt-power-toggle; */
200 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
201 pinctrl-names = "default", "rts_gpio";
202 pinctrl-0 = <&uart0_rts>;
203 pinctrl-1 = <&uart0_gpios>;
204 /* BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; */
205 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>;
206 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
207 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
217 clock-frequency = <100000000>;
218 clock-freq-min-max = <100000 100000000>;
226 vqmmc-supply = <&vcc_sd>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
229 card-detect-delay = <800>;
234 clock-frequency = <100000000>;
235 clock-freq-min-max = <200000 100000000>;
241 keep-power-in-suspend;
242 mmc-pwrseq = <&sdio_pwrseq>;
245 pinctrl-names = "default";
246 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
252 freq-sel = <200000000>;
263 mmc-hs400-enhanced-strobe;
269 rockchip,i2s-broken-burst-len;
270 rockchip,playback-channels = <8>;
271 rockchip,capture-channels = <8>;
272 #sound-dai-cells = <0>;
276 #sound-dai-cells = <0>;
280 pinctrl-0 = <&spdif_bus_1>;
282 #sound-dai-cells = <0>;
287 i2c-scl-rising-time-ns = <168>;
288 i2c-scl-falling-time-ns = <4>;
289 clock-frequency = <400000>;
291 vdd_cpu_b: syr827@40 {
292 compatible = "silergy,syr827";
294 regulator-compatible = "fan53555-reg";
295 regulator-name = "vdd_cpu_b";
296 regulator-min-microvolt = <712500>;
297 regulator-max-microvolt = <1500000>;
298 regulator-ramp-delay = <1000>;
299 fcs,suspend-voltage-selector = <0>;
302 vin-supply = <&vcc_sys>;
303 regulator-state-mem {
304 regulator-off-in-suspend;
309 compatible = "silergy,syr828";
311 regulator-compatible = "fan53555-reg";
312 regulator-name = "vdd_gpu";
313 regulator-min-microvolt = <712500>;
314 regulator-max-microvolt = <1500000>;
315 regulator-ramp-delay = <1000>;
316 fcs,suspend-voltage-selector = <1>;
319 vin-supply = <&vcc_sys>;
320 regulator-initial-mode = <1>; /* 1:force PWM 2:auto */
321 regulator-state-mem {
322 regulator-off-in-suspend;
327 compatible = "rockchip,rk808";
329 interrupt-parent = <&gpio1>;
330 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
331 pinctrl-names = "default";
332 pinctrl-0 = <&pmic_int_l>;
333 rockchip,system-power-controller;
336 clock-output-names = "xin32k", "rk808-clkout2";
338 vcc1-supply = <&vcc_sys>;
339 vcc2-supply = <&vcc_sys>;
340 vcc3-supply = <&vcc_sys>;
341 vcc4-supply = <&vcc_sys>;
342 vcc6-supply = <&vcc_sys>;
343 vcc7-supply = <&vcc_sys>;
344 vcc8-supply = <&vcc3v3_sys>;
345 vcc9-supply = <&vcc_sys>;
346 vcc10-supply = <&vcc_sys>;
347 vcc11-supply = <&vcc_sys>;
348 vcc12-supply = <&vcc3v3_sys>;
349 vddio-supply = <&vcc_1v8>;
352 vdd_center: DCDC_REG1 {
353 regulator-name = "vdd_center";
354 regulator-min-microvolt = <750000>;
355 regulator-max-microvolt = <1350000>;
356 regulator-ramp-delay = <6001>;
359 regulator-state-mem {
360 regulator-off-in-suspend;
364 vdd_cpu_l: DCDC_REG2 {
365 regulator-name = "vdd_cpu_l";
366 regulator-min-microvolt = <750000>;
367 regulator-max-microvolt = <1350000>;
368 regulator-ramp-delay = <6001>;
371 regulator-state-mem {
372 regulator-off-in-suspend;
377 regulator-name = "vcc_ddr";
380 regulator-state-mem {
381 regulator-on-in-suspend;
386 regulator-name = "vcc_1v8";
387 regulator-min-microvolt = <1800000>;
388 regulator-max-microvolt = <1800000>;
391 regulator-state-mem {
392 regulator-on-in-suspend;
393 regulator-suspend-microvolt = <1800000>;
397 vcc1v8_dvp: LDO_REG1 {
398 regulator-name = "vcc1v8_dvp";
399 regulator-min-microvolt = <1800000>;
400 regulator-max-microvolt = <1800000>;
403 regulator-state-mem {
404 regulator-on-in-suspend;
405 regulator-suspend-microvolt = <1800000>;
409 vcca1v8_hdmi: LDO_REG2 {
410 regulator-name = "vcca1v8_hdmi";
411 regulator-min-microvolt = <1800000>;
412 regulator-max-microvolt = <1800000>;
415 regulator-state-mem {
416 regulator-on-in-suspend;
417 regulator-suspend-microvolt = <1800000>;
422 regulator-name = "vcca_1v8";
423 regulator-min-microvolt = <1800000>;
424 regulator-max-microvolt = <1800000>;
427 regulator-state-mem {
428 regulator-on-in-suspend;
429 regulator-suspend-microvolt = <1800000>;
434 regulator-name = "vcc_sd";
435 regulator-min-microvolt = <1800000>;
436 regulator-max-microvolt = <3300000>;
439 regulator-state-mem {
440 regulator-on-in-suspend;
441 regulator-suspend-microvolt = <3300000>;
445 vcc3v0_sd: LDO_REG5 {
446 regulator-name = "vcc3v0_sd";
447 regulator-min-microvolt = <3000000>;
448 regulator-max-microvolt = <3000000>;
451 regulator-state-mem {
452 regulator-on-in-suspend;
453 regulator-suspend-microvolt = <3000000>;
458 regulator-name = "vcc_1v5";
459 regulator-min-microvolt = <1500000>;
460 regulator-max-microvolt = <1500000>;
463 regulator-state-mem {
464 regulator-on-in-suspend;
465 regulator-suspend-microvolt = <1500000>;
469 vcca0v9_hdmi: LDO_REG7 {
470 regulator-name = "vcca0v9_hdmi";
471 regulator-min-microvolt = <900000>;
472 regulator-max-microvolt = <900000>;
475 regulator-state-mem {
476 regulator-on-in-suspend;
477 regulator-suspend-microvolt = <900000>;
482 regulator-name = "vcc_3v0";
483 regulator-min-microvolt = <3000000>;
484 regulator-max-microvolt = <3000000>;
487 regulator-state-mem {
488 regulator-on-in-suspend;
489 regulator-suspend-microvolt = <3000000>;
493 vcc3v3_s3: SWITCH_REG1 {
494 regulator-name = "vcc3v3_s3";
497 regulator-state-mem {
498 regulator-on-in-suspend;
502 vcc3v3_s0: SWITCH_REG2 {
503 regulator-name = "vcc3v3_s0";
506 regulator-state-mem {
507 regulator-on-in-suspend;
515 cpu-supply = <&vdd_cpu_l>;
519 cpu-supply = <&vdd_cpu_l>;
523 cpu-supply = <&vdd_cpu_l>;
527 cpu-supply = <&vdd_cpu_l>;
531 cpu-supply = <&vdd_cpu_b>;
535 cpu-supply = <&vdd_cpu_b>;
540 mali-supply = <&vdd_gpu>;
548 temperature = <85000>;
552 temperature = <100000>;
556 temperature = <105000>;
569 /* tshut mode 0:CRU 1:GPIO */
570 rockchip,hw-tshut-mode = <1>;
571 /* tshut polarity 0:LOW 1:HIGH */
572 rockchip,hw-tshut-polarity = <1>;
573 rockchip,hw-tshut-temp = <110000>;
581 u2phy0_otg: otg-port {
585 u2phy0_host: host-port {
586 phy-supply = <&vcc5v0_host>;
594 u2phy1_otg: otg-port {
598 u2phy1_host: host-port {
599 phy-supply = <&vcc5v0_host>;
605 pinctrl-names = "default";
606 pinctrl-0 = <&uart0_xfer &uart0_cts>;
656 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
657 compatible = "rockchip,remotectl-pwm";
662 rockchip,usercode = <0x4040>;
672 <0xe3 KEY_VOLUMEDOWN>,
689 rockchip,usercode = <0xff00>;
699 <0xeb KEY_VOLUMEDOWN>,
704 <0xa9 KEY_VOLUMEDOWN>,
705 <0xa8 KEY_VOLUMEDOWN>,
706 <0xe0 KEY_VOLUMEDOWN>,
707 <0xa5 KEY_VOLUMEDOWN>,
712 <0xed KEY_VOLUMEDOWN>,
714 <0xb3 KEY_VOLUMEDOWN>,
715 <0xf1 KEY_VOLUMEDOWN>,
716 <0xf2 KEY_VOLUMEDOWN>,
718 <0xb4 KEY_VOLUMEDOWN>,
723 rockchip,usercode = <0x1dcc>;
733 <0xfd KEY_VOLUMEDOWN>,
751 <0xb5 KEY_BACKSPACE>;
756 phy-supply = <&vcc_phy>;
758 clock_in_out = "input";
759 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
760 snps,reset-active-low;
761 snps,reset-delays-us = <0 10000 50000>;
762 assigned-clocks = <&cru SCLK_RMII_SRC>;
763 assigned-clock-parents = <&clkin_gmac>;
764 pinctrl-names = "default", "sleep";
765 pinctrl-0 = <&rgmii_pins>;
766 pinctrl-1 = <&rgmii_sleep_pins>;
777 #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
781 native-mode = <&timing1>; /* 1080p */
793 rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
798 rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC0>;
800 <165000000 0 0 17 18 18 18>,
801 <340000000 0 2 17 14 14 14>,
802 <594000000 0 2 17 9 9 9>;
813 dp_vop_sel = <DISPLAY_SOURCE_LCDC1>;
822 wifi_enable_h: wifi-enable-h {
824 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
829 uart0_gpios: uart0-gpios {
831 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
836 host_vbus_drv: host-vbus-drv {
838 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
843 pmic_int_l: pmic-int-l {
845 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
850 rgmii_sleep_pins: rgmii-sleep-pins {
852 <3 15 RK_FUNC_GPIO &pcfg_output_low>;