arch/arm64/boot/dts/rockchip/rk3399-box.dtsi

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42 #include <dt-bindings/pwm/pwm.h>
  43 #include <dt-bindings/input/input.h>
  44 #include "rk3399.dtsi"
  45 #include "rk3399-android.dtsi"
  46
  47 / {
  48         compatible = "rockchip,rk3399-box","rockchip,rk3399";
  49
  50         vcc1v8_s0: vcc1v8-s0 {
  51                 compatible = "regulator-fixed";
  52                 regulator-name = "vcc1v8_s0";
  53                 regulator-min-microvolt = <1800000>;
  54                 regulator-max-microvolt = <1800000>;
  55                 regulator-always-on;
  56         };
  57
  58         vcc_sys: vcc-sys {
  59                 compatible = "regulator-fixed";
  60                 regulator-name = "vcc_sys";
  61                 regulator-min-microvolt = <5000000>;
  62                 regulator-max-microvolt = <5000000>;
  63                 regulator-always-on;
  64         };
  65
  66         vcc_phy: vcc-phy-regulator {
  67                 compatible = "regulator-fixed";
  68                 regulator-name = "vcc_phy";
  69                 regulator-always-on;
  70                 regulator-boot-on;
  71         };
  72
  73         vcc3v3_sys: vcc3v3-sys {
  74                 compatible = "regulator-fixed";
  75                 regulator-name = "vcc3v3_sys";
  76                 regulator-min-microvolt = <3300000>;
  77                 regulator-max-microvolt = <3300000>;
  78                 regulator-always-on;
  79                 vin-supply = <&vcc_sys>;
  80         };
  81
  82         vcc5v0_host: vcc5v0-host-regulator {
  83                 compatible = "regulator-fixed";
  84                 enable-active-high;
  85                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  86                 pinctrl-names = "default";
  87                 pinctrl-0 = <&host_vbus_drv>;
  88                 regulator-name = "vcc5v0_host";
  89         };
  90
  91         vdd_log: vdd-log {
  92                 compatible = "pwm-regulator";
  93                 pwms = <&pwm2 0 25000 0>;
  94                 regulator-name = "vdd_log";
  95                 regulator-min-microvolt = <800000>;
  96                 regulator-max-microvolt = <1400000>;
  97                 regulator-always-on;
  98                 regulator-boot-on;
  99
 100                 /* for rockchip boot on */
 101                 rockchip,pwm_id= <2>;
 102                 rockchip,pwm_voltage = <900000>;
 103
 104                 vin-supply = <&vcc_sys>;
 105         };
 106
 107         clkin_gmac: external-gmac-clock {
 108                 compatible = "fixed-clock";
 109                 clock-frequency = <125000000>;
 110                 clock-output-names = "clkin_gmac";
 111                 #clock-cells = <0>;
 112         };
 113
 114         io-domains {
 115                 compatible = "rockchip,rk3399-io-voltage-domain";
 116                 rockchip,grf = <&grf>;
 117
 118                 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
 119                 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
 120                 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
 121                 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
 122         };
 123
 124         pmu-io-domains {
 125                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 126                 rockchip,grf = <&pmugrf>;
 127
 128                 pmu1830-supply = <&vcc_1v8>;
 129         };
 130
 131         spdif-sound {
 132                 status = "okay";
 133                 compatible = "simple-audio-card";
 134                 simple-audio-card,name = "ROCKCHIP,SPDIF";
 135                 simple-audio-card,cpu {
 136                         sound-dai = <&spdif>;
 137                 };
 138                 simple-audio-card,codec {
 139                         sound-dai = <&spdif_out>;
 140                 };
 141         };
 142
 143         spdif_out: spdif-out {
 144                 status = "okay";
 145                 compatible = "linux,spdif-dit";
 146                 #sound-dai-cells = <0>;
 147         };
 148
 149         hdmi_sound: hdmi-sound {
 150                 status = "disabled";
 151                 compatible = "simple-audio-card";
 152                 simple-audio-card,format = "i2s";
 153                 simple-audio-card,mclk-fs = <256>;
 154                 simple-audio-card,name = "rockchip,hdmi";
 155                 simple-audio-card,cpu {
 156                         sound-dai = <&i2s2>;
 157                 };
 158                 simple-audio-card,codec {
 159                         sound-dai = <&dw_hdmi_audio>;
 160                 };
 161         };
 162
 163         dw_hdmi_audio: dw-hdmi-audio {
 164                 status = "okay";
 165                 compatible = "rockchip,dw-hdmi-audio";
 166                 #sound-dai-cells = <0>;
 167         };
 168
 169         sdio_pwrseq: sdio-pwrseq {
 170                 compatible = "mmc-pwrseq-simple";
 171                 clocks = <&rk808 1>;
 172                 clock-names = "ext_clock";
 173                 pinctrl-names = "default";
 174                 pinctrl-0 = <&wifi_enable_h>;
 175
 176                 /*
 177                  * On the module itself this is one of these (depending
 178                  * on the actual card populated):
 179                  * - SDIO_RESET_L_WL_REG_ON
 180                  * - PDN (power down when low)
 181                  */
 182                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 183         };
 184
 185         wireless-wlan {
 186                 compatible = "wlan-platdata";
 187                 rockchip,grf = <&grf>;
 188                 wifi_chip_type = "ap6354";
 189                 sdio_vref = <1800>;
 190                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
 191                 status = "okay";
 192         };
 193
 194         wireless-bluetooth {
 195                 compatible = "bluetooth-platdata";
 196                 clocks = <&rk808 1>;
 197                 clock-names = "ext_clock";
 198                 /* wifi-bt-power-toggle; */
 199                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
 200                 pinctrl-names = "default", "rts_gpio";
 201                 pinctrl-0 = <&uart0_rts>;
 202                 pinctrl-1 = <&uart0_gpios>;
 203                 /* BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; */
 204                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>;
 205                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>;
 206                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
 207                 status = "okay";
 208         };
 209
 210         test-power {
 211                 status = "okay";
 212         };
 213 };
 214
 215 &sdmmc {
 216         clock-frequency = <100000000>;
 217         clock-freq-min-max = <100000 100000000>;
 218         supports-sd;
 219         bus-width = <4>;
 220         cap-mmc-highspeed;
 221         cap-sd-highspeed;
 222         disable-wp;
 223         num-slots = <1>;
 224         //sd-uhs-sdr104;
 225         vqmmc-supply = <&vcc_sd>;
 226         pinctrl-names = "default";
 227         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 228         card-detect-delay = <800>;
 229         status = "okay";
 230 };
 231
 232 &sdio0 {
 233         clock-frequency = <100000000>;
 234         clock-freq-min-max = <200000 100000000>;
 235         supports-sdio;
 236         bus-width = <4>;
 237         disable-wp;
 238         cap-sd-highspeed;
 239         cap-sdio-irq;
 240         keep-power-in-suspend;
 241         mmc-pwrseq = <&sdio_pwrseq>;
 242         non-removable;
 243         num-slots = <1>;
 244         pinctrl-names = "default";
 245         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 246         sd-uhs-sdr104;
 247         status = "okay";
 248 };
 249
 250 &emmc_phy {
 251         freq-sel = <200000000>;
 252         dr-sel = <50>;
 253         opdelay = <4>;
 254         status = "okay";
 255 };
 256
 257 &sdhci {
 258         bus-width = <8>;
 259         mmc-hs400-1_8v;
 260         supports-emmc;
 261         non-removable;
 262         mmc-hs400-enhanced-strobe;
 263         status = "okay";
 264 };
 265
 266 &i2s0 {
 267         status = "okay";
 268         rockchip,i2s-broken-burst-len;
 269         rockchip,playback-channels = <8>;
 270         rockchip,capture-channels = <8>;
 271         #sound-dai-cells = <0>;
 272 };
 273
 274 &i2s2 {
 275         #sound-dai-cells = <0>;
 276 };
 277
 278 &spdif {
 279         pinctrl-0 = <&spdif_bus_1>;
 280         status = "okay";
 281         #sound-dai-cells = <0>;
 282 };
 283
 284 &cluster0_opp {
 285         opp@408000000 {
 286                 opp-hz = /bits/ 64 <408000000>;
 287                 opp-microvolt = <800000>;
 288                 clock-latency-ns = <40000>;
 289         };
 290         opp@600000000 {
 291                 opp-hz = /bits/ 64 <600000000>;
 292                 opp-microvolt = <800000>;
 293                 clock-latency-ns = <40000>;
 294         };
 295         opp@816000000 {
 296                 opp-hz = /bits/ 64 <816000000>;
 297                 opp-microvolt = <800000>;
 298                 clock-latency-ns = <40000>;
 299         };
 300         opp@1008000000 {
 301                 opp-hz = /bits/ 64 <1008000000>;
 302                 opp-microvolt = <875000>;
 303                 clock-latency-ns = <40000>;
 304         };
 305         opp@1200000000 {
 306                 opp-hz = /bits/ 64 <1200000000>;
 307                 opp-microvolt = <925000>;
 308                 clock-latency-ns = <40000>;
 309         };
 310         opp@1416000000 {
 311                 opp-hz = /bits/ 64 <1416000000>;
 312                 opp-microvolt = <1050000>;
 313                 clock-latency-ns = <40000>;
 314         };
 315         opp@1512000000 {
 316                 opp-hz = /bits/ 64 <1512000000>;
 317                 opp-microvolt = <1125000>;
 318                 clock-latency-ns = <40000>;
 319         };
 320 };
 321
 322 &cluster1_opp {
 323         opp@408000000 {
 324                 opp-hz = /bits/ 64 <408000000>;
 325                 opp-microvolt = <800000>;
 326                 clock-latency-ns = <40000>;
 327         };
 328         opp@600000000 {
 329                 opp-hz = /bits/ 64 <600000000>;
 330                 opp-microvolt = <800000>;
 331                 clock-latency-ns = <40000>;
 332         };
 333         opp@816000000 {
 334                 opp-hz = /bits/ 64 <816000000>;
 335                 opp-microvolt = <825000>;
 336                 clock-latency-ns = <40000>;
 337         };
 338         opp@1008000000 {
 339                 opp-hz = /bits/ 64 <1008000000>;
 340                 opp-microvolt = <875000>;
 341                 clock-latency-ns = <40000>;
 342         };
 343         opp@1200000000 {
 344                 opp-hz = /bits/ 64 <1200000000>;
 345                 opp-microvolt = <950000>;
 346                 clock-latency-ns = <40000>;
 347         };
 348         opp@1416000000 {
 349                 opp-hz = /bits/ 64 <1416000000>;
 350                 opp-microvolt = <1025000>;
 351                 clock-latency-ns = <40000>;
 352         };
 353         opp@1608000000 {
 354                 opp-hz = /bits/ 64 <1608000000>;
 355                 opp-microvolt = <1100000>;
 356                 clock-latency-ns = <40000>;
 357         };
 358         opp@1800000000 {
 359                 opp-hz = /bits/ 64 <1800000000>;
 360                 opp-microvolt = <1175000>;
 361                 clock-latency-ns = <40000>;
 362         };
 363         opp@1992000000 {
 364                 opp-hz = /bits/ 64 <1992000000>;
 365                 opp-microvolt = <1250000>;
 366                 clock-latency-ns = <40000>;
 367         };
 368 };
 369
 370 &CPU_COST_A72 {
 371         busy-cost-data = <
 372                 210   129       /*  408MHz */
 373                 308   184       /*  600MHz */
 374                 419   246       /*  816MHz */
 375                 518   335       /* 1008MHz */
 376                 617   428       /* 1200MHz */
 377                 728   573       /* 1416MHz */
 378                 827   724       /* 1608MHz */
 379                 925   900       /* 1800MHz */
 380                 1024  1108      /* 1992MHz */
 381         >;
 382         idle-cost-data = <
 383               15
 384               15
 385                0
 386         >;
 387 };
 388
 389 &CPU_COST_A53 {
 390         busy-cost-data = <
 391                 108    46       /*  408M */
 392                 159    67       /*  600M */
 393                 216    90       /*  816M */
 394                 267    120      /* 1008M */
 395                 318    153      /* 1200M */
 396                 375    198      /* 1416M */
 397                 401    222      /* 1512M */
 398         >;
 399         idle-cost-data = <
 400               6
 401               6
 402               0
 403         >;
 404 };
 405
 406 &CLUSTER_COST_A72 {
 407         busy-cost-data = <
 408                 210   129       /*  408MHz */
 409                 308   184       /*  600MHz */
 410                 419   246       /*  816MHz */
 411                 518   335       /* 1008MHz */
 412                 617   428       /* 1200MHz */
 413                 728   573       /* 1416MHz */
 414                 827   724       /* 1608MHz */
 415                 925   900       /* 1800MHz */
 416                 1024  1108      /* 1992MHz */
 417         >;
 418         idle-cost-data = <
 419                  65
 420                  65
 421                  65
 422         >;
 423 };
 424
 425 &CLUSTER_COST_A53 {
 426         busy-cost-data = <
 427                 108    46       /*  408M */
 428                 159    67       /*  600M */
 429                 216    90       /*  816M */
 430                 267    120      /* 1008M */
 431                 318    153      /* 1200M */
 432                 375    198      /* 1416M */
 433                 401    222      /* 1512M */
 434         >;
 435         idle-cost-data = <
 436                 56
 437                 56
 438                 56
 439         >;
 440 };
 441
 442 &gpu_opp_table {
 443         opp@200000000 {
 444                 opp-hz = /bits/ 64 <200000000>;
 445                 opp-microvolt = <800000>;
 446         };
 447         opp@300000000 {
 448                 opp-hz = /bits/ 64 <300000000>;
 449                 opp-microvolt = <800000>;
 450         };
 451         opp@400000000 {
 452                 opp-hz = /bits/ 64 <400000000>;
 453                 opp-microvolt = <800000>;
 454         };
 455         opp@500000000 {
 456                 opp-hz = /bits/ 64 <500000000>;
 457                 opp-microvolt = <900000>;
 458         };
 459         opp@600000000 {
 460                 opp-hz = /bits/ 64 <600000000>;
 461                 opp-microvolt = <900000>;
 462         };
 463         opp@800000000 {
 464                 opp-hz = /bits/ 64 <800000000>;
 465                 opp-microvolt = <1000000>;
 466         };
 467 };
 468
 469 &i2c0 {
 470         status = "okay";
 471         i2c-scl-rising-time-ns = <168>;
 472         i2c-scl-falling-time-ns = <4>;
 473         clock-frequency = <400000>;
 474
 475         vdd_cpu_b: syr827@40 {
 476                 compatible = "silergy,syr827";
 477                 reg = <0x40>;
 478                 regulator-compatible = "fan53555-reg";
 479                 regulator-name = "vdd_cpu_b";
 480                 regulator-min-microvolt = <712500>;
 481                 regulator-max-microvolt = <1500000>;
 482                 regulator-ramp-delay = <1000>;
 483                 fcs,suspend-voltage-selector = <0>;
 484                 regulator-always-on;
 485                 regulator-boot-on;
 486                 vin-supply = <&vcc_sys>;
 487                 regulator-state-mem {
 488                         regulator-off-in-suspend;
 489                 };
 490         };
 491
 492         vdd_gpu: syr828@41 {
 493                 compatible = "silergy,syr828";
 494                 reg = <0x41>;
 495                 regulator-compatible = "fan53555-reg";
 496                 regulator-name = "vdd_gpu";
 497                 regulator-min-microvolt = <712500>;
 498                 regulator-max-microvolt = <1500000>;
 499                 regulator-ramp-delay = <1000>;
 500                 fcs,suspend-voltage-selector = <1>;
 501                 regulator-always-on;
 502                 regulator-boot-on;
 503                 vin-supply = <&vcc_sys>;
 504                 regulator-initial-mode = <1>; /* 1:force PWM 2:auto */
 505                 regulator-state-mem {
 506                         regulator-off-in-suspend;
 507                 };
 508         };
 509
 510         rk808: pmic@1b {
 511                 compatible = "rockchip,rk808";
 512                 reg = <0x1b>;
 513                 interrupt-parent = <&gpio1>;
 514                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 515                 pinctrl-names = "default";
 516                 pinctrl-0 = <&pmic_int_l>;
 517                 rockchip,system-power-controller;
 518                 wakeup-source;
 519                 #clock-cells = <1>;
 520                 clock-output-names = "xin32k", "rk808-clkout2";
 521
 522                 vcc1-supply = <&vcc_sys>;
 523                 vcc2-supply = <&vcc_sys>;
 524                 vcc3-supply = <&vcc_sys>;
 525                 vcc4-supply = <&vcc_sys>;
 526                 vcc6-supply = <&vcc_sys>;
 527                 vcc7-supply = <&vcc_sys>;
 528                 vcc8-supply = <&vcc3v3_sys>;
 529                 vcc9-supply = <&vcc_sys>;
 530                 vcc10-supply = <&vcc_sys>;
 531                 vcc11-supply = <&vcc_sys>;
 532                 vcc12-supply = <&vcc3v3_sys>;
 533                 vddio-supply = <&vcc_1v8>;
 534
 535                 regulators {
 536                         vdd_center: DCDC_REG1 {
 537                                 regulator-name = "vdd_center";
 538                                 regulator-min-microvolt = <750000>;
 539                                 regulator-max-microvolt = <1350000>;
 540                                 regulator-ramp-delay = <6001>;
 541                                 regulator-always-on;
 542                                 regulator-boot-on;
 543                                 regulator-state-mem {
 544                                         regulator-off-in-suspend;
 545                                 };
 546                         };
 547
 548                         vdd_cpu_l: DCDC_REG2 {
 549                                 regulator-name = "vdd_cpu_l";
 550                                 regulator-min-microvolt = <750000>;
 551                                 regulator-max-microvolt = <1350000>;
 552                                 regulator-ramp-delay = <6001>;
 553                                 regulator-always-on;
 554                                 regulator-boot-on;
 555                                 regulator-state-mem {
 556                                         regulator-off-in-suspend;
 557                                 };
 558                         };
 559
 560                         vcc_ddr: DCDC_REG3 {
 561                                 regulator-name = "vcc_ddr";
 562                                 regulator-always-on;
 563                                 regulator-boot-on;
 564                                 regulator-state-mem {
 565                                         regulator-on-in-suspend;
 566                                 };
 567                         };
 568
 569                         vcc_1v8: DCDC_REG4 {
 570                                 regulator-name = "vcc_1v8";
 571                                 regulator-min-microvolt = <1800000>;
 572                                 regulator-max-microvolt = <1800000>;
 573                                 regulator-always-on;
 574                                 regulator-boot-on;
 575                                 regulator-state-mem {
 576                                         regulator-on-in-suspend;
 577                                         regulator-suspend-microvolt = <1800000>;
 578                                 };
 579                         };
 580
 581                         vcc1v8_dvp: LDO_REG1 {
 582                                 regulator-name = "vcc1v8_dvp";
 583                                 regulator-min-microvolt = <1800000>;
 584                                 regulator-max-microvolt = <1800000>;
 585                                 regulator-always-on;
 586                                 regulator-boot-on;
 587                                 regulator-state-mem {
 588                                         regulator-on-in-suspend;
 589                                         regulator-suspend-microvolt = <1800000>;
 590                                 };
 591                         };
 592
 593                         vcca1v8_hdmi: LDO_REG2 {
 594                                 regulator-name = "vcca1v8_hdmi";
 595                                 regulator-min-microvolt = <1800000>;
 596                                 regulator-max-microvolt = <1800000>;
 597                                 regulator-always-on;
 598                                 regulator-boot-on;
 599                                 regulator-state-mem {
 600                                         regulator-on-in-suspend;
 601                                         regulator-suspend-microvolt = <1800000>;
 602                                 };
 603                         };
 604
 605                         vcca_1v8: LDO_REG3 {
 606                                 regulator-name = "vcca_1v8";
 607                                 regulator-min-microvolt = <1800000>;
 608                                 regulator-max-microvolt = <1800000>;
 609                                 regulator-always-on;
 610                                 regulator-boot-on;
 611                                 regulator-state-mem {
 612                                         regulator-on-in-suspend;
 613                                         regulator-suspend-microvolt = <1800000>;
 614                                 };
 615                         };
 616
 617                         vcc_sd: LDO_REG4 {
 618                                 regulator-name = "vcc_sd";
 619                                 regulator-min-microvolt = <1800000>;
 620                                 regulator-max-microvolt = <3300000>;
 621                                 regulator-always-on;
 622                                 regulator-boot-on;
 623                                 regulator-state-mem {
 624                                         regulator-on-in-suspend;
 625                                         regulator-suspend-microvolt = <3300000>;
 626                                 };
 627                         };
 628
 629                         vcc3v0_sd: LDO_REG5 {
 630                                 regulator-name = "vcc3v0_sd";
 631                                 regulator-min-microvolt = <3000000>;
 632                                 regulator-max-microvolt = <3000000>;
 633                                 regulator-always-on;
 634                                 regulator-boot-on;
 635                                 regulator-state-mem {
 636                                         regulator-on-in-suspend;
 637                                         regulator-suspend-microvolt = <3000000>;
 638                                 };
 639                         };
 640
 641                         vcc_1v5: LDO_REG6 {
 642                                 regulator-name = "vcc_1v5";
 643                                 regulator-min-microvolt = <1500000>;
 644                                 regulator-max-microvolt = <1500000>;
 645                                 regulator-always-on;
 646                                 regulator-boot-on;
 647                                 regulator-state-mem {
 648                                         regulator-on-in-suspend;
 649                                         regulator-suspend-microvolt = <1500000>;
 650                                 };
 651                         };
 652
 653                         vcca0v9_hdmi: LDO_REG7 {
 654                                 regulator-name = "vcca0v9_hdmi";
 655                                 regulator-min-microvolt = <900000>;
 656                                 regulator-max-microvolt = <900000>;
 657                                 regulator-always-on;
 658                                 regulator-boot-on;
 659                                 regulator-state-mem {
 660                                         regulator-on-in-suspend;
 661                                         regulator-suspend-microvolt = <900000>;
 662                                 };
 663                         };
 664
 665                         vcc_3v0: LDO_REG8 {
 666                                 regulator-name = "vcc_3v0";
 667                                 regulator-min-microvolt = <3000000>;
 668                                 regulator-max-microvolt = <3000000>;
 669                                 regulator-always-on;
 670                                 regulator-boot-on;
 671                                 regulator-state-mem {
 672                                         regulator-on-in-suspend;
 673                                         regulator-suspend-microvolt = <3000000>;
 674                                 };
 675                         };
 676
 677                         vcc3v3_s3: SWITCH_REG1 {
 678                                 regulator-name = "vcc3v3_s3";
 679                                 regulator-always-on;
 680                                 regulator-boot-on;
 681                                 regulator-state-mem {
 682                                         regulator-on-in-suspend;
 683                                 };
 684                         };
 685
 686                         vcc3v3_s0: SWITCH_REG2 {
 687                                 regulator-name = "vcc3v3_s0";
 688                                 regulator-always-on;
 689                                 regulator-boot-on;
 690                                 regulator-state-mem {
 691                                         regulator-on-in-suspend;
 692                                 };
 693                         };
 694                 };
 695         };
 696 };
 697
 698 &cpu_l0 {
 699         cpu-supply = <&vdd_cpu_l>;
 700 };
 701
 702 &cpu_l1 {
 703         cpu-supply = <&vdd_cpu_l>;
 704 };
 705
 706 &cpu_l2 {
 707         cpu-supply = <&vdd_cpu_l>;
 708 };
 709
 710 &cpu_l3 {
 711         cpu-supply = <&vdd_cpu_l>;
 712 };
 713
 714 &cpu_b0 {
 715         cpu-supply = <&vdd_cpu_b>;
 716 };
 717
 718 &cpu_b1 {
 719         cpu-supply = <&vdd_cpu_b>;
 720 };
 721
 722 &gpu {
 723         status = "okay";
 724         mali-supply = <&vdd_gpu>;
 725 };
 726
 727 &rga {
 728         status = "okay";
 729 };
 730
 731 &threshold {
 732         temperature = <85000>;
 733 };
 734
 735 &target {
 736         temperature = <100000>;
 737 };
 738
 739 &soc_crit {
 740         temperature = <105000>;
 741 };
 742
 743 &tcphy0 {
 744         extcon = <&fusb0>;
 745         status = "okay";
 746 };
 747
 748 &tcphy1 {
 749         status = "okay";
 750 };
 751
 752 &tsadc {
 753         /* tshut mode 0:CRU 1:GPIO */
 754         rockchip,hw-tshut-mode = <1>;
 755         /* tshut polarity 0:LOW 1:HIGH */
 756         rockchip,hw-tshut-polarity = <1>;
 757         rockchip,hw-tshut-temp = <110000>;
 758         status = "okay";
 759 };
 760
 761 &u2phy0 {
 762         status = "okay";
 763         extcon = <&fusb0>;
 764
 765         u2phy0_otg: otg-port {
 766                 status = "okay";
 767         };
 768
 769         u2phy0_host: host-port {
 770                 phy-supply = <&vcc5v0_host>;
 771                 status = "okay";
 772         };
 773 };
 774
 775 &u2phy1 {
 776         status = "okay";
 777
 778         u2phy1_otg: otg-port {
 779                 status = "okay";
 780         };
 781
 782         u2phy1_host: host-port {
 783                 phy-supply = <&vcc5v0_host>;
 784                 status = "okay";
 785         };
 786 };
 787
 788 &uart0 {
 789         pinctrl-names = "default";
 790         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 791         status = "okay";
 792 };
 793
 794 &uart2 {
 795         status = "okay";
 796 };
 797
 798 &usb_host0_ehci {
 799         status = "okay";
 800 };
 801
 802 &usb_host0_ohci {
 803         status = "okay";
 804 };
 805
 806 &usb_host1_ehci {
 807         status = "okay";
 808 };
 809
 810 &usb_host1_ohci {
 811         status = "okay";
 812 };
 813
 814 &usbdrd3_0 {
 815         extcon = <&fusb0>;
 816         status = "okay";
 817 };
 818
 819 &usbdrd_dwc3_0 {
 820         dr_mode = "otg";
 821         status = "okay";
 822 };
 823
 824 &usbdrd3_1 {
 825         status = "okay";
 826 };
 827
 828 &usbdrd_dwc3_1 {
 829         dr_mode = "host";
 830         status = "okay";
 831 };
 832
 833 &pwm2 {
 834         status = "okay";
 835 };
 836
 837 &pwm3 {
 838         status = "okay";
 839
 840         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
 841         compatible = "rockchip,remotectl-pwm";
 842         remote_pwm_id = <3>;
 843         handle_cpu_id = <0>;
 844
 845         ir_key1 {
 846                 rockchip,usercode = <0x4040>;
 847                 rockchip,key_table =
 848                         <0xf2   KEY_REPLY>,
 849                         <0xba   KEY_BACK>,
 850                         <0xf4   KEY_UP>,
 851                         <0xf1   KEY_DOWN>,
 852                         <0xef   KEY_LEFT>,
 853                         <0xee   KEY_RIGHT>,
 854                         <0xbd   KEY_HOME>,
 855                         <0xea   KEY_VOLUMEUP>,
 856                         <0xe3   KEY_VOLUMEDOWN>,
 857                         <0xe2   KEY_SEARCH>,
 858                         <0xb2   KEY_POWER>,
 859                         <0xbc   KEY_MUTE>,
 860                         <0xec   KEY_MENU>,
 861                         <0xbf   0x190>,
 862                         <0xe0   0x191>,
 863                         <0xe1   0x192>,
 864                         <0xe9   183>,
 865                         <0xe6   248>,
 866                         <0xe8   185>,
 867                         <0xe7   186>,
 868                         <0xf0   388>,
 869                         <0xbe   0x175>;
 870         };
 871
 872         ir_key2 {
 873                 rockchip,usercode = <0xff00>;
 874                 rockchip,key_table =
 875                         <0xf9   KEY_HOME>,
 876                         <0xbf   KEY_BACK>,
 877                         <0xfb   KEY_MENU>,
 878                         <0xaa   KEY_REPLY>,
 879                         <0xb9   KEY_UP>,
 880                         <0xe9   KEY_DOWN>,
 881                         <0xb8   KEY_LEFT>,
 882                         <0xea   KEY_RIGHT>,
 883                         <0xeb   KEY_VOLUMEDOWN>,
 884                         <0xef   KEY_VOLUMEUP>,
 885                         <0xf7   KEY_MUTE>,
 886                         <0xe7   KEY_POWER>,
 887                         <0xfc   KEY_POWER>,
 888                         <0xa9   KEY_VOLUMEDOWN>,
 889                         <0xa8   KEY_VOLUMEDOWN>,
 890                         <0xe0   KEY_VOLUMEDOWN>,
 891                         <0xa5   KEY_VOLUMEDOWN>,
 892                         <0xab   183>,
 893                         <0xb7   388>,
 894                         <0xf8   184>,
 895                         <0xaf   185>,
 896                         <0xed   KEY_VOLUMEDOWN>,
 897                         <0xee   186>,
 898                         <0xb3   KEY_VOLUMEDOWN>,
 899                         <0xf1   KEY_VOLUMEDOWN>,
 900                         <0xf2   KEY_VOLUMEDOWN>,
 901                         <0xf3   KEY_SEARCH>,
 902                         <0xb4   KEY_VOLUMEDOWN>,
 903                         <0xbe   KEY_SEARCH>;
 904         };
 905
 906         ir_key3 {
 907                 rockchip,usercode = <0x1dcc>;
 908                 rockchip,key_table =
 909                         <0xee   KEY_REPLY>,
 910                         <0xf0   KEY_BACK>,
 911                         <0xf8   KEY_UP>,
 912                         <0xbb   KEY_DOWN>,
 913                         <0xef   KEY_LEFT>,
 914                         <0xed   KEY_RIGHT>,
 915                         <0xfc   KEY_HOME>,
 916                         <0xf1   KEY_VOLUMEUP>,
 917                         <0xfd   KEY_VOLUMEDOWN>,
 918                         <0xb7   KEY_SEARCH>,
 919                         <0xff   KEY_POWER>,
 920                         <0xf3   KEY_MUTE>,
 921                         <0xbf   KEY_MENU>,
 922                         <0xf9   0x191>,
 923                         <0xf5   0x192>,
 924                         <0xb3   388>,
 925                         <0xbe   KEY_1>,
 926                         <0xba   KEY_2>,
 927                         <0xb2   KEY_3>,
 928                         <0xbd   KEY_4>,
 929                         <0xf9   KEY_5>,
 930                         <0xb1   KEY_6>,
 931                         <0xfc   KEY_7>,
 932                         <0xf8   KEY_8>,
 933                         <0xb0   KEY_9>,
 934                         <0xb6   KEY_0>,
 935                         <0xb5   KEY_BACKSPACE>;
 936         };
 937 };
 938
 939 &gmac {
 940         phy-supply = <&vcc_phy>;
 941         phy-mode = "rgmii";
 942         clock_in_out = "input";
 943         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
 944         snps,reset-active-low;
 945         snps,reset-delays-us = <0 10000 50000>;
 946         assigned-clocks = <&cru SCLK_RMII_SRC>;
 947         assigned-clock-parents = <&clkin_gmac>;
 948         pinctrl-names = "default", "sleep";
 949         pinctrl-0 = <&rgmii_pins>;
 950         pinctrl-1 = <&rgmii_sleep_pins>;
 951         tx_delay = <0x28>;
 952         rx_delay = <0x11>;
 953         status = "okay";
 954 };
 955
 956 &saradc {
 957         status = "okay";
 958 };
 959
 960 &rk_screen {
 961         #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
 962 };
 963
 964 &disp_timings {
 965         native-mode = <&timing1>; /* 1080p */
 966 };
 967
 968 &vopb_rk_fb {
 969         status = "okay";
 970 };
 971
 972 &vopl_rk_fb {
 973         status = "okay";
 974 };
 975
 976 &fb {
 977         rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
 978 };
 979
 980 &hdmi_rk_fb {
 981         status = "okay";
 982         rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC0>;
 983         rockchip,phy_table =
 984                 <165000000 0 0 17 18 18 18>,
 985                 <340000000 0 2 17 14 14 14>,
 986                 <594000000 0 2 17  9  9  9>;
 987 };
 988
 989 &cdn_dp_sound {
 990         status = "okay";
 991 };
 992
 993 &cdn_dp_fb {
 994         status = "okay";
 995         extcon = <&fusb0>;
 996         phys = <&tcphy0_dp>;
 997         dp_vop_sel = <DISPLAY_SOURCE_LCDC1>;
 998 };
 999
1000 &i2s2 {
1001         status = "okay";
1002 };
1003
1004 &pinctrl {
1005         sdio-pwrseq {
1006                 wifi_enable_h: wifi-enable-h {
1007                         rockchip,pins =
1008                                 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
1009                 };
1010         };
1011
1012         wireless-bluetooth {
1013                 uart0_gpios: uart0-gpios {
1014                         rockchip,pins =
1015                                 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
1016                 };
1017         };
1018
1019         usb2 {
1020                 host_vbus_drv: host-vbus-drv {
1021                         rockchip,pins =
1022                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1023                 };
1024         };
1025
1026         pmic {
1027                 pmic_int_l: pmic-int-l {
1028                         rockchip,pins =
1029                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
1030                 };
1031         };
1032
1033         gmac {
1034                 rgmii_sleep_pins: rgmii-sleep-pins {
1035                         rockchip,pins =
1036                                 <3 15 RK_FUNC_GPIO &pcfg_output_low>;
1037                 };
1038         };
1039 };
1040
1041 &pvtm {
1042         status = "okay";
1043 };
1044
1045 &pmu_pvtm {
1046         status = "okay";
1047 };