arch/arm64/boot/dts/rockchip/rk3399-box.dtsi

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42 #include <dt-bindings/pwm/pwm.h>
  43 #include <dt-bindings/input/input.h>
  44 #include "rk3399.dtsi"
  45 #include "rk3399-android.dtsi"
  46
  47 / {
  48         compatible = "rockchip,rk3399-box","rockchip,rk3399";
  49
  50         vcc1v8_s0: vcc1v8-s0 {
  51                 compatible = "regulator-fixed";
  52                 regulator-name = "vcc1v8_s0";
  53                 regulator-min-microvolt = <1800000>;
  54                 regulator-max-microvolt = <1800000>;
  55                 regulator-always-on;
  56         };
  57
  58         vcc_sys: vcc-sys {
  59                 compatible = "regulator-fixed";
  60                 regulator-name = "vcc_sys";
  61                 regulator-min-microvolt = <5000000>;
  62                 regulator-max-microvolt = <5000000>;
  63                 regulator-always-on;
  64         };
  65
  66         vcc_phy: vcc-phy-regulator {
  67                 compatible = "regulator-fixed";
  68                 regulator-name = "vcc_phy";
  69                 regulator-always-on;
  70                 regulator-boot-on;
  71         };
  72
  73         vcc3v3_sys: vcc3v3-sys {
  74                 compatible = "regulator-fixed";
  75                 regulator-name = "vcc3v3_sys";
  76                 regulator-min-microvolt = <3300000>;
  77                 regulator-max-microvolt = <3300000>;
  78                 regulator-always-on;
  79                 vin-supply = <&vcc_sys>;
  80         };
  81
  82         vcc5v0_host: vcc5v0-host-regulator {
  83                 compatible = "regulator-fixed";
  84                 enable-active-high;
  85                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  86                 pinctrl-names = "default";
  87                 pinctrl-0 = <&host_vbus_drv>;
  88                 regulator-name = "vcc5v0_host";
  89         };
  90
  91         vdd_log: vdd-log {
  92                 compatible = "pwm-regulator";
  93                 pwms = <&pwm2 0 25000 0>;
  94                 regulator-name = "vdd_log";
  95                 regulator-min-microvolt = <800000>;
  96                 regulator-max-microvolt = <1400000>;
  97                 regulator-always-on;
  98                 regulator-boot-on;
  99
 100                 /* for rockchip boot on */
 101                 rockchip,pwm_id= <2>;
 102                 rockchip,pwm_voltage = <900000>;
 103
 104                 vin-supply = <&vcc_sys>;
 105         };
 106
 107         clkin_gmac: external-gmac-clock {
 108                 compatible = "fixed-clock";
 109                 clock-frequency = <125000000>;
 110                 clock-output-names = "clkin_gmac";
 111                 #clock-cells = <0>;
 112         };
 113
 114         io-domains {
 115                 compatible = "rockchip,rk3399-io-voltage-domain";
 116                 rockchip,grf = <&grf>;
 117
 118                 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
 119                 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
 120                 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
 121                 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
 122         };
 123
 124         pmu-io-domains {
 125                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 126                 rockchip,grf = <&pmugrf>;
 127
 128                 pmu1830-supply = <&vcc_1v8>;
 129         };
 130
 131         spdif-sound {
 132                 status = "okay";
 133                 compatible = "simple-audio-card";
 134                 simple-audio-card,name = "ROCKCHIP,SPDIF";
 135                 simple-audio-card,cpu {
 136                         sound-dai = <&spdif>;
 137                 };
 138                 simple-audio-card,codec {
 139                         sound-dai = <&spdif_out>;
 140                 };
 141         };
 142
 143         spdif_out: spdif-out {
 144                 status = "okay";
 145                 compatible = "linux,spdif-dit";
 146                 #sound-dai-cells = <0>;
 147         };
 148
 149         hdmi_sound: hdmi-sound {
 150                 status = "disabled";
 151                 compatible = "simple-audio-card";
 152                 simple-audio-card,format = "i2s";
 153                 simple-audio-card,mclk-fs = <256>;
 154                 simple-audio-card,name = "rockchip,hdmi";
 155                 simple-audio-card,cpu {
 156                         sound-dai = <&i2s2>;
 157                 };
 158                 simple-audio-card,codec {
 159                         sound-dai = <&dw_hdmi_audio>;
 160                 };
 161         };
 162
 163         dw_hdmi_audio: dw-hdmi-audio {
 164                 status = "okay";
 165                 compatible = "rockchip,dw-hdmi-audio";
 166                 #sound-dai-cells = <0>;
 167         };
 168
 169         sdio_pwrseq: sdio-pwrseq {
 170                 compatible = "mmc-pwrseq-simple";
 171                 clocks = <&rk808 1>;
 172                 clock-names = "ext_clock";
 173                 pinctrl-names = "default";
 174                 pinctrl-0 = <&wifi_enable_h>;
 175
 176                 /*
 177                  * On the module itself this is one of these (depending
 178                  * on the actual card populated):
 179                  * - SDIO_RESET_L_WL_REG_ON
 180                  * - PDN (power down when low)
 181                  */
 182                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 183         };
 184
 185         wireless-wlan {
 186                 compatible = "wlan-platdata";
 187                 rockchip,grf = <&grf>;
 188                 wifi_chip_type = "ap6354";
 189                 sdio_vref = <1800>;
 190                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
 191                 status = "okay";
 192         };
 193
 194         wireless-bluetooth {
 195                 compatible = "bluetooth-platdata";
 196                 clocks = <&rk808 1>;
 197                 clock-names = "ext_clock";
 198                 /* wifi-bt-power-toggle; */
 199                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
 200                 pinctrl-names = "default", "rts_gpio";
 201                 pinctrl-0 = <&uart0_rts>;
 202                 pinctrl-1 = <&uart0_gpios>;
 203                 /* BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; */
 204                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>;
 205                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>;
 206                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
 207                 status = "okay";
 208         };
 209
 210         test-power {
 211                 status = "okay";
 212         };
 213 };
 214
 215 &sdmmc {
 216         clock-frequency = <100000000>;
 217         clock-freq-min-max = <100000 100000000>;
 218         supports-sd;
 219         bus-width = <4>;
 220         cap-mmc-highspeed;
 221         cap-sd-highspeed;
 222         disable-wp;
 223         num-slots = <1>;
 224         //sd-uhs-sdr104;
 225         vqmmc-supply = <&vcc_sd>;
 226         pinctrl-names = "default";
 227         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 228         card-detect-delay = <800>;
 229         status = "okay";
 230 };
 231
 232 &sdio0 {
 233         clock-frequency = <100000000>;
 234         clock-freq-min-max = <200000 100000000>;
 235         supports-sdio;
 236         bus-width = <4>;
 237         disable-wp;
 238         cap-sd-highspeed;
 239         cap-sdio-irq;
 240         keep-power-in-suspend;
 241         mmc-pwrseq = <&sdio_pwrseq>;
 242         non-removable;
 243         num-slots = <1>;
 244         pinctrl-names = "default";
 245         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 246         sd-uhs-sdr104;
 247         status = "okay";
 248 };
 249
 250 &emmc_phy {
 251         freq-sel = <200000000>;
 252         dr-sel = <50>;
 253         opdelay = <4>;
 254         status = "okay";
 255 };
 256
 257 &sdhci {
 258         bus-width = <8>;
 259         mmc-hs400-1_8v;
 260         supports-emmc;
 261         non-removable;
 262         mmc-hs400-enhanced-strobe;
 263         status = "okay";
 264 };
 265
 266 &i2s0 {
 267         status = "okay";
 268         rockchip,i2s-broken-burst-len;
 269         rockchip,playback-channels = <8>;
 270         rockchip,capture-channels = <8>;
 271         #sound-dai-cells = <0>;
 272 };
 273
 274 &i2s2 {
 275         #sound-dai-cells = <0>;
 276 };
 277
 278 &spdif {
 279         pinctrl-0 = <&spdif_bus_1>;
 280         status = "okay";
 281         #sound-dai-cells = <0>;
 282 };
 283
 284 &cluster0_opp {
 285         opp@408000000 {
 286                 opp-hz = /bits/ 64 <408000000>;
 287                 opp-microvolt = <800000>;
 288                 clock-latency-ns = <40000>;
 289         };
 290         opp@600000000 {
 291                 opp-hz = /bits/ 64 <600000000>;
 292                 opp-microvolt = <800000>;
 293         };
 294         opp@816000000 {
 295                 opp-hz = /bits/ 64 <816000000>;
 296                 opp-microvolt = <800000>;
 297         };
 298         opp@1008000000 {
 299                 opp-hz = /bits/ 64 <1008000000>;
 300                 opp-microvolt = <875000>;
 301         };
 302         opp@1200000000 {
 303                 opp-hz = /bits/ 64 <1200000000>;
 304                 opp-microvolt = <925000>;
 305         };
 306         opp@1416000000 {
 307                 opp-hz = /bits/ 64 <1416000000>;
 308                 opp-microvolt = <1050000>;
 309         };
 310         opp@1512000000 {
 311                 opp-hz = /bits/ 64 <1512000000>;
 312                 opp-microvolt = <1125000>;
 313         };
 314 };
 315
 316 &cluster1_opp {
 317         opp@408000000 {
 318                 opp-hz = /bits/ 64 <408000000>;
 319                 opp-microvolt = <800000>;
 320                 clock-latency-ns = <40000>;
 321         };
 322         opp@600000000 {
 323                 opp-hz = /bits/ 64 <600000000>;
 324                 opp-microvolt = <800000>;
 325         };
 326         opp@816000000 {
 327                 opp-hz = /bits/ 64 <816000000>;
 328                 opp-microvolt = <825000>;
 329         };
 330         opp@1008000000 {
 331                 opp-hz = /bits/ 64 <1008000000>;
 332                 opp-microvolt = <875000>;
 333         };
 334         opp@1200000000 {
 335                 opp-hz = /bits/ 64 <1200000000>;
 336                 opp-microvolt = <950000>;
 337         };
 338         opp@1416000000 {
 339                 opp-hz = /bits/ 64 <1416000000>;
 340                 opp-microvolt = <1025000>;
 341         };
 342         opp@1608000000 {
 343                 opp-hz = /bits/ 64 <1608000000>;
 344                 opp-microvolt = <1100000>;
 345         };
 346         opp@1800000000 {
 347                 opp-hz = /bits/ 64 <1800000000>;
 348                 opp-microvolt = <1175000>;
 349         };
 350         opp@1992000000 {
 351                 opp-hz = /bits/ 64 <1992000000>;
 352                 opp-microvolt = <1250000>;
 353         };
 354 };
 355
 356 &CPU_COST_A72 {
 357         busy-cost-data = <
 358                 210   129       /*  408MHz */
 359                 308   184       /*  600MHz */
 360                 419   246       /*  816MHz */
 361                 518   335       /* 1008MHz */
 362                 617   428       /* 1200MHz */
 363                 728   573       /* 1416MHz */
 364                 827   724       /* 1608MHz */
 365                 925   900       /* 1800MHz */
 366                 1024  1108      /* 1992MHz */
 367         >;
 368         idle-cost-data = <
 369               15
 370               15
 371                0
 372         >;
 373 };
 374
 375 &CPU_COST_A53 {
 376         busy-cost-data = <
 377                 108    46       /*  408M */
 378                 159    67       /*  600M */
 379                 216    90       /*  816M */
 380                 267    120      /* 1008M */
 381                 318    153      /* 1200M */
 382                 375    198      /* 1416M */
 383                 401    222      /* 1512M */
 384         >;
 385         idle-cost-data = <
 386               6
 387               6
 388               0
 389         >;
 390 };
 391
 392 &CLUSTER_COST_A72 {
 393         busy-cost-data = <
 394                 210   129       /*  408MHz */
 395                 308   184       /*  600MHz */
 396                 419   246       /*  816MHz */
 397                 518   335       /* 1008MHz */
 398                 617   428       /* 1200MHz */
 399                 728   573       /* 1416MHz */
 400                 827   724       /* 1608MHz */
 401                 925   900       /* 1800MHz */
 402                 1024  1108      /* 1992MHz */
 403         >;
 404         idle-cost-data = <
 405                  65
 406                  65
 407                  65
 408         >;
 409 };
 410
 411 &CLUSTER_COST_A53 {
 412         busy-cost-data = <
 413                 108    46       /*  408M */
 414                 159    67       /*  600M */
 415                 216    90       /*  816M */
 416                 267    120      /* 1008M */
 417                 318    153      /* 1200M */
 418                 375    198      /* 1416M */
 419                 401    222      /* 1512M */
 420         >;
 421         idle-cost-data = <
 422                 56
 423                 56
 424                 56
 425         >;
 426 };
 427
 428 &gpu_opp_table {
 429         opp@200000000 {
 430                 opp-hz = /bits/ 64 <200000000>;
 431                 opp-microvolt = <800000>;
 432         };
 433         opp@300000000 {
 434                 opp-hz = /bits/ 64 <300000000>;
 435                 opp-microvolt = <800000>;
 436         };
 437         opp@400000000 {
 438                 opp-hz = /bits/ 64 <400000000>;
 439                 opp-microvolt = <800000>;
 440         };
 441         opp@500000000 {
 442                 opp-hz = /bits/ 64 <500000000>;
 443                 opp-microvolt = <900000>;
 444         };
 445         opp@600000000 {
 446                 opp-hz = /bits/ 64 <600000000>;
 447                 opp-microvolt = <900000>;
 448         };
 449         opp@800000000 {
 450                 opp-hz = /bits/ 64 <800000000>;
 451                 opp-microvolt = <1000000>;
 452         };
 453 };
 454
 455 &i2c0 {
 456         status = "okay";
 457         i2c-scl-rising-time-ns = <168>;
 458         i2c-scl-falling-time-ns = <4>;
 459         clock-frequency = <400000>;
 460
 461         vdd_cpu_b: syr827@40 {
 462                 compatible = "silergy,syr827";
 463                 reg = <0x40>;
 464                 regulator-compatible = "fan53555-reg";
 465                 regulator-name = "vdd_cpu_b";
 466                 regulator-min-microvolt = <712500>;
 467                 regulator-max-microvolt = <1500000>;
 468                 regulator-ramp-delay = <1000>;
 469                 fcs,suspend-voltage-selector = <0>;
 470                 regulator-always-on;
 471                 regulator-boot-on;
 472                 vin-supply = <&vcc_sys>;
 473                 regulator-state-mem {
 474                         regulator-off-in-suspend;
 475                 };
 476         };
 477
 478         vdd_gpu: syr828@41 {
 479                 compatible = "silergy,syr828";
 480                 reg = <0x41>;
 481                 regulator-compatible = "fan53555-reg";
 482                 regulator-name = "vdd_gpu";
 483                 regulator-min-microvolt = <712500>;
 484                 regulator-max-microvolt = <1500000>;
 485                 regulator-ramp-delay = <1000>;
 486                 fcs,suspend-voltage-selector = <1>;
 487                 regulator-always-on;
 488                 regulator-boot-on;
 489                 vin-supply = <&vcc_sys>;
 490                 regulator-initial-mode = <1>; /* 1:force PWM 2:auto */
 491                 regulator-state-mem {
 492                         regulator-off-in-suspend;
 493                 };
 494         };
 495
 496         rk808: pmic@1b {
 497                 compatible = "rockchip,rk808";
 498                 reg = <0x1b>;
 499                 interrupt-parent = <&gpio1>;
 500                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 501                 pinctrl-names = "default";
 502                 pinctrl-0 = <&pmic_int_l>;
 503                 rockchip,system-power-controller;
 504                 wakeup-source;
 505                 #clock-cells = <1>;
 506                 clock-output-names = "xin32k", "rk808-clkout2";
 507
 508                 vcc1-supply = <&vcc_sys>;
 509                 vcc2-supply = <&vcc_sys>;
 510                 vcc3-supply = <&vcc_sys>;
 511                 vcc4-supply = <&vcc_sys>;
 512                 vcc6-supply = <&vcc_sys>;
 513                 vcc7-supply = <&vcc_sys>;
 514                 vcc8-supply = <&vcc3v3_sys>;
 515                 vcc9-supply = <&vcc_sys>;
 516                 vcc10-supply = <&vcc_sys>;
 517                 vcc11-supply = <&vcc_sys>;
 518                 vcc12-supply = <&vcc3v3_sys>;
 519                 vddio-supply = <&vcc_1v8>;
 520
 521                 regulators {
 522                         vdd_center: DCDC_REG1 {
 523                                 regulator-name = "vdd_center";
 524                                 regulator-min-microvolt = <750000>;
 525                                 regulator-max-microvolt = <1350000>;
 526                                 regulator-ramp-delay = <6001>;
 527                                 regulator-always-on;
 528                                 regulator-boot-on;
 529                                 regulator-state-mem {
 530                                         regulator-off-in-suspend;
 531                                 };
 532                         };
 533
 534                         vdd_cpu_l: DCDC_REG2 {
 535                                 regulator-name = "vdd_cpu_l";
 536                                 regulator-min-microvolt = <750000>;
 537                                 regulator-max-microvolt = <1350000>;
 538                                 regulator-ramp-delay = <6001>;
 539                                 regulator-always-on;
 540                                 regulator-boot-on;
 541                                 regulator-state-mem {
 542                                         regulator-off-in-suspend;
 543                                 };
 544                         };
 545
 546                         vcc_ddr: DCDC_REG3 {
 547                                 regulator-name = "vcc_ddr";
 548                                 regulator-always-on;
 549                                 regulator-boot-on;
 550                                 regulator-state-mem {
 551                                         regulator-on-in-suspend;
 552                                 };
 553                         };
 554
 555                         vcc_1v8: DCDC_REG4 {
 556                                 regulator-name = "vcc_1v8";
 557                                 regulator-min-microvolt = <1800000>;
 558                                 regulator-max-microvolt = <1800000>;
 559                                 regulator-always-on;
 560                                 regulator-boot-on;
 561                                 regulator-state-mem {
 562                                         regulator-on-in-suspend;
 563                                         regulator-suspend-microvolt = <1800000>;
 564                                 };
 565                         };
 566
 567                         vcc1v8_dvp: LDO_REG1 {
 568                                 regulator-name = "vcc1v8_dvp";
 569                                 regulator-min-microvolt = <1800000>;
 570                                 regulator-max-microvolt = <1800000>;
 571                                 regulator-always-on;
 572                                 regulator-boot-on;
 573                                 regulator-state-mem {
 574                                         regulator-on-in-suspend;
 575                                         regulator-suspend-microvolt = <1800000>;
 576                                 };
 577                         };
 578
 579                         vcca1v8_hdmi: LDO_REG2 {
 580                                 regulator-name = "vcca1v8_hdmi";
 581                                 regulator-min-microvolt = <1800000>;
 582                                 regulator-max-microvolt = <1800000>;
 583                                 regulator-always-on;
 584                                 regulator-boot-on;
 585                                 regulator-state-mem {
 586                                         regulator-on-in-suspend;
 587                                         regulator-suspend-microvolt = <1800000>;
 588                                 };
 589                         };
 590
 591                         vcca_1v8: LDO_REG3 {
 592                                 regulator-name = "vcca_1v8";
 593                                 regulator-min-microvolt = <1800000>;
 594                                 regulator-max-microvolt = <1800000>;
 595                                 regulator-always-on;
 596                                 regulator-boot-on;
 597                                 regulator-state-mem {
 598                                         regulator-on-in-suspend;
 599                                         regulator-suspend-microvolt = <1800000>;
 600                                 };
 601                         };
 602
 603                         vcc_sd: LDO_REG4 {
 604                                 regulator-name = "vcc_sd";
 605                                 regulator-min-microvolt = <1800000>;
 606                                 regulator-max-microvolt = <3300000>;
 607                                 regulator-always-on;
 608                                 regulator-boot-on;
 609                                 regulator-state-mem {
 610                                         regulator-on-in-suspend;
 611                                         regulator-suspend-microvolt = <3300000>;
 612                                 };
 613                         };
 614
 615                         vcc3v0_sd: LDO_REG5 {
 616                                 regulator-name = "vcc3v0_sd";
 617                                 regulator-min-microvolt = <3000000>;
 618                                 regulator-max-microvolt = <3000000>;
 619                                 regulator-always-on;
 620                                 regulator-boot-on;
 621                                 regulator-state-mem {
 622                                         regulator-on-in-suspend;
 623                                         regulator-suspend-microvolt = <3000000>;
 624                                 };
 625                         };
 626
 627                         vcc_1v5: LDO_REG6 {
 628                                 regulator-name = "vcc_1v5";
 629                                 regulator-min-microvolt = <1500000>;
 630                                 regulator-max-microvolt = <1500000>;
 631                                 regulator-always-on;
 632                                 regulator-boot-on;
 633                                 regulator-state-mem {
 634                                         regulator-on-in-suspend;
 635                                         regulator-suspend-microvolt = <1500000>;
 636                                 };
 637                         };
 638
 639                         vcca0v9_hdmi: LDO_REG7 {
 640                                 regulator-name = "vcca0v9_hdmi";
 641                                 regulator-min-microvolt = <900000>;
 642                                 regulator-max-microvolt = <900000>;
 643                                 regulator-always-on;
 644                                 regulator-boot-on;
 645                                 regulator-state-mem {
 646                                         regulator-on-in-suspend;
 647                                         regulator-suspend-microvolt = <900000>;
 648                                 };
 649                         };
 650
 651                         vcc_3v0: LDO_REG8 {
 652                                 regulator-name = "vcc_3v0";
 653                                 regulator-min-microvolt = <3000000>;
 654                                 regulator-max-microvolt = <3000000>;
 655                                 regulator-always-on;
 656                                 regulator-boot-on;
 657                                 regulator-state-mem {
 658                                         regulator-on-in-suspend;
 659                                         regulator-suspend-microvolt = <3000000>;
 660                                 };
 661                         };
 662
 663                         vcc3v3_s3: SWITCH_REG1 {
 664                                 regulator-name = "vcc3v3_s3";
 665                                 regulator-always-on;
 666                                 regulator-boot-on;
 667                                 regulator-state-mem {
 668                                         regulator-on-in-suspend;
 669                                 };
 670                         };
 671
 672                         vcc3v3_s0: SWITCH_REG2 {
 673                                 regulator-name = "vcc3v3_s0";
 674                                 regulator-always-on;
 675                                 regulator-boot-on;
 676                                 regulator-state-mem {
 677                                         regulator-on-in-suspend;
 678                                 };
 679                         };
 680                 };
 681         };
 682 };
 683
 684 &cpu_l0 {
 685         cpu-supply = <&vdd_cpu_l>;
 686 };
 687
 688 &cpu_l1 {
 689         cpu-supply = <&vdd_cpu_l>;
 690 };
 691
 692 &cpu_l2 {
 693         cpu-supply = <&vdd_cpu_l>;
 694 };
 695
 696 &cpu_l3 {
 697         cpu-supply = <&vdd_cpu_l>;
 698 };
 699
 700 &cpu_b0 {
 701         cpu-supply = <&vdd_cpu_b>;
 702 };
 703
 704 &cpu_b1 {
 705         cpu-supply = <&vdd_cpu_b>;
 706 };
 707
 708 &gpu {
 709         status = "okay";
 710         mali-supply = <&vdd_gpu>;
 711 };
 712
 713 &rga {
 714         status = "okay";
 715 };
 716
 717 &threshold {
 718         temperature = <85000>;
 719 };
 720
 721 &target {
 722         temperature = <100000>;
 723 };
 724
 725 &soc_crit {
 726         temperature = <105000>;
 727 };
 728
 729 &tcphy0 {
 730         extcon = <&fusb0>;
 731         status = "okay";
 732 };
 733
 734 &tcphy1 {
 735         status = "okay";
 736 };
 737
 738 &tsadc {
 739         /* tshut mode 0:CRU 1:GPIO */
 740         rockchip,hw-tshut-mode = <1>;
 741         /* tshut polarity 0:LOW 1:HIGH */
 742         rockchip,hw-tshut-polarity = <1>;
 743         rockchip,hw-tshut-temp = <110000>;
 744         status = "okay";
 745 };
 746
 747 &u2phy0 {
 748         status = "okay";
 749         extcon = <&fusb0>;
 750
 751         u2phy0_otg: otg-port {
 752                 status = "okay";
 753         };
 754
 755         u2phy0_host: host-port {
 756                 phy-supply = <&vcc5v0_host>;
 757                 status = "okay";
 758         };
 759 };
 760
 761 &u2phy1 {
 762         status = "okay";
 763
 764         u2phy1_otg: otg-port {
 765                 status = "okay";
 766         };
 767
 768         u2phy1_host: host-port {
 769                 phy-supply = <&vcc5v0_host>;
 770                 status = "okay";
 771         };
 772 };
 773
 774 &uart0 {
 775         pinctrl-names = "default";
 776         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 777         status = "okay";
 778 };
 779
 780 &uart2 {
 781         status = "okay";
 782 };
 783
 784 &usb_host0_ehci {
 785         status = "okay";
 786 };
 787
 788 &usb_host0_ohci {
 789         status = "okay";
 790 };
 791
 792 &usb_host1_ehci {
 793         status = "okay";
 794 };
 795
 796 &usb_host1_ohci {
 797         status = "okay";
 798 };
 799
 800 &usbdrd3_0 {
 801         extcon = <&fusb0>;
 802         status = "okay";
 803 };
 804
 805 &usbdrd_dwc3_0 {
 806         dr_mode = "otg";
 807         status = "okay";
 808 };
 809
 810 &usbdrd3_1 {
 811         status = "okay";
 812 };
 813
 814 &usbdrd_dwc3_1 {
 815         dr_mode = "host";
 816         status = "okay";
 817 };
 818
 819 &pwm2 {
 820         status = "okay";
 821 };
 822
 823 &pwm3 {
 824         status = "okay";
 825
 826         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
 827         compatible = "rockchip,remotectl-pwm";
 828         remote_pwm_id = <3>;
 829         handle_cpu_id = <0>;
 830
 831         ir_key1 {
 832                 rockchip,usercode = <0x4040>;
 833                 rockchip,key_table =
 834                         <0xf2   KEY_REPLY>,
 835                         <0xba   KEY_BACK>,
 836                         <0xf4   KEY_UP>,
 837                         <0xf1   KEY_DOWN>,
 838                         <0xef   KEY_LEFT>,
 839                         <0xee   KEY_RIGHT>,
 840                         <0xbd   KEY_HOME>,
 841                         <0xea   KEY_VOLUMEUP>,
 842                         <0xe3   KEY_VOLUMEDOWN>,
 843                         <0xe2   KEY_SEARCH>,
 844                         <0xb2   KEY_POWER>,
 845                         <0xbc   KEY_MUTE>,
 846                         <0xec   KEY_MENU>,
 847                         <0xbf   0x190>,
 848                         <0xe0   0x191>,
 849                         <0xe1   0x192>,
 850                         <0xe9   183>,
 851                         <0xe6   248>,
 852                         <0xe8   185>,
 853                         <0xe7   186>,
 854                         <0xf0   388>,
 855                         <0xbe   0x175>;
 856         };
 857
 858         ir_key2 {
 859                 rockchip,usercode = <0xff00>;
 860                 rockchip,key_table =
 861                         <0xf9   KEY_HOME>,
 862                         <0xbf   KEY_BACK>,
 863                         <0xfb   KEY_MENU>,
 864                         <0xaa   KEY_REPLY>,
 865                         <0xb9   KEY_UP>,
 866                         <0xe9   KEY_DOWN>,
 867                         <0xb8   KEY_LEFT>,
 868                         <0xea   KEY_RIGHT>,
 869                         <0xeb   KEY_VOLUMEDOWN>,
 870                         <0xef   KEY_VOLUMEUP>,
 871                         <0xf7   KEY_MUTE>,
 872                         <0xe7   KEY_POWER>,
 873                         <0xfc   KEY_POWER>,
 874                         <0xa9   KEY_VOLUMEDOWN>,
 875                         <0xa8   KEY_VOLUMEDOWN>,
 876                         <0xe0   KEY_VOLUMEDOWN>,
 877                         <0xa5   KEY_VOLUMEDOWN>,
 878                         <0xab   183>,
 879                         <0xb7   388>,
 880                         <0xf8   184>,
 881                         <0xaf   185>,
 882                         <0xed   KEY_VOLUMEDOWN>,
 883                         <0xee   186>,
 884                         <0xb3   KEY_VOLUMEDOWN>,
 885                         <0xf1   KEY_VOLUMEDOWN>,
 886                         <0xf2   KEY_VOLUMEDOWN>,
 887                         <0xf3   KEY_SEARCH>,
 888                         <0xb4   KEY_VOLUMEDOWN>,
 889                         <0xbe   KEY_SEARCH>;
 890         };
 891
 892         ir_key3 {
 893                 rockchip,usercode = <0x1dcc>;
 894                 rockchip,key_table =
 895                         <0xee   KEY_REPLY>,
 896                         <0xf0   KEY_BACK>,
 897                         <0xf8   KEY_UP>,
 898                         <0xbb   KEY_DOWN>,
 899                         <0xef   KEY_LEFT>,
 900                         <0xed   KEY_RIGHT>,
 901                         <0xfc   KEY_HOME>,
 902                         <0xf1   KEY_VOLUMEUP>,
 903                         <0xfd   KEY_VOLUMEDOWN>,
 904                         <0xb7   KEY_SEARCH>,
 905                         <0xff   KEY_POWER>,
 906                         <0xf3   KEY_MUTE>,
 907                         <0xbf   KEY_MENU>,
 908                         <0xf9   0x191>,
 909                         <0xf5   0x192>,
 910                         <0xb3   388>,
 911                         <0xbe   KEY_1>,
 912                         <0xba   KEY_2>,
 913                         <0xb2   KEY_3>,
 914                         <0xbd   KEY_4>,
 915                         <0xf9   KEY_5>,
 916                         <0xb1   KEY_6>,
 917                         <0xfc   KEY_7>,
 918                         <0xf8   KEY_8>,
 919                         <0xb0   KEY_9>,
 920                         <0xb6   KEY_0>,
 921                         <0xb5   KEY_BACKSPACE>;
 922         };
 923 };
 924
 925 &gmac {
 926         phy-supply = <&vcc_phy>;
 927         phy-mode = "rgmii";
 928         clock_in_out = "input";
 929         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
 930         snps,reset-active-low;
 931         snps,reset-delays-us = <0 10000 50000>;
 932         assigned-clocks = <&cru SCLK_RMII_SRC>;
 933         assigned-clock-parents = <&clkin_gmac>;
 934         pinctrl-names = "default", "sleep";
 935         pinctrl-0 = <&rgmii_pins>;
 936         pinctrl-1 = <&rgmii_sleep_pins>;
 937         tx_delay = <0x28>;
 938         rx_delay = <0x11>;
 939         status = "okay";
 940 };
 941
 942 &saradc {
 943         status = "okay";
 944 };
 945
 946 &rk_screen {
 947         #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
 948 };
 949
 950 &disp_timings {
 951         native-mode = <&timing1>; /* 1080p */
 952 };
 953
 954 &vopb_rk_fb {
 955         status = "okay";
 956 };
 957
 958 &vopl_rk_fb {
 959         status = "okay";
 960 };
 961
 962 &fb {
 963         rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
 964 };
 965
 966 &hdmi_rk_fb {
 967         status = "okay";
 968         rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC0>;
 969         rockchip,phy_table =
 970                 <165000000 0 0 17 18 18 18>,
 971                 <340000000 0 2 17 14 14 14>,
 972                 <594000000 0 2 17  9  9  9>;
 973 };
 974
 975 &cdn_dp_sound {
 976         status = "okay";
 977 };
 978
 979 &cdn_dp_fb {
 980         status = "okay";
 981         extcon = <&fusb0>;
 982         phys = <&tcphy0_dp>;
 983         dp_vop_sel = <DISPLAY_SOURCE_LCDC1>;
 984 };
 985
 986 &i2s2 {
 987         status = "okay";
 988 };
 989
 990 &pinctrl {
 991         sdio-pwrseq {
 992                 wifi_enable_h: wifi-enable-h {
 993                         rockchip,pins =
 994                                 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
 995                 };
 996         };
 997
 998         wireless-bluetooth {
 999                 uart0_gpios: uart0-gpios {
1000                         rockchip,pins =
1001                                 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
1002                 };
1003         };
1004
1005         usb2 {
1006                 host_vbus_drv: host-vbus-drv {
1007                         rockchip,pins =
1008                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1009                 };
1010         };
1011
1012         pmic {
1013                 pmic_int_l: pmic-int-l {
1014                         rockchip,pins =
1015                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
1016                 };
1017         };
1018
1019         gmac {
1020                 rgmii_sleep_pins: rgmii-sleep-pins {
1021                         rockchip,pins =
1022                                 <3 15 RK_FUNC_GPIO &pcfg_output_low>;
1023                 };
1024         };
1025 };