arch/arm64/boot/dts/rockchip/rk3399-box-808-android.dts

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 /dts-v1/;
  44
  45 #include <dt-bindings/pwm/pwm.h>
  46 #include <dt-bindings/input/input.h>
  47 #include "rk3399.dtsi"
  48 #include "rk3399-android.dtsi"
  49
  50 / {
  51         model = "Rockchip RK3399 Box Board v1 (Android)";
  52         compatible = "rockchip,rk3399";
  53
  54         vcc1v8_s0: vcc1v8-s0 {
  55                 compatible = "regulator-fixed";
  56                 regulator-name = "vcc1v8_s0";
  57                 regulator-min-microvolt = <1800000>;
  58                 regulator-max-microvolt = <1800000>;
  59                 regulator-always-on;
  60         };
  61
  62         vcc_sys: vcc-sys {
  63                 compatible = "regulator-fixed";
  64                 regulator-name = "vcc_sys";
  65                 regulator-min-microvolt = <5000000>;
  66                 regulator-max-microvolt = <5000000>;
  67                 regulator-always-on;
  68         };
  69
  70         vcc_phy: vcc-phy-regulator {
  71                 compatible = "regulator-fixed";
  72                 regulator-name = "vcc_phy";
  73                 regulator-always-on;
  74                 regulator-boot-on;
  75         };
  76
  77         vcc3v3_sys: vcc3v3-sys {
  78                 compatible = "regulator-fixed";
  79                 regulator-name = "vcc3v3_sys";
  80                 regulator-min-microvolt = <3300000>;
  81                 regulator-max-microvolt = <3300000>;
  82                 regulator-always-on;
  83                 vin-supply = <&vcc_sys>;
  84         };
  85
  86         vcc5v0_host: vcc5v0-host-regulator {
  87                 compatible = "regulator-fixed";
  88                 enable-active-high;
  89                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  90                 pinctrl-names = "default";
  91                 pinctrl-0 = <&host_vbus_drv>;
  92                 regulator-name = "vcc5v0_host";
  93         };
  94
  95         vdd_center: vdd-center {
  96                 compatible = "pwm-regulator";
  97                 pwms = <&pwm2 0 25000 0>;
  98                 regulator-name = "vdd_center";
  99                 regulator-min-microvolt = <800000>;
 100                 regulator-max-microvolt = <1400000>;
 101                 regulator-always-on;
 102                 regulator-boot-on;
 103
 104                 /* for rockchip boot on */
 105                 rockchip,pwm_id= <2>;
 106                 rockchip,pwm_voltage = <900000>;
 107
 108                 vin-supply = <&vcc_sys>;
 109         };
 110
 111         clkin_gmac: external-gmac-clock {
 112                 compatible = "fixed-clock";
 113                 clock-frequency = <125000000>;
 114                 clock-output-names = "clkin_gmac";
 115                 #clock-cells = <0>;
 116         };
 117
 118         pmu-io-domains {
 119                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 120                 rockchip,grf = <&pmugrf>;
 121
 122                 pmu1830-supply = <&vcc_1v8>;
 123         };
 124
 125         spdif-sound {
 126                 status = "okay";
 127                 compatible = "simple-audio-card";
 128                 simple-audio-card,name = "ROCKCHIP,SPDIF";
 129                 simple-audio-card,cpu {
 130                         sound-dai = <&spdif>;
 131                 };
 132                 simple-audio-card,codec {
 133                         sound-dai = <&spdif_out>;
 134                 };
 135         };
 136
 137         spdif_out: spdif-out {
 138                 status = "okay";
 139                 compatible = "linux,spdif-dit";
 140                 #sound-dai-cells = <0>;
 141         };
 142
 143         hdmi_sound: hdmi-sound {
 144                 status = "okay";
 145                 compatible = "simple-audio-card";
 146                 simple-audio-card,format = "i2s";
 147                 simple-audio-card,mclk-fs = <256>;
 148                 simple-audio-card,name = "rockchip,hdmi";
 149                 simple-audio-card,cpu {
 150                         sound-dai = <&i2s2>;
 151                 };
 152                 simple-audio-card,codec {
 153                         sound-dai = <&dw_hdmi_audio>;
 154                 };
 155         };
 156
 157         dw_hdmi_audio: dw-hdmi-audio {
 158                 status = "okay";
 159                 compatible = "rockchip,dw-hdmi-audio";
 160                 #sound-dai-cells = <0>;
 161         };
 162
 163         sdio_pwrseq: sdio-pwrseq {
 164                 compatible = "mmc-pwrseq-simple";
 165                 clocks = <&rk808 1>;
 166                 clock-names = "ext_clock";
 167                 pinctrl-names = "default";
 168                 pinctrl-0 = <&wifi_enable_h>;
 169
 170                 /*
 171                  * On the module itself this is one of these (depending
 172                  * on the actual card populated):
 173                  * - SDIO_RESET_L_WL_REG_ON
 174                  * - PDN (power down when low)
 175                  */
 176                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 177         };
 178
 179         wireless-wlan {
 180                 compatible = "wlan-platdata";
 181                 rockchip,grf = <&grf>;
 182                 wifi_chip_type = "ap6354";
 183                 sdio_vref = <1800>;
 184                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
 185                 status = "okay";
 186         };
 187
 188         wireless-bluetooth {
 189                 compatible = "bluetooth-platdata";
 190                 /* wifi-bt-power-toggle; */
 191                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
 192                 pinctrl-names = "default", "rts_gpio";
 193                 pinctrl-0 = <&uart0_rts>;
 194                 pinctrl-1 = <&uart0_gpios>;
 195                 /* BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; */
 196                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>;
 197                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>;
 198                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
 199                 status = "okay";
 200         };
 201 };
 202
 203 &io_domains {
 204         status = "okay";
 205
 206         bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
 207         audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
 208         sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
 209         gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
 210 };
 211
 212 &sdmmc {
 213         clock-frequency = <150000000>;
 214         clock-freq-min-max = <400000 150000000>;
 215         supports-sd;
 216         bus-width = <4>;
 217         cap-mmc-highspeed;
 218         cap-sd-highspeed;
 219         disable-wp;
 220         num-slots = <1>;
 221         sd-uhs-sdr104;
 222         vqmmc-supply = <&vcc_sd>;
 223         pinctrl-names = "default";
 224         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 225         status = "okay";
 226 };
 227
 228 &sdio0 {
 229         clock-frequency = <140000000>;
 230         clock-freq-min-max = <200000 140000000>;
 231         supports-sdio;
 232         bus-width = <4>;
 233         disable-wp;
 234         cap-sd-highspeed;
 235         cap-sdio-irq;
 236         keep-power-in-suspend;
 237         mmc-pwrseq = <&sdio_pwrseq>;
 238         non-removable;
 239         num-slots = <1>;
 240         pinctrl-names = "default";
 241         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 242         sd-uhs-sdr104;
 243         status = "okay";
 244 };
 245
 246 &emmc_phy {
 247         freq-sel = <200000000>;
 248         dr-sel = <50>;
 249         opdelay = <4>;
 250         status = "okay";
 251 };
 252
 253 &sdhci {
 254         bus-width = <8>;
 255         mmc-hs400-1_8v;
 256         supports-emmc;
 257         non-removable;
 258         mmc-hs400-enhanced-strobe;
 259         status = "okay";
 260 };
 261
 262 &i2s0 {
 263         status = "okay";
 264         rockchip,i2s-broken-burst-len;
 265         rockchip,playback-channels = <8>;
 266         rockchip,capture-channels = <8>;
 267         #sound-dai-cells = <0>;
 268 };
 269
 270 &i2s2 {
 271         #sound-dai-cells = <0>;
 272 };
 273
 274 &spdif {
 275         pinctrl-0 = <&spdif_bus_1>;
 276         status = "okay";
 277         #sound-dai-cells = <0>;
 278 };
 279
 280 &i2c0 {
 281         status = "okay";
 282         i2c-scl-rising-time-ns = <168>;
 283         i2c-scl-falling-time-ns = <4>;
 284         clock-frequency = <400000>;
 285
 286         vdd_cpu_b: syr827@40 {
 287                 compatible = "silergy,syr827";
 288                 reg = <0x40>;
 289                 regulator-compatible = "fan53555-reg";
 290                 regulator-name = "vdd_cpu_b";
 291                 regulator-min-microvolt = <712500>;
 292                 regulator-max-microvolt = <1500000>;
 293                 regulator-ramp-delay = <1000>;
 294                 fcs,suspend-voltage-selector = <1>;
 295                 regulator-always-on;
 296                 regulator-boot-on;
 297                 regulator-initial-state = <3>;
 298                 vin-supply = <&vcc_sys>;
 299                 regulator-state-mem {
 300                         regulator-off-in-suspend;
 301                 };
 302         };
 303
 304         vdd_gpu: syr828@41 {
 305                 compatible = "silergy,syr828";
 306                 reg = <0x41>;
 307                 regulator-compatible = "fan53555-reg";
 308                 regulator-name = "vdd_gpu";
 309                 regulator-min-microvolt = <735000>;
 310                 regulator-max-microvolt = <1400000>;
 311                 regulator-ramp-delay = <1000>;
 312                 fcs,suspend-voltage-selector = <1>;
 313                 regulator-always-on;
 314                 regulator-boot-on;
 315                 vin-supply = <&vcc_sys>;
 316                 regulator-state-mem {
 317                         regulator-off-in-suspend;
 318                 };
 319         };
 320
 321         rk808: pmic@1b {
 322                 compatible = "rockchip,rk808";
 323                 reg = <0x1b>;
 324                 interrupt-parent = <&gpio1>;
 325                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 326                 pinctrl-names = "default";
 327                 pinctrl-0 = <&pmic_int_l>;
 328                 rockchip,system-power-controller;
 329                 wakeup-source;
 330                 #clock-cells = <1>;
 331                 clock-output-names = "xin32k", "rk808-clkout2";
 332
 333                 vcc1-supply = <&vcc_sys>;
 334                 vcc2-supply = <&vcc_sys>;
 335                 vcc3-supply = <&vcc_sys>;
 336                 vcc4-supply = <&vcc_sys>;
 337                 vcc6-supply = <&vcc_sys>;
 338                 vcc7-supply = <&vcc_sys>;
 339                 vcc8-supply = <&vcc3v3_sys>;
 340                 vcc9-supply = <&vcc_sys>;
 341                 vcc10-supply = <&vcc_sys>;
 342                 vcc11-supply = <&vcc_sys>;
 343                 vcc12-supply = <&vcc3v3_sys>;
 344                 vddio-supply = <&vcc_1v8>;
 345
 346                 regulators {
 347                         vdd_log: DCDC_REG1 {
 348                                 regulator-name = "vdd_log";
 349                                 regulator-min-microvolt = <750000>;
 350                                 regulator-max-microvolt = <1350000>;
 351                                 regulator-ramp-delay = <6001>;
 352                                 regulator-always-on;
 353                                 regulator-boot-on;
 354                                 regulator-state-mem {
 355                                         regulator-on-in-suspend;
 356                                         regulator-suspend-microvolt = <900000>;
 357                                 };
 358                         };
 359
 360                         vdd_cpu_l: DCDC_REG2 {
 361                                 regulator-name = "vdd_cpu_l";
 362                                 regulator-min-microvolt = <750000>;
 363                                 regulator-max-microvolt = <1350000>;
 364                                 regulator-ramp-delay = <6001>;
 365                                 regulator-always-on;
 366                                 regulator-boot-on;
 367                                 regulator-state-mem {
 368                                         regulator-off-in-suspend;
 369                                 };
 370                         };
 371
 372                         vcc_ddr: DCDC_REG3 {
 373                                 regulator-name = "vcc_ddr";
 374                                 regulator-always-on;
 375                                 regulator-boot-on;
 376                                 regulator-state-mem {
 377                                         regulator-on-in-suspend;
 378                                 };
 379                         };
 380
 381                         vcc_1v8: DCDC_REG4 {
 382                                 regulator-name = "vcc_1v8";
 383                                 regulator-min-microvolt = <1800000>;
 384                                 regulator-max-microvolt = <1800000>;
 385                                 regulator-always-on;
 386                                 regulator-boot-on;
 387                                 regulator-state-mem {
 388                                         regulator-on-in-suspend;
 389                                         regulator-suspend-microvolt = <1800000>;
 390                                 };
 391                         };
 392
 393                         vcc1v8_dvp: LDO_REG1 {
 394                                 regulator-name = "vcc1v8_dvp";
 395                                 regulator-min-microvolt = <1800000>;
 396                                 regulator-max-microvolt = <1800000>;
 397                                 regulator-always-on;
 398                                 regulator-boot-on;
 399                                 regulator-state-mem {
 400                                         regulator-on-in-suspend;
 401                                         regulator-suspend-microvolt = <1800000>;
 402                                 };
 403                         };
 404
 405                         vcc3v0_tp: LDO_REG2 {
 406                                 regulator-name = "vcc3v0_tp";
 407                                 regulator-min-microvolt = <3000000>;
 408                                 regulator-max-microvolt = <3000000>;
 409                                 regulator-always-on;
 410                                 regulator-boot-on;
 411                                 regulator-state-mem {
 412                                         regulator-off-in-suspend;
 413                                 };
 414                         };
 415
 416                         vcc1v8_pll: LDO_REG3 {
 417                                 regulator-name = "vcc1v8_pll";
 418                                 regulator-min-microvolt = <1800000>;
 419                                 regulator-max-microvolt = <1800000>;
 420                                 regulator-always-on;
 421                                 regulator-boot-on;
 422                                 regulator-state-mem {
 423                                         regulator-on-in-suspend;
 424                                         regulator-suspend-microvolt = <1800000>;
 425                                 };
 426                         };
 427
 428                         vcc_sd: LDO_REG4 {
 429                                 regulator-name = "vcc_sd";
 430                                 regulator-min-microvolt = <1800000>;
 431                                 regulator-max-microvolt = <3300000>;
 432                                 regulator-always-on;
 433                                 regulator-boot-on;
 434                                 regulator-state-mem {
 435                                         regulator-on-in-suspend;
 436                                         regulator-suspend-microvolt = <3300000>;
 437                                 };
 438                         };
 439
 440                         vcc3v0_sd: LDO_REG5 {
 441                                 regulator-name = "vcc3v0_sd";
 442                                 regulator-min-microvolt = <3000000>;
 443                                 regulator-max-microvolt = <3000000>;
 444                                 regulator-always-on;
 445                                 regulator-boot-on;
 446                                 regulator-state-mem {
 447                                         regulator-on-in-suspend;
 448                                         regulator-suspend-microvolt = <3000000>;
 449                                 };
 450                         };
 451
 452                         vcc_1v5: LDO_REG6 {
 453                                 regulator-name = "vcc_1v5";
 454                                 regulator-min-microvolt = <1500000>;
 455                                 regulator-max-microvolt = <1500000>;
 456                                 regulator-always-on;
 457                                 regulator-boot-on;
 458                                 regulator-state-mem {
 459                                         regulator-on-in-suspend;
 460                                         regulator-suspend-microvolt = <1500000>;
 461                                 };
 462                         };
 463
 464                         vcc_0v9a: LDO_REG7 {
 465                                 regulator-name = "vcc_0v9a";
 466                                 regulator-min-microvolt = <900000>;
 467                                 regulator-max-microvolt = <900000>;
 468                                 regulator-always-on;
 469                                 regulator-boot-on;
 470                                 regulator-state-mem {
 471                                         regulator-on-in-suspend;
 472                                         regulator-suspend-microvolt = <900000>;
 473                                 };
 474                         };
 475
 476                         vcc_3v0: LDO_REG8 {
 477                                 regulator-name = "vcc_3v0";
 478                                 regulator-min-microvolt = <3000000>;
 479                                 regulator-max-microvolt = <3000000>;
 480                                 regulator-always-on;
 481                                 regulator-boot-on;
 482                                 regulator-state-mem {
 483                                         regulator-on-in-suspend;
 484                                         regulator-suspend-microvolt = <3000000>;
 485                                 };
 486                         };
 487
 488                         vcc3v3_s3: SWITCH_REG1 {
 489                                 regulator-name = "vcc3v3_s3";
 490                                 regulator-always-on;
 491                                 regulator-boot-on;
 492                                 regulator-state-mem {
 493                                         regulator-on-in-suspend;
 494                                 };
 495                         };
 496
 497                         vcc3v3_s0: SWITCH_REG2 {
 498                                 regulator-name = "vcc3v3_s0";
 499                                 regulator-always-on;
 500                                 regulator-boot-on;
 501                                 regulator-state-mem {
 502                                         regulator-on-in-suspend;
 503                                 };
 504                         };
 505                 };
 506         };
 507 };
 508
 509 &cpu_l0 {
 510         cpu-supply = <&vdd_cpu_l>;
 511 };
 512
 513 &cpu_l1 {
 514         cpu-supply = <&vdd_cpu_l>;
 515 };
 516
 517 &cpu_l2 {
 518         cpu-supply = <&vdd_cpu_l>;
 519 };
 520
 521 &cpu_l3 {
 522         cpu-supply = <&vdd_cpu_l>;
 523 };
 524
 525 &cpu_b0 {
 526         cpu-supply = <&vdd_cpu_b>;
 527 };
 528
 529 &cpu_b1 {
 530         cpu-supply = <&vdd_cpu_b>;
 531 };
 532
 533 &gpu {
 534         status = "okay";
 535         mali-supply = <&vdd_gpu>;
 536 };
 537
 538 &rga {
 539         status = "okay";
 540 };
 541
 542 &tsadc {
 543         /* tshut mode 0:CRU 1:GPIO */
 544         rockchip,hw-tshut-mode = <1>;
 545         /* tshut polarity 0:LOW 1:HIGH */
 546         rockchip,hw-tshut-polarity = <1>;
 547         status = "okay";
 548 };
 549
 550 &u2phy0 {
 551         status = "okay";
 552
 553         u2phy0_otg: otg-port {
 554                 status = "okay";
 555         };
 556
 557         u2phy0_host: host-port {
 558                 phy-supply = <&vcc5v0_host>;
 559                 status = "okay";
 560         };
 561 };
 562
 563 &u2phy1 {
 564         status = "okay";
 565
 566         u2phy1_otg: otg-port {
 567                 status = "okay";
 568         };
 569
 570         u2phy1_host: host-port {
 571                 phy-supply = <&vcc5v0_host>;
 572                 status = "okay";
 573         };
 574 };
 575
 576 &uart0 {
 577         pinctrl-names = "default";
 578         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 579         status = "okay";
 580 };
 581
 582 &uart2 {
 583         status = "okay";
 584 };
 585
 586 &usb_host0_ehci {
 587         status = "okay";
 588 };
 589
 590 &usb_host0_ohci {
 591         status = "okay";
 592 };
 593
 594 &usb_host1_ehci {
 595         status = "okay";
 596 };
 597
 598 &usb_host1_ohci {
 599         status = "okay";
 600 };
 601
 602 &usbdrd3_0 {
 603         status = "okay";
 604 };
 605
 606 &usbdrd_dwc3_0 {
 607         dr_mode = "otg";
 608         status = "okay";
 609 };
 610
 611 &usbdrd3_1 {
 612         status = "okay";
 613 };
 614
 615 &usbdrd_dwc3_1 {
 616         dr_mode = "host";
 617         status = "okay";
 618 };
 619
 620 &pwm2 {
 621         status = "okay";
 622 };
 623
 624 &pwm3 {
 625         status = "disabled";
 626
 627         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
 628         compatible = "rockchip,remotectl-pwm";
 629         remote_pwm_id = <3>;
 630         handle_cpu_id = <0>;
 631
 632         ir_key1 {
 633                 rockchip,usercode = <0x4040>;
 634                 rockchip,key_table =
 635                         <0xf2   KEY_REPLY>,
 636                         <0xba   KEY_BACK>,
 637                         <0xf4   KEY_UP>,
 638                         <0xf1   KEY_DOWN>,
 639                         <0xef   KEY_LEFT>,
 640                         <0xee   KEY_RIGHT>,
 641                         <0xbd   KEY_HOME>,
 642                         <0xea   KEY_VOLUMEUP>,
 643                         <0xe3   KEY_VOLUMEDOWN>,
 644                         <0xe2   KEY_SEARCH>,
 645                         <0xb2   KEY_POWER>,
 646                         <0xbc   KEY_MUTE>,
 647                         <0xec   KEY_MENU>,
 648                         <0xbf   0x190>,
 649                         <0xe0   0x191>,
 650                         <0xe1   0x192>,
 651                         <0xe9   183>,
 652                         <0xe6   248>,
 653                         <0xe8   185>,
 654                         <0xe7   186>,
 655                         <0xf0   388>,
 656                         <0xbe   0x175>;
 657         };
 658
 659         ir_key2 {
 660                 rockchip,usercode = <0xff00>;
 661                 rockchip,key_table =
 662                         <0xf9   KEY_HOME>,
 663                         <0xbf   KEY_BACK>,
 664                         <0xfb   KEY_MENU>,
 665                         <0xaa   KEY_REPLY>,
 666                         <0xb9   KEY_UP>,
 667                         <0xe9   KEY_DOWN>,
 668                         <0xb8   KEY_LEFT>,
 669                         <0xea   KEY_RIGHT>,
 670                         <0xeb   KEY_VOLUMEDOWN>,
 671                         <0xef   KEY_VOLUMEUP>,
 672                         <0xf7   KEY_MUTE>,
 673                         <0xe7   KEY_POWER>,
 674                         <0xfc   KEY_POWER>,
 675                         <0xa9   KEY_VOLUMEDOWN>,
 676                         <0xa8   KEY_VOLUMEDOWN>,
 677                         <0xe0   KEY_VOLUMEDOWN>,
 678                         <0xa5   KEY_VOLUMEDOWN>,
 679                         <0xab   183>,
 680                         <0xb7   388>,
 681                         <0xf8   184>,
 682                         <0xaf   185>,
 683                         <0xed   KEY_VOLUMEDOWN>,
 684                         <0xee   186>,
 685                         <0xb3   KEY_VOLUMEDOWN>,
 686                         <0xf1   KEY_VOLUMEDOWN>,
 687                         <0xf2   KEY_VOLUMEDOWN>,
 688                         <0xf3   KEY_SEARCH>,
 689                         <0xb4   KEY_VOLUMEDOWN>,
 690                         <0xbe   KEY_SEARCH>;
 691         };
 692
 693         ir_key3 {
 694                 rockchip,usercode = <0x1dcc>;
 695                 rockchip,key_table =
 696                         <0xee   KEY_REPLY>,
 697                         <0xf0   KEY_BACK>,
 698                         <0xf8   KEY_UP>,
 699                         <0xbb   KEY_DOWN>,
 700                         <0xef   KEY_LEFT>,
 701                         <0xed   KEY_RIGHT>,
 702                         <0xfc   KEY_HOME>,
 703                         <0xf1   KEY_VOLUMEUP>,
 704                         <0xfd   KEY_VOLUMEDOWN>,
 705                         <0xb7   KEY_SEARCH>,
 706                         <0xff   KEY_POWER>,
 707                         <0xf3   KEY_MUTE>,
 708                         <0xbf   KEY_MENU>,
 709                         <0xf9   0x191>,
 710                         <0xf5   0x192>,
 711                         <0xb3   388>,
 712                         <0xbe   KEY_1>,
 713                         <0xba   KEY_2>,
 714                         <0xb2   KEY_3>,
 715                         <0xbd   KEY_4>,
 716                         <0xf9   KEY_5>,
 717                         <0xb1   KEY_6>,
 718                         <0xfc   KEY_7>,
 719                         <0xf8   KEY_8>,
 720                         <0xb0   KEY_9>,
 721                         <0xb6   KEY_0>,
 722                         <0xb5   KEY_BACKSPACE>;
 723         };
 724 };
 725
 726 &gmac {
 727         phy-supply = <&vcc_phy>;
 728         phy-mode = "rgmii";
 729         clock_in_out = "input";
 730         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
 731         snps,reset-active-low;
 732         snps,reset-delays-us = <0 10000 50000>;
 733         assigned-clocks = <&cru SCLK_RMII_SRC>;
 734         assigned-clock-parents = <&clkin_gmac>;
 735         pinctrl-names = "default";
 736         pinctrl-0 = <&rgmii_pins>;
 737         tx_delay = <0x28>;
 738         rx_delay = <0x11>;
 739         status = "okay";
 740 };
 741
 742 &saradc {
 743         status = "okay";
 744 };
 745
 746 &pinctrl {
 747         sdio-pwrseq {
 748                 wifi_enable_h: wifi-enable-h {
 749                         rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
 750                 };
 751         };
 752
 753         wireless-bluetooth {
 754                 uart0_gpios: uart0-gpios {
 755                         rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
 756                 };
 757         };
 758
 759         pmic {
 760                 pmic_int_l: pmic-int-l {
 761                         rockchip,pins =
 762                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 763                 };
 764         };
 765
 766         usb2 {
 767                 host_vbus_drv: host-vbus-drv {
 768                         rockchip,pins =
 769                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
 770                 };
 771         };
 772 };
 773
 774 &rk_screen {
 775         #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
 776 };
 777
 778 &vopb_rk_fb {
 779         status = "okay";
 780 };
 781
 782 &fb {
 783         rockchip,disp-mode = <NO_DUAL>;
 784         rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
 785 };
 786
 787 &hdmi_rk_fb {
 788         status = "okay";
 789         rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC0>;
 790 };
 791
 792 &i2s2 {
 793         status = "okay";
 794 };
 795