2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include <dt-bindings/pwm/pwm.h>
46 #include <dt-bindings/input/input.h>
47 #include "rk3399.dtsi"
48 #include "rk3399-android.dtsi"
51 model = "Rockchip RK3399 Box Board v1 (Android)";
52 compatible = "rockchip,rk3399";
54 vcc1v8_s0: vcc1v8-s0 {
55 compatible = "regulator-fixed";
56 regulator-name = "vcc1v8_s0";
57 regulator-min-microvolt = <1800000>;
58 regulator-max-microvolt = <1800000>;
63 compatible = "regulator-fixed";
64 regulator-name = "vcc_sys";
65 regulator-min-microvolt = <5000000>;
66 regulator-max-microvolt = <5000000>;
70 vcc_phy: vcc-phy-regulator {
71 compatible = "regulator-fixed";
72 regulator-name = "vcc_phy";
77 vcc3v3_sys: vcc3v3-sys {
78 compatible = "regulator-fixed";
79 regulator-name = "vcc3v3_sys";
80 regulator-min-microvolt = <3300000>;
81 regulator-max-microvolt = <3300000>;
83 vin-supply = <&vcc_sys>;
86 vdd_center: vdd-center {
87 compatible = "pwm-regulator";
88 pwms = <&pwm2 0 25000 0>;
89 regulator-name = "vdd_center";
90 regulator-min-microvolt = <800000>;
91 regulator-max-microvolt = <1400000>;
95 /* for rockchip boot on */
97 rockchip,pwm_voltage = <900000>;
99 vin-supply = <&vcc_sys>;
102 clkin_gmac: external-gmac-clock {
103 compatible = "fixed-clock";
104 clock-frequency = <125000000>;
105 clock-output-names = "clkin_gmac";
110 compatible = "rockchip,rk3399-io-voltage-domain";
111 rockchip,grf = <&grf>;
113 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
114 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
115 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
116 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
120 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
121 rockchip,grf = <&pmugrf>;
123 pmu1830-supply = <&vcc_1v8>;
128 compatible = "simple-audio-card";
129 simple-audio-card,name = "ROCKCHIP,SPDIF";
130 simple-audio-card,cpu {
131 sound-dai = <&spdif>;
133 simple-audio-card,codec {
134 sound-dai = <&spdif_out>;
138 spdif_out: spdif-out {
140 compatible = "linux,spdif-dit";
141 #sound-dai-cells = <0>;
144 sdio_pwrseq: sdio-pwrseq {
145 compatible = "mmc-pwrseq-simple";
147 clock-names = "ext_clock";
148 pinctrl-names = "default";
149 pinctrl-0 = <&wifi_enable_h>;
152 * On the module itself this is one of these (depending
153 * on the actual card populated):
154 * - SDIO_RESET_L_WL_REG_ON
155 * - PDN (power down when low)
157 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
161 compatible = "wlan-platdata";
162 rockchip,grf = <&grf>;
163 wifi_chip_type = "ap6354";
165 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
170 compatible = "bluetooth-platdata";
171 /* wifi-bt-power-toggle; */
172 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
173 pinctrl-names = "default", "rts_gpio";
174 pinctrl-0 = <&uart0_rts>;
175 pinctrl-1 = <&uart0_gpios>;
176 /* BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; */
177 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>;
178 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
179 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
185 clock-frequency = <150000000>;
186 clock-freq-min-max = <400000 150000000>;
194 vqmmc-supply = <&vcc_sd>;
195 pinctrl-names = "default";
196 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
201 clock-frequency = <140000000>;
202 clock-freq-min-max = <200000 140000000>;
208 keep-power-in-suspend;
209 mmc-pwrseq = <&sdio_pwrseq>;
212 pinctrl-names = "default";
213 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
219 freq-sel = <200000000>;
230 mmc-hs400-enhanced-strobe;
236 rockchip,i2s-broken-burst-len;
237 rockchip,playback-channels = <8>;
238 rockchip,capture-channels = <8>;
239 #sound-dai-cells = <0>;
244 #sound-dai-cells = <0>;
249 i2c-scl-rising-time-ns = <168>;
250 i2c-scl-falling-time-ns = <4>;
251 clock-frequency = <400000>;
253 vdd_cpu_b: syr827@40 {
254 compatible = "silergy,syr827";
256 regulator-compatible = "fan53555-reg";
257 regulator-name = "vdd_cpu_b";
258 regulator-min-microvolt = <712500>;
259 regulator-max-microvolt = <1500000>;
260 regulator-ramp-delay = <1000>;
261 fcs,suspend-voltage-selector = <1>;
264 regulator-initial-state = <3>;
265 vin-supply = <&vcc_sys>;
266 regulator-state-mem {
267 regulator-off-in-suspend;
272 compatible = "silergy,syr828";
274 regulator-compatible = "fan53555-reg";
275 regulator-name = "vdd_gpu";
276 regulator-min-microvolt = <735000>;
277 regulator-max-microvolt = <1400000>;
278 regulator-ramp-delay = <1000>;
279 fcs,suspend-voltage-selector = <1>;
282 vin-supply = <&vcc_sys>;
283 regulator-state-mem {
284 regulator-off-in-suspend;
289 compatible = "rockchip,rk808";
291 interrupt-parent = <&gpio1>;
292 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
293 pinctrl-names = "default";
294 pinctrl-0 = <&pmic_int_l>;
295 rockchip,system-power-controller;
298 clock-output-names = "xin32k", "rk808-clkout2";
300 vcc1-supply = <&vcc_sys>;
301 vcc2-supply = <&vcc_sys>;
302 vcc3-supply = <&vcc_sys>;
303 vcc4-supply = <&vcc_sys>;
304 vcc6-supply = <&vcc_sys>;
305 vcc7-supply = <&vcc_sys>;
306 vcc8-supply = <&vcc3v3_sys>;
307 vcc9-supply = <&vcc_sys>;
308 vcc10-supply = <&vcc_sys>;
309 vcc11-supply = <&vcc_sys>;
310 vcc12-supply = <&vcc3v3_sys>;
311 vddio-supply = <&vcc_1v8>;
315 regulator-name = "vdd_log";
316 regulator-min-microvolt = <750000>;
317 regulator-max-microvolt = <1350000>;
320 regulator-state-mem {
321 regulator-on-in-suspend;
322 regulator-suspend-microvolt = <900000>;
326 vdd_cpu_l: DCDC_REG2 {
327 regulator-name = "vdd_cpu_l";
328 regulator-min-microvolt = <750000>;
329 regulator-max-microvolt = <1350000>;
332 regulator-state-mem {
333 regulator-off-in-suspend;
338 regulator-name = "vcc_ddr";
341 regulator-state-mem {
342 regulator-on-in-suspend;
347 regulator-name = "vcc_1v8";
348 regulator-min-microvolt = <1800000>;
349 regulator-max-microvolt = <1800000>;
352 regulator-state-mem {
353 regulator-on-in-suspend;
354 regulator-suspend-microvolt = <1800000>;
358 vcc1v8_dvp: LDO_REG1 {
359 regulator-name = "vcc1v8_dvp";
360 regulator-min-microvolt = <1800000>;
361 regulator-max-microvolt = <1800000>;
364 regulator-state-mem {
365 regulator-on-in-suspend;
366 regulator-suspend-microvolt = <1800000>;
370 vcc3v0_tp: LDO_REG2 {
371 regulator-name = "vcc3v0_tp";
372 regulator-min-microvolt = <3000000>;
373 regulator-max-microvolt = <3000000>;
376 regulator-state-mem {
377 regulator-off-in-suspend;
381 vcc1v8_pll: LDO_REG3 {
382 regulator-name = "vcc1v8_pll";
383 regulator-min-microvolt = <1800000>;
384 regulator-max-microvolt = <1800000>;
387 regulator-state-mem {
388 regulator-on-in-suspend;
389 regulator-suspend-microvolt = <1800000>;
394 regulator-name = "vcc_sd";
395 regulator-min-microvolt = <1800000>;
396 regulator-max-microvolt = <3300000>;
399 regulator-state-mem {
400 regulator-on-in-suspend;
401 regulator-suspend-microvolt = <3300000>;
405 vcc3v0_sd: LDO_REG5 {
406 regulator-name = "vcc3v0_sd";
407 regulator-min-microvolt = <3000000>;
408 regulator-max-microvolt = <3000000>;
411 regulator-state-mem {
412 regulator-on-in-suspend;
413 regulator-suspend-microvolt = <3000000>;
418 regulator-name = "vcc_1v5";
419 regulator-min-microvolt = <1500000>;
420 regulator-max-microvolt = <1500000>;
423 regulator-state-mem {
424 regulator-on-in-suspend;
425 regulator-suspend-microvolt = <1500000>;
430 regulator-name = "vcc_0v9a";
431 regulator-min-microvolt = <900000>;
432 regulator-max-microvolt = <900000>;
435 regulator-state-mem {
436 regulator-on-in-suspend;
437 regulator-suspend-microvolt = <900000>;
442 regulator-name = "vcc_3v0";
443 regulator-min-microvolt = <3000000>;
444 regulator-max-microvolt = <3000000>;
447 regulator-state-mem {
448 regulator-on-in-suspend;
449 regulator-suspend-microvolt = <3000000>;
453 vcc3v3_s3: SWITCH_REG1 {
454 regulator-name = "vcc3v3_s3";
457 regulator-state-mem {
458 regulator-on-in-suspend;
462 vcc3v3_s0: SWITCH_REG2 {
463 regulator-name = "vcc3v3_s0";
466 regulator-state-mem {
467 regulator-on-in-suspend;
475 cpu-supply = <&vdd_cpu_l>;
479 cpu-supply = <&vdd_cpu_l>;
483 cpu-supply = <&vdd_cpu_l>;
487 cpu-supply = <&vdd_cpu_l>;
491 cpu-supply = <&vdd_cpu_b>;
495 cpu-supply = <&vdd_cpu_b>;
500 mali-supply = <&vdd_gpu>;
508 /* tshut mode 0:CRU 1:GPIO */
509 rockchip,hw-tshut-mode = <1>;
510 /* tshut polarity 0:LOW 1:HIGH */
511 rockchip,hw-tshut-polarity = <1>;
516 pinctrl-names = "default";
517 pinctrl-0 = <&uart0_xfer &uart0_cts>;
526 vbus_drv-gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
550 dr_mode = "peripheral";
570 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
571 compatible = "rockchip,remotectl-pwm";
576 rockchip,usercode = <0x4040>;
586 <0xe3 KEY_VOLUMEDOWN>,
603 rockchip,usercode = <0xff00>;
613 <0xeb KEY_VOLUMEDOWN>,
618 <0xa9 KEY_VOLUMEDOWN>,
619 <0xa8 KEY_VOLUMEDOWN>,
620 <0xe0 KEY_VOLUMEDOWN>,
621 <0xa5 KEY_VOLUMEDOWN>,
626 <0xed KEY_VOLUMEDOWN>,
628 <0xb3 KEY_VOLUMEDOWN>,
629 <0xf1 KEY_VOLUMEDOWN>,
630 <0xf2 KEY_VOLUMEDOWN>,
632 <0xb4 KEY_VOLUMEDOWN>,
637 rockchip,usercode = <0x1dcc>;
647 <0xfd KEY_VOLUMEDOWN>,
665 <0xb5 KEY_BACKSPACE>;
670 phy-supply = <&vcc_phy>;
672 clock_in_out = "input";
673 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
674 snps,reset-active-low;
675 snps,reset-delays-us = <0 10000 50000>;
676 assigned-clocks = <&cru SCLK_RMII_SRC>;
677 assigned-clock-parents = <&clkin_gmac>;
678 pinctrl-names = "default";
679 pinctrl-0 = <&rgmii_pins>;
691 wifi_enable_h: wifi-enable-h {
692 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
697 uart0_gpios: uart0-gpios {
698 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
703 pmic_int_l: pmic-int-l {
705 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
711 #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
719 rockchip,disp-mode = <NO_DUAL>;
724 rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC0>;