arch/arm/mach-rockchip/rk3228.c

   1 /*
   2  * Copyright (C) 2015 ROCKCHIP, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/clk-provider.h>
  16 #include <linux/clocksource.h>
  17 #include <linux/cpuidle.h>
  18 #include <linux/delay.h>
  19 #include <linux/init.h>
  20 #include <linux/irqchip.h>
  21 #include <linux/kernel.h>
  22 #include <linux/of_address.h>
  23 #include <linux/of_platform.h>
  24 #include <linux/rockchip/common.h>
  25 #include <linux/rockchip/cpu.h>
  26 #include <linux/rockchip/cpu_axi.h>
  27 #include <linux/rockchip/cru.h>
  28 #include <linux/rockchip/dvfs.h>
  29 #include <linux/rockchip/grf.h>
  30 #include <linux/rockchip/iomap.h>
  31 #include <linux/rockchip/pmu.h>
  32 #include <asm/cputype.h>
  33 #include <asm/mach/arch.h>
  34 #include <asm/mach/map.h>
  35 #include "loader.h"
  36 #define CPU 3228
  37 #include "sram.h"
  38 #include <linux/rockchip/cpu.h>
  39
  40 #define RK3228_DEVICE(name) \
  41         { \
  42                 .virtual        = (unsigned long) RK_##name##_VIRT, \
  43                 .pfn            = __phys_to_pfn(RK3228_##name##_PHYS), \
  44                 .length         = RK3228_##name##_SIZE, \
  45                 .type           = MT_DEVICE, \
  46         }
  47
  48 static const char * const rk3228_dt_compat[] __initconst = {
  49         "rockchip,rk3228",
  50         NULL,
  51 };
  52
  53 static struct map_desc rk3228_io_desc[] __initdata = {
  54         RK3228_DEVICE(CRU),
  55         RK3228_DEVICE(GRF),
  56         RK3228_DEVICE(TIMER),
  57         RK3228_DEVICE(EFUSE),
  58         RK3228_DEVICE(CPU_AXI_BUS),
  59         RK_DEVICE(RK_DEBUG_UART_VIRT, RK3228_UART2_PHYS, RK3228_UART_SIZE),
  60         RK_DEVICE(RK_DDR_VIRT, RK3228_DDR_PCTL_PHYS, RK3228_DDR_PCTL_SIZE),
  61         RK_DEVICE(RK_DDR_VIRT + RK3228_DDR_PCTL_SIZE, RK3228_DDR_PHY_PHYS,
  62                   RK3228_DDR_PHY_SIZE),
  63         RK_DEVICE(RK_GPIO_VIRT(0), RK3228_GPIO0_PHYS, RK3228_GPIO_SIZE),
  64         RK_DEVICE(RK_GPIO_VIRT(1), RK3228_GPIO1_PHYS, RK3228_GPIO_SIZE),
  65         RK_DEVICE(RK_GPIO_VIRT(2), RK3228_GPIO2_PHYS, RK3228_GPIO_SIZE),
  66         RK_DEVICE(RK_GPIO_VIRT(3), RK3228_GPIO3_PHYS, RK3228_GPIO_SIZE),
  67         RK_DEVICE(RK_GIC_VIRT, RK3228_GIC_DIST_PHYS, RK3228_GIC_DIST_SIZE),
  68         RK_DEVICE(RK_GIC_VIRT + RK3228_GIC_DIST_SIZE, RK3228_GIC_CPU_PHYS,
  69                   RK3228_GIC_CPU_SIZE),
  70         RK_DEVICE(RK_PWM_VIRT, RK3228_PWM_PHYS, RK3228_PWM_SIZE),
  71 };
  72
  73 void __init rk3228_dt_map_io(void)
  74 {
  75         rockchip_soc_id = ROCKCHIP_SOC_RK3228;
  76
  77         iotable_init(rk3228_io_desc, ARRAY_SIZE(rk3228_io_desc));
  78         debug_ll_io_init();
  79
  80         rockchip_efuse_init();
  81 }
  82
  83 static void __init rk3228_dt_init_timer(void)
  84 {
  85         of_clk_init(NULL);
  86         clocksource_of_init();
  87         of_dvfs_init();
  88 }
  89
  90 static void __init rk3228_reserve(void)
  91 {
  92         /* reserve memory for uboot */
  93         rockchip_uboot_mem_reserve();
  94
  95         /* reserve memory for ION */
  96         rockchip_ion_reserve();
  97 }
  98
  99 static void __init rk3228_init_late(void)
 100 {
 101         if (rockchip_jtag_enabled)
 102                 clk_prepare_enable(clk_get_sys(NULL, "clk_jtag"));
 103 }
 104
 105 static void rk3228_restart(char mode, const char *cmd)
 106 {
 107         u32 boot_flag, boot_mode;
 108
 109         rockchip_restart_get_boot_mode(cmd, &boot_flag, &boot_mode);
 110
 111         /* for loader */
 112         writel_relaxed(boot_flag, RK_PMU_VIRT + RK3228_GRF_OS_REG0);
 113         /* for linux */
 114         writel_relaxed(boot_mode, RK_PMU_VIRT + RK3228_GRF_OS_REG1);
 115
 116         dsb();
 117
 118         /* pll enter slow mode */
 119         writel_relaxed(0x11010000, RK_CRU_VIRT + RK3228_CRU_MODE_CON);
 120         dsb();
 121         writel_relaxed(0xeca8, RK_CRU_VIRT + RK3228_CRU_GLB_SRST_SND_VALUE);
 122         dsb();
 123 }
 124
 125 DT_MACHINE_START(RK3228_DT, "Rockchip RK3228")
 126         .smp            = smp_ops(rockchip_smp_ops),
 127         .map_io         = rk3228_dt_map_io,
 128         .init_time      = rk3228_dt_init_timer,
 129         .dt_compat      = rk3228_dt_compat,
 130         .init_late      = rk3228_init_late,
 131         .reserve        = rk3228_reserve,
 132         .restart        = rk3228_restart,
 133 MACHINE_END
 134