arch/arm/boot/dts/tegra114-dalmore.dts

   1 /*
   2  * This dts file supports Dalmore A04.
   3  * Other board revisions are not supported
   4  */
   5
   6 /dts-v1/;
   7
   8 #include <dt-bindings/input/input.h>
   9 #include "tegra114.dtsi"
  10
  11 / {
  12         model = "NVIDIA Tegra114 Dalmore evaluation board";
  13         compatible = "nvidia,dalmore", "nvidia,tegra114";
  14
  15         aliases {
  16                 rtc0 = "/i2c@7000d000/tps65913@58";
  17                 rtc1 = "/rtc@7000e000";
  18                 serial0 = &uartd;
  19         };
  20
  21         memory {
  22                 reg = <0x80000000 0x40000000>;
  23         };
  24
  25         host1x@50000000 {
  26                 hdmi@54280000 {
  27                         status = "okay";
  28
  29                         hdmi-supply = <&vdd_5v0_hdmi>;
  30                         vdd-supply = <&vdd_hdmi_reg>;
  31                         pll-supply = <&palmas_smps3_reg>;
  32
  33                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  34                         nvidia,hpd-gpio =
  35                                 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  36                 };
  37
  38                 dsi@54300000 {
  39                         status = "okay";
  40
  41                         avdd-dsi-csi-supply = <&avdd_1v2_reg>;
  42
  43                         panel@0 {
  44                                 compatible = "panasonic,vvx10f004b00",
  45                                              "simple-panel";
  46                                 reg = <0>;
  47
  48                                 power-supply = <&avdd_lcd_reg>;
  49                                 backlight = <&backlight>;
  50                         };
  51                 };
  52         };
  53
  54         pinmux@70000868 {
  55                 pinctrl-names = "default";
  56                 pinctrl-0 = <&state_default>;
  57
  58                 state_default: pinmux {
  59                         clk1_out_pw4 {
  60                                 nvidia,pins = "clk1_out_pw4";
  61                                 nvidia,function = "extperiph1";
  62                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  63                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  64                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  65                         };
  66                         dap1_din_pn1 {
  67                                 nvidia,pins = "dap1_din_pn1";
  68                                 nvidia,function = "i2s0";
  69                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  70                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  71                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  72                         };
  73                         dap1_dout_pn2 {
  74                                 nvidia,pins = "dap1_dout_pn2",
  75                                                 "dap1_fs_pn0",
  76                                                 "dap1_sclk_pn3";
  77                                 nvidia,function = "i2s0";
  78                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  79                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  80                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  81                         };
  82                         dap2_din_pa4 {
  83                                 nvidia,pins = "dap2_din_pa4";
  84                                 nvidia,function = "i2s1";
  85                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  86                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  87                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  88                         };
  89                         dap2_dout_pa5 {
  90                                 nvidia,pins = "dap2_dout_pa5",
  91                                                 "dap2_fs_pa2",
  92                                                 "dap2_sclk_pa3";
  93                                 nvidia,function = "i2s1";
  94                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  95                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  96                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  97                         };
  98                         dap4_din_pp5 {
  99                                 nvidia,pins = "dap4_din_pp5",
 100                                                 "dap4_dout_pp6",
 101                                                 "dap4_fs_pp4",
 102                                                 "dap4_sclk_pp7";
 103                                 nvidia,function = "i2s3";
 104                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 105                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 106                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 107                         };
 108                         dvfs_pwm_px0 {
 109                                 nvidia,pins = "dvfs_pwm_px0",
 110                                                 "dvfs_clk_px2";
 111                                 nvidia,function = "cldvfs";
 112                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 113                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 114                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 115                         };
 116                         ulpi_clk_py0 {
 117                                 nvidia,pins = "ulpi_clk_py0",
 118                                                 "ulpi_data0_po1",
 119                                                 "ulpi_data1_po2",
 120                                                 "ulpi_data2_po3",
 121                                                 "ulpi_data3_po4",
 122                                                 "ulpi_data4_po5",
 123                                                 "ulpi_data5_po6",
 124                                                 "ulpi_data6_po7",
 125                                                 "ulpi_data7_po0";
 126                                 nvidia,function = "ulpi";
 127                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 128                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 129                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 130                         };
 131                         ulpi_dir_py1 {
 132                                 nvidia,pins = "ulpi_dir_py1",
 133                                                 "ulpi_nxt_py2";
 134                                 nvidia,function = "ulpi";
 135                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 136                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 137                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 138                         };
 139                         ulpi_stp_py3 {
 140                                 nvidia,pins = "ulpi_stp_py3";
 141                                 nvidia,function = "ulpi";
 142                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 143                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 144                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 145                         };
 146                         cam_i2c_scl_pbb1 {
 147                                 nvidia,pins = "cam_i2c_scl_pbb1",
 148                                                 "cam_i2c_sda_pbb2";
 149                                 nvidia,function = "i2c3";
 150                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 151                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 152                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 153                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 154                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 155                         };
 156                         cam_mclk_pcc0 {
 157                                 nvidia,pins = "cam_mclk_pcc0",
 158                                                 "pbb0";
 159                                 nvidia,function = "vi_alt3";
 160                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 161                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 162                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 163                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 164                         };
 165                         gen2_i2c_scl_pt5 {
 166                                 nvidia,pins = "gen2_i2c_scl_pt5",
 167                                                 "gen2_i2c_sda_pt6";
 168                                 nvidia,function = "i2c2";
 169                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 170                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 171                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 172                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 173                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 174                         };
 175                         gmi_a16_pj7 {
 176                                 nvidia,pins = "gmi_a16_pj7";
 177                                 nvidia,function = "uartd";
 178                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 179                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 180                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 181                         };
 182                         gmi_a17_pb0 {
 183                                 nvidia,pins = "gmi_a17_pb0",
 184                                                 "gmi_a18_pb1";
 185                                 nvidia,function = "uartd";
 186                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 187                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 188                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 189                         };
 190                         gmi_a19_pk7 {
 191                                 nvidia,pins = "gmi_a19_pk7";
 192                                 nvidia,function = "uartd";
 193                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 194                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 195                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 196                         };
 197                         gmi_ad5_pg5 {
 198                                 nvidia,pins = "gmi_ad5_pg5",
 199                                                 "gmi_cs6_n_pi3",
 200                                                 "gmi_wr_n_pi0";
 201                                 nvidia,function = "spi4";
 202                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 203                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 204                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 205                         };
 206                         gmi_ad6_pg6 {
 207                                 nvidia,pins = "gmi_ad6_pg6",
 208                                                 "gmi_ad7_pg7";
 209                                 nvidia,function = "spi4";
 210                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 211                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 212                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 213                         };
 214                         gmi_ad12_ph4 {
 215                                 nvidia,pins = "gmi_ad12_ph4";
 216                                 nvidia,function = "rsvd4";
 217                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 218                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 219                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 220                         };
 221                         gmi_ad9_ph1 {
 222                                 nvidia,pins = "gmi_ad9_ph1";
 223                                 nvidia,function = "pwm1";
 224                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 225                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 226                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 227                         };
 228                         gmi_cs1_n_pj2 {
 229                                 nvidia,pins = "gmi_cs1_n_pj2",
 230                                                 "gmi_oe_n_pi1";
 231                                 nvidia,function = "soc";
 232                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 233                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 234                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 235                         };
 236                         clk2_out_pw5 {
 237                                 nvidia,pins = "clk2_out_pw5";
 238                                 nvidia,function = "extperiph2";
 239                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 240                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 241                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 242                         };
 243                         sdmmc1_clk_pz0 {
 244                                 nvidia,pins = "sdmmc1_clk_pz0";
 245                                 nvidia,function = "sdmmc1";
 246                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 247                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 248                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 249                         };
 250                         sdmmc1_cmd_pz1 {
 251                                 nvidia,pins = "sdmmc1_cmd_pz1",
 252                                                 "sdmmc1_dat0_py7",
 253                                                 "sdmmc1_dat1_py6",
 254                                                 "sdmmc1_dat2_py5",
 255                                                 "sdmmc1_dat3_py4";
 256                                 nvidia,function = "sdmmc1";
 257                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 258                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 259                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 260                         };
 261                         sdmmc1_wp_n_pv3 {
 262                                 nvidia,pins = "sdmmc1_wp_n_pv3";
 263                                 nvidia,function = "spi4";
 264                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 265                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 266                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 267                         };
 268                         sdmmc3_clk_pa6 {
 269                                 nvidia,pins = "sdmmc3_clk_pa6";
 270                                 nvidia,function = "sdmmc3";
 271                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 272                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 273                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 274                         };
 275                         sdmmc3_cmd_pa7 {
 276                                 nvidia,pins = "sdmmc3_cmd_pa7",
 277                                                 "sdmmc3_dat0_pb7",
 278                                                 "sdmmc3_dat1_pb6",
 279                                                 "sdmmc3_dat2_pb5",
 280                                                 "sdmmc3_dat3_pb4",
 281                                                 "kb_col4_pq4",
 282                                                 "sdmmc3_clk_lb_out_pee4",
 283                                                 "sdmmc3_clk_lb_in_pee5";
 284                                 nvidia,function = "sdmmc3";
 285                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 286                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 287                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 288                         };
 289                         sdmmc4_clk_pcc4 {
 290                                 nvidia,pins = "sdmmc4_clk_pcc4";
 291                                 nvidia,function = "sdmmc4";
 292                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 293                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 294                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 295                         };
 296                         sdmmc4_cmd_pt7 {
 297                                 nvidia,pins = "sdmmc4_cmd_pt7",
 298                                                 "sdmmc4_dat0_paa0",
 299                                                 "sdmmc4_dat1_paa1",
 300                                                 "sdmmc4_dat2_paa2",
 301                                                 "sdmmc4_dat3_paa3",
 302                                                 "sdmmc4_dat4_paa4",
 303                                                 "sdmmc4_dat5_paa5",
 304                                                 "sdmmc4_dat6_paa6",
 305                                                 "sdmmc4_dat7_paa7";
 306                                 nvidia,function = "sdmmc4";
 307                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 308                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 309                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 310                         };
 311                         clk_32k_out_pa0 {
 312                                 nvidia,pins = "clk_32k_out_pa0";
 313                                 nvidia,function = "blink";
 314                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 315                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 316                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 317                         };
 318                         kb_col0_pq0 {
 319                                 nvidia,pins = "kb_col0_pq0",
 320                                                 "kb_col1_pq1",
 321                                                 "kb_col2_pq2",
 322                                                 "kb_row0_pr0",
 323                                                 "kb_row1_pr1",
 324                                                 "kb_row2_pr2";
 325                                 nvidia,function = "kbc";
 326                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 327                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 328                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 329                         };
 330                         dap3_din_pp1 {
 331                                 nvidia,pins = "dap3_din_pp1",
 332                                                 "dap3_sclk_pp3";
 333                                 nvidia,function = "displayb";
 334                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 335                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 336                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 337                         };
 338                         pv0 {
 339                                 nvidia,pins = "pv0";
 340                                 nvidia,function = "rsvd4";
 341                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 342                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 343                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 344                         };
 345                         kb_row7_pr7 {
 346                                 nvidia,pins = "kb_row7_pr7";
 347                                 nvidia,function = "rsvd2";
 348                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 349                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 350                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 351                         };
 352                         kb_row10_ps2 {
 353                                 nvidia,pins = "kb_row10_ps2";
 354                                 nvidia,function = "uarta";
 355                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 356                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 357                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 358                         };
 359                         kb_row9_ps1 {
 360                                 nvidia,pins = "kb_row9_ps1";
 361                                 nvidia,function = "uarta";
 362                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 363                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 364                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 365                         };
 366                         pwr_i2c_scl_pz6 {
 367                                 nvidia,pins = "pwr_i2c_scl_pz6",
 368                                                 "pwr_i2c_sda_pz7";
 369                                 nvidia,function = "i2cpwr";
 370                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 371                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 372                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 373                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 374                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 375                         };
 376                         sys_clk_req_pz5 {
 377                                 nvidia,pins = "sys_clk_req_pz5";
 378                                 nvidia,function = "sysclk";
 379                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 380                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 381                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 382                         };
 383                         core_pwr_req {
 384                                 nvidia,pins = "core_pwr_req";
 385                                 nvidia,function = "pwron";
 386                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 387                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 388                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 389                         };
 390                         cpu_pwr_req {
 391                                 nvidia,pins = "cpu_pwr_req";
 392                                 nvidia,function = "cpu";
 393                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 394                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 395                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 396                         };
 397                         pwr_int_n {
 398                                 nvidia,pins = "pwr_int_n";
 399                                 nvidia,function = "pmi";
 400                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 401                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 402                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 403                         };
 404                         reset_out_n {
 405                                 nvidia,pins = "reset_out_n";
 406                                 nvidia,function = "reset_out_n";
 407                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 408                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 409                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 410                         };
 411                         clk3_out_pee0 {
 412                                 nvidia,pins = "clk3_out_pee0";
 413                                 nvidia,function = "extperiph3";
 414                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 415                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 416                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 417                         };
 418                         gen1_i2c_scl_pc4 {
 419                                 nvidia,pins = "gen1_i2c_scl_pc4",
 420                                                 "gen1_i2c_sda_pc5";
 421                                 nvidia,function = "i2c1";
 422                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 423                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 424                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 425                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 426                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 427                         };
 428                         uart2_cts_n_pj5 {
 429                                 nvidia,pins = "uart2_cts_n_pj5";
 430                                 nvidia,function = "uartb";
 431                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 432                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 433                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 434                         };
 435                         uart2_rts_n_pj6 {
 436                                 nvidia,pins = "uart2_rts_n_pj6";
 437                                 nvidia,function = "uartb";
 438                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 439                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 440                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 441                         };
 442                         uart2_rxd_pc3 {
 443                                 nvidia,pins = "uart2_rxd_pc3";
 444                                 nvidia,function = "irda";
 445                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 446                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 447                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 448                         };
 449                         uart2_txd_pc2 {
 450                                 nvidia,pins = "uart2_txd_pc2";
 451                                 nvidia,function = "irda";
 452                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 453                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 454                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 455                         };
 456                         uart3_cts_n_pa1 {
 457                                 nvidia,pins = "uart3_cts_n_pa1",
 458                                                 "uart3_rxd_pw7";
 459                                 nvidia,function = "uartc";
 460                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 461                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 462                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 463                         };
 464                         uart3_rts_n_pc0 {
 465                                 nvidia,pins = "uart3_rts_n_pc0",
 466                                                 "uart3_txd_pw6";
 467                                 nvidia,function = "uartc";
 468                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 469                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 470                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 471                         };
 472                         owr {
 473                                 nvidia,pins = "owr";
 474                                 nvidia,function = "owr";
 475                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 476                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 477                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 478                         };
 479                         hdmi_cec_pee3 {
 480                                 nvidia,pins = "hdmi_cec_pee3";
 481                                 nvidia,function = "cec";
 482                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 483                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 484                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 485                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 486                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 487                         };
 488                         ddc_scl_pv4 {
 489                                 nvidia,pins = "ddc_scl_pv4",
 490                                                 "ddc_sda_pv5";
 491                                 nvidia,function = "i2c4";
 492                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 493                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 494                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 495                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 496                                 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
 497                         };
 498                         spdif_in_pk6 {
 499                                 nvidia,pins = "spdif_in_pk6";
 500                                 nvidia,function = "usb";
 501                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 502                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 503                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 504                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 505                         };
 506                         usb_vbus_en0_pn4 {
 507                                 nvidia,pins = "usb_vbus_en0_pn4";
 508                                 nvidia,function = "usb";
 509                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 510                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 511                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 512                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 513                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 514                         };
 515                         gpio_x6_aud_px6 {
 516                                 nvidia,pins = "gpio_x6_aud_px6";
 517                                 nvidia,function = "spi6";
 518                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 519                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 520                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 521                         };
 522                         gpio_x4_aud_px4 {
 523                                 nvidia,pins = "gpio_x4_aud_px4",
 524                                                 "gpio_x7_aud_px7";
 525                                 nvidia,function = "rsvd1";
 526                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 527                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 528                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 529                         };
 530                         gpio_x5_aud_px5 {
 531                                 nvidia,pins = "gpio_x5_aud_px5";
 532                                 nvidia,function = "rsvd1";
 533                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 534                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 535                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 536                         };
 537                         gpio_w2_aud_pw2 {
 538                                 nvidia,pins = "gpio_w2_aud_pw2";
 539                                 nvidia,function = "rsvd2";
 540                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 541                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 542                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 543                         };
 544                         gpio_w3_aud_pw3 {
 545                                 nvidia,pins = "gpio_w3_aud_pw3";
 546                                 nvidia,function = "spi6";
 547                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 548                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 549                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 550                         };
 551                         gpio_x1_aud_px1 {
 552                                 nvidia,pins = "gpio_x1_aud_px1";
 553                                 nvidia,function = "rsvd4";
 554                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 555                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 556                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 557                         };
 558                         gpio_x3_aud_px3 {
 559                                 nvidia,pins = "gpio_x3_aud_px3";
 560                                 nvidia,function = "rsvd4";
 561                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 562                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 563                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 564                         };
 565                         dap3_fs_pp0 {
 566                                 nvidia,pins = "dap3_fs_pp0";
 567                                 nvidia,function = "i2s2";
 568                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 569                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 570                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 571                         };
 572                         dap3_dout_pp2 {
 573                                 nvidia,pins = "dap3_dout_pp2";
 574                                 nvidia,function = "i2s2";
 575                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 576                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 577                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 578                         };
 579                         pv1 {
 580                                 nvidia,pins = "pv1";
 581                                 nvidia,function = "rsvd1";
 582                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 583                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 584                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 585                         };
 586                         pbb3 {
 587                                 nvidia,pins = "pbb3",
 588                                                 "pbb5",
 589                                                 "pbb6",
 590                                                 "pbb7";
 591                                 nvidia,function = "rsvd4";
 592                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 593                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 594                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 595                         };
 596                         pcc1 {
 597                                 nvidia,pins = "pcc1",
 598                                                 "pcc2";
 599                                 nvidia,function = "rsvd4";
 600                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 601                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 602                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 603                         };
 604                         gmi_ad0_pg0 {
 605                                 nvidia,pins = "gmi_ad0_pg0",
 606                                                 "gmi_ad1_pg1";
 607                                 nvidia,function = "gmi";
 608                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 609                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 610                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 611                         };
 612                         gmi_ad10_ph2 {
 613                                 nvidia,pins = "gmi_ad10_ph2",
 614                                                 "gmi_ad11_ph3",
 615                                                 "gmi_ad13_ph5",
 616                                                 "gmi_ad8_ph0",
 617                                                 "gmi_clk_pk1";
 618                                 nvidia,function = "gmi";
 619                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 620                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 621                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 622                         };
 623                         gmi_ad2_pg2 {
 624                                 nvidia,pins = "gmi_ad2_pg2",
 625                                                 "gmi_ad3_pg3";
 626                                 nvidia,function = "gmi";
 627                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 628                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 629                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 630                         };
 631                         gmi_adv_n_pk0 {
 632                                 nvidia,pins = "gmi_adv_n_pk0",
 633                                                 "gmi_cs0_n_pj0",
 634                                                 "gmi_cs2_n_pk3",
 635                                                 "gmi_cs4_n_pk2",
 636                                                 "gmi_cs7_n_pi6",
 637                                                 "gmi_dqs_p_pj3",
 638                                                 "gmi_iordy_pi5",
 639                                                 "gmi_wp_n_pc7";
 640                                 nvidia,function = "gmi";
 641                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 642                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 643                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 644                         };
 645                         gmi_cs3_n_pk4 {
 646                                 nvidia,pins = "gmi_cs3_n_pk4";
 647                                 nvidia,function = "gmi";
 648                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 649                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 650                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 651                         };
 652                         clk2_req_pcc5 {
 653                                 nvidia,pins = "clk2_req_pcc5";
 654                                 nvidia,function = "rsvd4";
 655                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 656                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 657                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 658                         };
 659                         kb_col3_pq3 {
 660                                 nvidia,pins = "kb_col3_pq3",
 661                                                 "kb_col6_pq6",
 662                                                 "kb_col7_pq7";
 663                                 nvidia,function = "kbc";
 664                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 665                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 666                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 667                         };
 668                         kb_col5_pq5 {
 669                                 nvidia,pins = "kb_col5_pq5";
 670                                 nvidia,function = "kbc";
 671                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 672                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 673                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 674                         };
 675                         kb_row3_pr3 {
 676                                 nvidia,pins = "kb_row3_pr3",
 677                                                 "kb_row4_pr4",
 678                                                 "kb_row6_pr6",
 679                                                 "kb_row8_ps0";
 680                                 nvidia,function = "kbc";
 681                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 682                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 683                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 684                         };
 685                         clk3_req_pee1 {
 686                                 nvidia,pins = "clk3_req_pee1";
 687                                 nvidia,function = "rsvd4";
 688                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 689                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 690                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 691                         };
 692                         pu4 {
 693                                 nvidia,pins = "pu4";
 694                                 nvidia,function = "displayb";
 695                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 696                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 697                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 698                         };
 699                         pu5 {
 700                                 nvidia,pins = "pu5",
 701                                                 "pu6";
 702                                 nvidia,function = "displayb";
 703                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 704                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 705                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 706                         };
 707                         hdmi_int_pn7 {
 708                                 nvidia,pins = "hdmi_int_pn7";
 709                                 nvidia,function = "rsvd1";
 710                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 711                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 712                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 713                         };
 714                         clk1_req_pee2 {
 715                                 nvidia,pins = "clk1_req_pee2",
 716                                                 "usb_vbus_en1_pn5";
 717                                 nvidia,function = "rsvd4";
 718                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 719                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 720                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 721                         };
 722
 723                         drive_sdio1 {
 724                                 nvidia,pins = "drive_sdio1";
 725                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 726                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 727                                 nvidia,pull-down-strength = <36>;
 728                                 nvidia,pull-up-strength = <20>;
 729                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
 730                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
 731                         };
 732                         drive_sdio3 {
 733                                 nvidia,pins = "drive_sdio3";
 734                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 735                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 736                                 nvidia,pull-down-strength = <22>;
 737                                 nvidia,pull-up-strength = <36>;
 738                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 739                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 740                         };
 741                         drive_gma {
 742                                 nvidia,pins = "drive_gma";
 743                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 744                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 745                                 nvidia,pull-down-strength = <2>;
 746                                 nvidia,pull-up-strength = <1>;
 747                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 748                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 749                         };
 750                 };
 751         };
 752
 753         serial@70006300 {
 754                 status = "okay";
 755         };
 756
 757         pwm@7000a000 {
 758                 status = "okay";
 759         };
 760
 761         i2c@7000c000 {
 762                 status = "okay";
 763                 clock-frequency = <100000>;
 764
 765                 battery: smart-battery@b {
 766                         compatible = "ti,bq20z45", "sbs,sbs-battery";
 767                         reg = <0xb>;
 768                         battery-name = "battery";
 769                         sbs,i2c-retry-count = <2>;
 770                         sbs,poll-retry-count = <100>;
 771                         power-supplies = <&charger>;
 772                 };
 773
 774                 rt5640: rt5640@1c {
 775                         compatible = "realtek,rt5640";
 776                         reg = <0x1c>;
 777                         interrupt-parent = <&gpio>;
 778                         interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>;
 779                         realtek,ldo1-en-gpios =
 780                                 <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
 781                 };
 782
 783                 temperature-sensor@4c {
 784                         compatible = "onnn,nct1008";
 785                         reg = <0x4c>;
 786                         vcc-supply = <&palmas_ldo6_reg>;
 787                         interrupt-parent = <&gpio>;
 788                         interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_LOW>;
 789                 };
 790         };
 791
 792         hdmi_ddc: i2c@7000c700 {
 793                 status = "okay";
 794         };
 795
 796         i2c@7000d000 {
 797                 status = "okay";
 798                 clock-frequency = <400000>;
 799
 800                 tps51632@43 {
 801                         compatible = "ti,tps51632";
 802                         reg = <0x43>;
 803                         regulator-name = "vdd-cpu";
 804                         regulator-min-microvolt = <500000>;
 805                         regulator-max-microvolt = <1520000>;
 806                         regulator-boot-on;
 807                         regulator-always-on;
 808                 };
 809
 810                 tps65090@48 {
 811                         compatible = "ti,tps65090";
 812                         reg = <0x48>;
 813                         interrupt-parent = <&gpio>;
 814                         interrupts = <TEGRA_GPIO(J, 0) IRQ_TYPE_LEVEL_HIGH>;
 815
 816                         vsys1-supply = <&vdd_ac_bat_reg>;
 817                         vsys2-supply = <&vdd_ac_bat_reg>;
 818                         vsys3-supply = <&vdd_ac_bat_reg>;
 819                         infet1-supply = <&vdd_ac_bat_reg>;
 820                         infet2-supply = <&vdd_ac_bat_reg>;
 821                         infet3-supply = <&tps65090_dcdc2_reg>;
 822                         infet4-supply = <&tps65090_dcdc2_reg>;
 823                         infet5-supply = <&tps65090_dcdc2_reg>;
 824                         infet6-supply = <&tps65090_dcdc2_reg>;
 825                         infet7-supply = <&tps65090_dcdc2_reg>;
 826                         vsys-l1-supply = <&vdd_ac_bat_reg>;
 827                         vsys-l2-supply = <&vdd_ac_bat_reg>;
 828
 829                         charger: charger {
 830                                 compatible = "ti,tps65090-charger";
 831                                 ti,enable-low-current-chrg;
 832                         };
 833
 834                         regulators {
 835                                 tps65090_dcdc1_reg: dcdc1 {
 836                                         regulator-name = "vdd-sys-5v0";
 837                                         regulator-always-on;
 838                                         regulator-boot-on;
 839                                 };
 840
 841                                 tps65090_dcdc2_reg: dcdc2 {
 842                                         regulator-name = "vdd-sys-3v3";
 843                                         regulator-always-on;
 844                                         regulator-boot-on;
 845                                 };
 846
 847                                 tps65090_dcdc3_reg: dcdc3 {
 848                                         regulator-name = "vdd-ao";
 849                                         regulator-always-on;
 850                                         regulator-boot-on;
 851                                 };
 852
 853                                 vdd_bl_reg: fet1 {
 854                                         regulator-name = "vdd-lcd-bl";
 855                                 };
 856
 857                                 fet3 {
 858                                         regulator-name = "vdd-modem-3v3";
 859                                 };
 860
 861                                 avdd_lcd_reg: fet4 {
 862                                         regulator-name = "avdd-lcd";
 863                                 };
 864
 865                                 fet5 {
 866                                         regulator-name = "vdd-lvds";
 867                                 };
 868
 869                                 fet6 {
 870                                         regulator-name = "vdd-sd-slot";
 871                                         regulator-always-on;
 872                                         regulator-boot-on;
 873                                 };
 874
 875                                 fet7 {
 876                                         regulator-name = "vdd-com-3v3";
 877                                 };
 878
 879                                 ldo1 {
 880                                         regulator-name = "vdd-sby-5v0";
 881                                         regulator-always-on;
 882                                         regulator-boot-on;
 883                                 };
 884
 885                                 ldo2 {
 886                                         regulator-name = "vdd-sby-3v3";
 887                                         regulator-always-on;
 888                                         regulator-boot-on;
 889                                 };
 890                         };
 891                 };
 892
 893                 palmas: tps65913@58 {
 894                         compatible = "ti,palmas";
 895                         reg = <0x58>;
 896                         interrupts = <0 86 IRQ_TYPE_LEVEL_LOW>;
 897
 898                         #interrupt-cells = <2>;
 899                         interrupt-controller;
 900
 901                         ti,system-power-controller;
 902
 903                         palmas_gpio: gpio {
 904                                 compatible = "ti,palmas-gpio";
 905                                 gpio-controller;
 906                                 #gpio-cells = <2>;
 907                         };
 908
 909                         pmic {
 910                                 compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
 911                                 smps1-in-supply = <&tps65090_dcdc3_reg>;
 912                                 smps3-in-supply = <&tps65090_dcdc3_reg>;
 913                                 smps4-in-supply = <&tps65090_dcdc2_reg>;
 914                                 smps7-in-supply = <&tps65090_dcdc2_reg>;
 915                                 smps8-in-supply = <&tps65090_dcdc2_reg>;
 916                                 smps9-in-supply = <&tps65090_dcdc2_reg>;
 917                                 ldo1-in-supply = <&tps65090_dcdc2_reg>;
 918                                 ldo2-in-supply = <&tps65090_dcdc2_reg>;
 919                                 ldo3-in-supply = <&palmas_smps3_reg>;
 920                                 ldo4-in-supply = <&tps65090_dcdc2_reg>;
 921                                 ldo5-in-supply = <&vdd_ac_bat_reg>;
 922                                 ldo6-in-supply = <&tps65090_dcdc2_reg>;
 923                                 ldo7-in-supply = <&tps65090_dcdc2_reg>;
 924                                 ldo8-in-supply = <&tps65090_dcdc3_reg>;
 925                                 ldo9-in-supply = <&palmas_smps9_reg>;
 926                                 ldoln-in-supply = <&tps65090_dcdc1_reg>;
 927                                 ldousb-in-supply = <&tps65090_dcdc1_reg>;
 928
 929                                 regulators {
 930                                         smps12 {
 931                                                 regulator-name = "vddio-ddr";
 932                                                 regulator-min-microvolt = <1350000>;
 933                                                 regulator-max-microvolt = <1350000>;
 934                                                 regulator-always-on;
 935                                                 regulator-boot-on;
 936                                         };
 937
 938                                         palmas_smps3_reg: smps3 {
 939                                                 regulator-name = "vddio-1v8";
 940                                                 regulator-min-microvolt = <1800000>;
 941                                                 regulator-max-microvolt = <1800000>;
 942                                                 regulator-always-on;
 943                                                 regulator-boot-on;
 944                                         };
 945
 946                                         smps45 {
 947                                                 regulator-name = "vdd-core";
 948                                                 regulator-min-microvolt = <900000>;
 949                                                 regulator-max-microvolt = <1400000>;
 950                                                 regulator-always-on;
 951                                                 regulator-boot-on;
 952                                         };
 953
 954                                         smps457 {
 955                                                 regulator-name = "vdd-core";
 956                                                 regulator-min-microvolt = <900000>;
 957                                                 regulator-max-microvolt = <1400000>;
 958                                                 regulator-always-on;
 959                                                 regulator-boot-on;
 960                                         };
 961
 962                                         smps8 {
 963                                                 regulator-name = "avdd-pll";
 964                                                 regulator-min-microvolt = <1050000>;
 965                                                 regulator-max-microvolt = <1050000>;
 966                                                 regulator-always-on;
 967                                                 regulator-boot-on;
 968                                         };
 969
 970                                         palmas_smps9_reg: smps9 {
 971                                                 regulator-name = "sdhci-vdd-sd-slot";
 972                                                 regulator-min-microvolt = <2800000>;
 973                                                 regulator-max-microvolt = <2800000>;
 974                                                 regulator-always-on;
 975                                         };
 976
 977                                         ldo1 {
 978                                                 regulator-name = "avdd-cam1";
 979                                                 regulator-min-microvolt = <2800000>;
 980                                                 regulator-max-microvolt = <2800000>;
 981                                         };
 982
 983                                         ldo2 {
 984                                                 regulator-name = "avdd-cam2";
 985                                                 regulator-min-microvolt = <2800000>;
 986                                                 regulator-max-microvolt = <2800000>;
 987                                         };
 988
 989                                         avdd_1v2_reg: ldo3 {
 990                                                 regulator-name = "avdd-dsi-csi";
 991                                                 regulator-min-microvolt = <1200000>;
 992                                                 regulator-max-microvolt = <1200000>;
 993                                         };
 994
 995                                         ldo4 {
 996                                                 regulator-name = "vpp-fuse";
 997                                                 regulator-min-microvolt = <1800000>;
 998                                                 regulator-max-microvolt = <1800000>;
 999                                         };
1000
1001                                         palmas_ldo6_reg: ldo6 {
1002                                                 regulator-name = "vdd-sensor-2v85";
1003                                                 regulator-min-microvolt = <2850000>;
1004                                                 regulator-max-microvolt = <2850000>;
1005                                         };
1006
1007                                         ldo7 {
1008                                                 regulator-name = "vdd-af-cam1";
1009                                                 regulator-min-microvolt = <2800000>;
1010                                                 regulator-max-microvolt = <2800000>;
1011                                         };
1012
1013                                         ldo8 {
1014                                                 regulator-name = "vdd-rtc";
1015                                                 regulator-min-microvolt = <900000>;
1016                                                 regulator-max-microvolt = <900000>;
1017                                                 regulator-always-on;
1018                                                 regulator-boot-on;
1019                                                 ti,enable-ldo8-tracking;
1020                                         };
1021
1022                                         ldo9 {
1023                                                 regulator-name = "vddio-sdmmc-2";
1024                                                 regulator-min-microvolt = <1800000>;
1025                                                 regulator-max-microvolt = <3300000>;
1026                                                 regulator-always-on;
1027                                                 regulator-boot-on;
1028                                         };
1029
1030                                         ldoln {
1031                                                 regulator-name = "hvdd-usb";
1032                                                 regulator-min-microvolt = <3300000>;
1033                                                 regulator-max-microvolt = <3300000>;
1034                                         };
1035
1036                                         ldousb {
1037                                                 regulator-name = "avdd-usb";
1038                                                 regulator-min-microvolt = <3300000>;
1039                                                 regulator-max-microvolt = <3300000>;
1040                                                 regulator-always-on;
1041                                                 regulator-boot-on;
1042                                         };
1043
1044                                         regen1 {
1045                                                 regulator-name = "rail-3v3";
1046                                                 regulator-max-microvolt = <3300000>;
1047                                                 regulator-always-on;
1048                                                 regulator-boot-on;
1049                                         };
1050
1051                                         regen2 {
1052                                                 regulator-name = "rail-5v0";
1053                                                 regulator-max-microvolt = <5000000>;
1054                                                 regulator-always-on;
1055                                                 regulator-boot-on;
1056                                         };
1057                                 };
1058                         };
1059
1060                         rtc {
1061                                 compatible = "ti,palmas-rtc";
1062                                 interrupt-parent = <&palmas>;
1063                                 interrupts = <8 0>;
1064                         };
1065
1066                         pinmux {
1067                                 compatible = "ti,tps65913-pinctrl";
1068                                 pinctrl-names = "default";
1069                                 pinctrl-0 = <&palmas_default>;
1070
1071                                 palmas_default: pinmux {
1072                                         pin_gpio6 {
1073                                                 pins = "gpio6";
1074                                                 function = "gpio";
1075                                         };
1076                                 };
1077                         };
1078                 };
1079         };
1080
1081         spi@7000da00 {
1082                 status = "okay";
1083                 spi-max-frequency = <25000000>;
1084                 spi-flash@0 {
1085                         compatible = "winbond,w25q32dw";
1086                         reg = <0>;
1087                         spi-max-frequency = <20000000>;
1088                 };
1089         };
1090
1091         pmc@7000e400 {
1092                 nvidia,invert-interrupt;
1093                 nvidia,suspend-mode = <1>;
1094                 nvidia,cpu-pwr-good-time = <500>;
1095                 nvidia,cpu-pwr-off-time = <300>;
1096                 nvidia,core-pwr-good-time = <641 3845>;
1097                 nvidia,core-pwr-off-time = <61036>;
1098                 nvidia,core-power-req-active-high;
1099                 nvidia,sys-clock-req-active-high;
1100         };
1101
1102         ahub@70080000 {
1103                 i2s@70080400 {
1104                         status = "okay";
1105                 };
1106         };
1107
1108         sdhci@78000400 {
1109                 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1110                 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
1111                 bus-width = <4>;
1112                 status = "okay";
1113         };
1114
1115         sdhci@78000600 {
1116                 bus-width = <8>;
1117                 status = "okay";
1118                 non-removable;
1119         };
1120
1121         usb@7d008000 {
1122                 status = "okay";
1123         };
1124
1125         usb-phy@7d008000 {
1126                 status = "okay";
1127                 vbus-supply = <&usb3_vbus_reg>;
1128         };
1129
1130         backlight: backlight {
1131                 compatible = "pwm-backlight";
1132
1133                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1134                 power-supply = <&vdd_bl_reg>;
1135                 pwms = <&pwm 1 1000000>;
1136
1137                 brightness-levels = <0 4 8 16 32 64 128 255>;
1138                 default-brightness-level = <6>;
1139         };
1140
1141         clocks {
1142                 compatible = "simple-bus";
1143                 #address-cells = <1>;
1144                 #size-cells = <0>;
1145
1146                 clk32k_in: clock@0 {
1147                         compatible = "fixed-clock";
1148                         reg=<0>;
1149                         #clock-cells = <0>;
1150                         clock-frequency = <32768>;
1151                 };
1152         };
1153
1154         gpio-keys {
1155                 compatible = "gpio-keys";
1156
1157                 home {
1158                         label = "Home";
1159                         gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
1160                         linux,code = <KEY_HOME>;
1161                 };
1162
1163                 power {
1164                         label = "Power";
1165                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1166                         linux,code = <KEY_POWER>;
1167                         gpio-key,wakeup;
1168                 };
1169
1170                 volume_down {
1171                         label = "Volume Down";
1172                         gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
1173                         linux,code = <KEY_VOLUMEDOWN>;
1174                 };
1175
1176                 volume_up {
1177                         label = "Volume Up";
1178                         gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
1179                         linux,code = <KEY_VOLUMEUP>;
1180                 };
1181         };
1182
1183         regulators {
1184                 compatible = "simple-bus";
1185                 #address-cells = <1>;
1186                 #size-cells = <0>;
1187
1188                 vdd_ac_bat_reg: regulator@0 {
1189                         compatible = "regulator-fixed";
1190                         reg = <0>;
1191                         regulator-name = "vdd_ac_bat";
1192                         regulator-min-microvolt = <5000000>;
1193                         regulator-max-microvolt = <5000000>;
1194                         regulator-always-on;
1195                 };
1196
1197                 dvdd_ts_reg: regulator@1 {
1198                         compatible = "regulator-fixed";
1199                         reg = <1>;
1200                         regulator-name = "dvdd_ts";
1201                         regulator-min-microvolt = <1800000>;
1202                         regulator-max-microvolt = <1800000>;
1203                         enable-active-high;
1204                         gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
1205                 };
1206
1207                 usb1_vbus_reg: regulator@3 {
1208                         compatible = "regulator-fixed";
1209                         reg = <3>;
1210                         regulator-name = "usb1_vbus";
1211                         regulator-min-microvolt = <5000000>;
1212                         regulator-max-microvolt = <5000000>;
1213                         enable-active-high;
1214                         gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1215                         gpio-open-drain;
1216                         vin-supply = <&tps65090_dcdc1_reg>;
1217                 };
1218
1219                 usb3_vbus_reg: regulator@4 {
1220                         compatible = "regulator-fixed";
1221                         reg = <4>;
1222                         regulator-name = "usb2_vbus";
1223                         regulator-min-microvolt = <5000000>;
1224                         regulator-max-microvolt = <5000000>;
1225                         enable-active-high;
1226                         gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1227                         gpio-open-drain;
1228                         vin-supply = <&tps65090_dcdc1_reg>;
1229                 };
1230
1231                 vdd_hdmi_reg: regulator@5 {
1232                         compatible = "regulator-fixed";
1233                         reg = <5>;
1234                         regulator-name = "vdd_hdmi_5v0";
1235                         regulator-min-microvolt = <5000000>;
1236                         regulator-max-microvolt = <5000000>;
1237                         vin-supply = <&tps65090_dcdc1_reg>;
1238                 };
1239
1240                 vdd_cam_1v8_reg: regulator@6 {
1241                         compatible = "regulator-fixed";
1242                         reg = <6>;
1243                         regulator-name = "vdd_cam_1v8_reg";
1244                         regulator-min-microvolt = <1800000>;
1245                         regulator-max-microvolt = <1800000>;
1246                         enable-active-high;
1247                         gpio = <&palmas_gpio 6 0>;
1248                 };
1249
1250                 vdd_5v0_hdmi: regulator@7 {
1251                         compatible = "regulator-fixed";
1252                         reg = <7>;
1253                         regulator-name = "VDD_5V0_HDMI_CON";
1254                         regulator-min-microvolt = <5000000>;
1255                         regulator-max-microvolt = <5000000>;
1256                         gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1257                         enable-active-high;
1258                         vin-supply = <&tps65090_dcdc1_reg>;
1259                 };
1260         };
1261
1262         sound {
1263                 compatible = "nvidia,tegra-audio-rt5640-dalmore",
1264                              "nvidia,tegra-audio-rt5640";
1265                 nvidia,model = "NVIDIA Tegra Dalmore";
1266
1267                 nvidia,audio-routing =
1268                         "Headphones", "HPOR",
1269                         "Headphones", "HPOL",
1270                         "Speakers", "SPORP",
1271                         "Speakers", "SPORN",
1272                         "Speakers", "SPOLP",
1273                         "Speakers", "SPOLN",
1274                         "Mic Jack", "MICBIAS1",
1275                         "IN2P", "Mic Jack";
1276
1277                 nvidia,i2s-controller = <&tegra_i2s1>;
1278                 nvidia,audio-codec = <&rt5640>;
1279
1280                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
1281
1282                 clocks = <&tegra_car TEGRA114_CLK_PLL_A>,
1283                          <&tegra_car TEGRA114_CLK_PLL_A_OUT0>,
1284                          <&tegra_car TEGRA114_CLK_EXTERN1>;
1285                 clock-names = "pll_a", "pll_a_out0", "mclk";
1286         };
1287 };