arch/arm/boot/dts/ste-hrefprev60.dtsi

   1 /*
   2  * Copyright 2012 ST-Ericsson AB
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  *
  11  * Device Tree for the HREF+ prior to the v60 variant.
  12  */
  13
  14 #include "ste-dbx5x0.dtsi"
  15 #include "ste-href-ab8500.dtsi"
  16 #include "ste-href.dtsi"
  17
  18 / {
  19         gpio_keys {
  20                 button@1 {
  21                         gpios = <&tc3589x_gpio 7 0x4>;
  22                 };
  23         };
  24
  25         soc {
  26                 /* Enable UART1 on this board */
  27                 uart@80121000 {
  28                         status = "okay";
  29                 };
  30
  31                 i2c@80004000 {
  32                         tps61052@33 {
  33                                 compatible = "tps61052";
  34                                 reg = <0x33>;
  35                         };
  36
  37                         tc35892@42 {
  38                                 compatible = "toshiba,tc35892";
  39                                 reg = <0x42>;
  40                                 interrupt-parent = <&gpio6>;
  41                                 interrupts = <25 IRQ_TYPE_EDGE_RISING>;
  42                                 pinctrl-names = "default";
  43                                 pinctrl-0 = <&tc35892_hrefprev60_mode>;
  44
  45                                 interrupt-controller;
  46                                 #interrupt-cells = <1>;
  47
  48                                 tc3589x_gpio: tc3589x_gpio {
  49                                         compatible = "tc3589x-gpio";
  50                                         interrupts = <0>;
  51
  52                                         interrupt-controller;
  53                                         #interrupt-cells = <2>;
  54                                         gpio-controller;
  55                                         #gpio-cells = <2>;
  56                                 };
  57                         };
  58                 };
  59
  60                 ssp@80002000 {
  61                         /*
  62                          * On the first generation boards, this SSP/SPI port was connected
  63                          * to the AB8500.
  64                          */
  65                         pinctrl-names = "default";
  66                         pinctrl-0 = <&ssp0_hrefprev60_mode>;
  67                 };
  68
  69                 // External Micro SD slot
  70                 sdi0_per1@80126000 {
  71                         cd-gpios  = <&tc3589x_gpio 3 0x4>;
  72                 };
  73
  74                 vmmci: regulator-gpio {
  75                         gpios = <&tc3589x_gpio 18 0x4>;
  76                         enable-gpio = <&tc3589x_gpio 17 0x4>;
  77                 };
  78
  79                 pinctrl {
  80                         /* Set this up using hogs */
  81                         pinctrl-names = "default";
  82                         pinctrl-0 = <&ipgpio_hrefprev60_mode>;
  83
  84                         ssp0 {
  85                                 ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
  86                                         hrefprev60_mux {
  87                                                 function = "ssp0";
  88                                                 groups = "ssp0_a_1";
  89                                         };
  90                                         hrefprev60_cfg1 {
  91                                                 pins = "GPIO145_C13"; /* RXD */
  92                                                 ste,config = <&in_pd>;
  93                                         };
  94
  95                                 };
  96                         };
  97                         sdi0 {
  98                                 /* This additional pin needed on early MOP500 and HREFs previous to v60 */
  99                                 sdi0_default_mode: sdi0_default {
 100                                         hrefprev60_mux {
 101                                                 function = "mc0";
 102                                                 groups = "mc0dat31dir_a_1";
 103                                         };
 104                                         hrefprev60_cfg1 {
 105                                                 pins = "GPIO21_AB3"; /* DAT31DIR */
 106                                                 ste,config = <&out_hi>;
 107                                         };
 108
 109                                 };
 110                         };
 111                         tc35892 {
 112                                 tc35892_hrefprev60_mode: tc35892_hrefprev60 {
 113                                         hrefprev60_cfg {
 114                                                 pins = "GPIO217_AH12";
 115                                                 ste,config = <&gpio_in_pu>;
 116                                         };
 117                                 };
 118                         };
 119                         ipgpio {
 120                                  ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
 121                                         hrefprev60_mux {
 122                                                 function = "ipgpio";
 123                                                 groups = "ipgpio0_c_1", "ipgpio1_c_1";
 124                                         };
 125                                         hrefprev60_cfg1 {
 126                                                 pins = "GPIO6_AF6", "GPIO7_AG5";
 127                                                 ste,config = <&in_pu>;
 128                                         };
 129                                  };
 130                         };
 131                 };
 132         };
 133 };