arch/arm/boot/dts/rk3288-veyron.dtsi

   1 /*
   2  * Google Veyron (and derivatives) board device tree source
   3  *
   4  * Copyright 2015 Google, Inc
   5  *
   6  * This file is dual-licensed: you can use it either under the terms
   7  * of the GPL or the X11 license, at your option. Note that this dual
   8  * licensing only applies to this file, and not this project as a
   9  * whole.
  10  *
  11  *  a) This file is free software; you can redistribute it and/or
  12  *     modify it under the terms of the GNU General Public License as
  13  *     published by the Free Software Foundation; either version 2 of the
  14  *     License, or (at your option) any later version.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  *  Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 #include <dt-bindings/clock/rockchip,rk808.h>
  46 #include <dt-bindings/input/input.h>
  47 #include "rk3288.dtsi"
  48
  49 / {
  50         memory {
  51                 device_type = "memory";
  52                 reg = <0x0 0x80000000>;
  53         };
  54
  55         gpio_keys: gpio-keys {
  56                 compatible = "gpio-keys";
  57                 #address-cells = <1>;
  58                 #size-cells = <0>;
  59
  60                 pinctrl-names = "default";
  61                 pinctrl-0 = <&pwr_key_l>;
  62                 power {
  63                         label = "Power";
  64                         gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
  65                         linux,code = <KEY_POWER>;
  66                         debounce-interval = <100>;
  67                         gpio-key,wakeup;
  68                 };
  69         };
  70
  71         gpio-restart {
  72                 compatible = "gpio-restart";
  73                 gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
  74                 pinctrl-names = "default";
  75                 pinctrl-0 = <&ap_warm_reset_h>;
  76                 priority = <200>;
  77         };
  78
  79         emmc_pwrseq: emmc-pwrseq {
  80                 compatible = "mmc-pwrseq-emmc";
  81                 pinctrl-0 = <&emmc_reset>;
  82                 pinctrl-names = "default";
  83                 reset-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
  84         };
  85
  86         io_domains: io-domains {
  87                 compatible = "rockchip,rk3288-io-voltage-domain";
  88                 rockchip,grf = <&grf>;
  89
  90                 bb-supply = <&vcc33_io>;
  91                 dvp-supply = <&vcc_18>;
  92                 flash0-supply = <&vcc18_flashio>;
  93                 gpio1830-supply = <&vcc33_io>;
  94                 gpio30-supply = <&vcc33_io>;
  95                 lcdc-supply = <&vcc33_lcd>;
  96                 wifi-supply = <&vcc18_wl>;
  97         };
  98
  99         sdio_pwrseq: sdio-pwrseq {
 100                 compatible = "mmc-pwrseq-simple";
 101                 clocks = <&rk808 RK808_CLKOUT1>;
 102                 clock-names = "ext_clock";
 103                 pinctrl-names = "default";
 104                 pinctrl-0 = <&bt_enable_l>, <&wifi_enable_h>;
 105
 106                 /*
 107                  * On the module itself this is one of these (depending
 108                  * on the actual card populated):
 109                  * - SDIO_RESET_L_WL_REG_ON
 110                  * - PDN (power down when low)
 111                  */
 112                 reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
 113         };
 114
 115         vcc_5v: vcc-5v {
 116                 compatible = "regulator-fixed";
 117                 regulator-name = "vcc_5v";
 118                 regulator-always-on;
 119                 regulator-boot-on;
 120                 regulator-min-microvolt = <5000000>;
 121                 regulator-max-microvolt = <5000000>;
 122         };
 123
 124         vcc33_sys: vcc33-sys {
 125                 compatible = "regulator-fixed";
 126                 regulator-name = "vcc33_sys";
 127                 regulator-always-on;
 128                 regulator-boot-on;
 129                 regulator-min-microvolt = <3300000>;
 130                 regulator-max-microvolt = <3300000>;
 131         };
 132
 133         vcc50_hdmi: vcc50-hdmi {
 134                 compatible = "regulator-fixed";
 135                 regulator-name = "vcc50_hdmi";
 136                 regulator-always-on;
 137                 regulator-boot-on;
 138                 vin-supply = <&vcc_5v>;
 139         };
 140 };
 141
 142 &cpu0 {
 143         cpu0-supply = <&vdd_cpu>;
 144 };
 145
 146 &emmc {
 147         status = "okay";
 148
 149         bus-width = <8>;
 150         cap-mmc-highspeed;
 151         rockchip,default-sample-phase = <158>;
 152         disable-wp;
 153         mmc-hs200-1_8v;
 154         mmc-pwrseq = <&emmc_pwrseq>;
 155         non-removable;
 156         num-slots = <1>;
 157         pinctrl-names = "default";
 158         pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
 159 };
 160
 161 &hdmi {
 162         ddc-i2c-bus = <&i2c5>;
 163         status = "okay";
 164 };
 165
 166 &i2c0 {
 167         status = "okay";
 168
 169         clock-frequency = <400000>;
 170         i2c-scl-falling-time-ns = <50>;         /* 2.5ns measured */
 171         i2c-scl-rising-time-ns = <100>;         /* 45ns measured */
 172
 173         rk808: pmic@1b {
 174                 compatible = "rockchip,rk808";
 175                 reg = <0x1b>;
 176                 clock-output-names = "xin32k", "wifibt_32kin";
 177                 interrupt-parent = <&gpio0>;
 178                 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
 179                 pinctrl-names = "default";
 180                 pinctrl-0 = <&pmic_int_l>;
 181                 rockchip,system-power-controller;
 182                 wakeup-source;
 183                 #clock-cells = <1>;
 184
 185                 vcc1-supply = <&vcc33_sys>;
 186                 vcc2-supply = <&vcc33_sys>;
 187                 vcc3-supply = <&vcc33_sys>;
 188                 vcc4-supply = <&vcc33_sys>;
 189                 vcc6-supply = <&vcc_5v>;
 190                 vcc7-supply = <&vcc33_sys>;
 191                 vcc8-supply = <&vcc33_sys>;
 192                 vcc12-supply = <&vcc_18>;
 193                 vddio-supply = <&vcc33_io>;
 194
 195                 regulators {
 196                         vdd_cpu: DCDC_REG1 {
 197                                 regulator-name = "vdd_arm";
 198                                 regulator-always-on;
 199                                 regulator-boot-on;
 200                                 regulator-min-microvolt = <750000>;
 201                                 regulator-max-microvolt = <1450000>;
 202                                 regulator-ramp-delay = <6001>;
 203                                 regulator-state-mem {
 204                                         regulator-off-in-suspend;
 205                                 };
 206                         };
 207
 208                         vdd_gpu: DCDC_REG2 {
 209                                 regulator-name = "vdd_gpu";
 210                                 regulator-always-on;
 211                                 regulator-boot-on;
 212                                 regulator-min-microvolt = <800000>;
 213                                 regulator-max-microvolt = <1250000>;
 214                                 regulator-ramp-delay = <6001>;
 215                                 regulator-state-mem {
 216                                         regulator-on-in-suspend;
 217                                         regulator-suspend-microvolt = <1000000>;
 218                                 };
 219                         };
 220
 221                         vcc135_ddr: DCDC_REG3 {
 222                                 regulator-name = "vcc135_ddr";
 223                                 regulator-always-on;
 224                                 regulator-boot-on;
 225                                 regulator-state-mem {
 226                                         regulator-on-in-suspend;
 227                                 };
 228                         };
 229
 230                         /*
 231                          * vcc_18 has several aliases.  (vcc18_flashio and
 232                          * vcc18_wl).  We'll add those aliases here just to
 233                          * make it easier to follow the schematic.  The signals
 234                          * are actually hooked together and only separated for
 235                          * power measurement purposes).
 236                          */
 237                         vcc18_wl: vcc18_flashio: vcc_18: DCDC_REG4 {
 238                                 regulator-name = "vcc_18";
 239                                 regulator-always-on;
 240                                 regulator-boot-on;
 241                                 regulator-min-microvolt = <1800000>;
 242                                 regulator-max-microvolt = <1800000>;
 243                                 regulator-state-mem {
 244                                         regulator-on-in-suspend;
 245                                         regulator-suspend-microvolt = <1800000>;
 246                                 };
 247                         };
 248
 249                         /*
 250                          * Note that both vcc33_io and vcc33_pmuio are always
 251                          * powered together. To simplify the logic in the dts
 252                          * we just refer to vcc33_io every time something is
 253                          * powered from vcc33_pmuio. In fact, on later boards
 254                          * (such as danger) they're the same net.
 255                          */
 256                         vcc33_io: LDO_REG1 {
 257                                 regulator-name = "vcc33_io";
 258                                 regulator-always-on;
 259                                 regulator-boot-on;
 260                                 regulator-min-microvolt = <3300000>;
 261                                 regulator-max-microvolt = <3300000>;
 262                                 regulator-state-mem {
 263                                         regulator-on-in-suspend;
 264                                         regulator-suspend-microvolt = <3300000>;
 265                                 };
 266                         };
 267
 268                         vdd_10: LDO_REG3 {
 269                                 regulator-name = "vdd_10";
 270                                 regulator-always-on;
 271                                 regulator-boot-on;
 272                                 regulator-min-microvolt = <1000000>;
 273                                 regulator-max-microvolt = <1000000>;
 274                                 regulator-state-mem {
 275                                         regulator-on-in-suspend;
 276                                         regulator-suspend-microvolt = <1000000>;
 277                                 };
 278                         };
 279
 280                         vdd10_lcd_pwren_h: LDO_REG7 {
 281                                 regulator-name = "vdd10_lcd_pwren_h";
 282                                 regulator-always-on;
 283                                 regulator-boot-on;
 284                                 regulator-min-microvolt = <2500000>;
 285                                 regulator-max-microvolt = <2500000>;
 286                                 regulator-state-mem {
 287                                         regulator-off-in-suspend;
 288                                 };
 289                         };
 290
 291                         vcc33_lcd: SWITCH_REG1 {
 292                                 regulator-name = "vcc33_lcd";
 293                                 regulator-always-on;
 294                                 regulator-boot-on;
 295                                 regulator-state-mem {
 296                                         regulator-off-in-suspend;
 297                                 };
 298                         };
 299                 };
 300         };
 301 };
 302
 303 &i2c1 {
 304         status = "okay";
 305
 306         clock-frequency = <400000>;
 307         i2c-scl-falling-time-ns = <50>;         /* 2.5ns measured */
 308         i2c-scl-rising-time-ns = <100>;         /* 40ns measured */
 309
 310         tpm: tpm@20 {
 311                 compatible = "infineon,slb9645tt";
 312                 reg = <0x20>;
 313                 powered-while-suspended;
 314         };
 315 };
 316
 317 &i2c2 {
 318         status = "okay";
 319
 320         /* 100kHz since 4.7k resistors don't rise fast enough */
 321         clock-frequency = <100000>;
 322         i2c-scl-falling-time-ns = <50>;         /* 10ns measured */
 323         i2c-scl-rising-time-ns = <800>;         /* 600ns measured */
 324 };
 325
 326 &i2c4 {
 327         status = "okay";
 328
 329         clock-frequency = <400000>;
 330         i2c-scl-falling-time-ns = <50>;         /* 11ns measured */
 331         i2c-scl-rising-time-ns = <300>;         /* 225ns measured */
 332 };
 333
 334 &i2c5 {
 335         status = "okay";
 336
 337         clock-frequency = <100000>;
 338         i2c-scl-falling-time-ns = <300>;
 339         i2c-scl-rising-time-ns = <1000>;
 340 };
 341
 342 &pwm1 {
 343         status = "okay";
 344 };
 345
 346 &sdio0 {
 347         status = "okay";
 348
 349         bus-width = <4>;
 350         cap-sd-highspeed;
 351         cap-sdio-irq;
 352         keep-power-in-suspend;
 353         mmc-pwrseq = <&sdio_pwrseq>;
 354         non-removable;
 355         num-slots = <1>;
 356         pinctrl-names = "default";
 357         pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>;
 358         sd-uhs-sdr12;
 359         sd-uhs-sdr25;
 360         sd-uhs-sdr50;
 361         sd-uhs-sdr104;
 362         vmmc-supply = <&vcc33_sys>;
 363         vqmmc-supply = <&vcc18_wl>;
 364 };
 365
 366 &spi2 {
 367         status = "okay";
 368
 369         rx-sample-delay-ns = <12>;
 370 };
 371
 372 &tsadc {
 373         status = "okay";
 374
 375         rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
 376         rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
 377 };
 378
 379 &uart0 {
 380         status = "okay";
 381
 382         /* We need to go faster than 24MHz, so adjust clock parents / rates */
 383         assigned-clocks = <&cru SCLK_UART0>;
 384         assigned-clock-rates = <48000000>;
 385
 386         /* Pins don't include flow control by default; add that in */
 387         pinctrl-names = "default";
 388         pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
 389 };
 390
 391 &uart1 {
 392         status = "okay";
 393 };
 394
 395 &uart2 {
 396         status = "okay";
 397 };
 398
 399 &usbphy {
 400         status = "okay";
 401 };
 402
 403 &usb_host0_ehci {
 404         status = "okay";
 405
 406         needs-reset-on-resume;
 407 };
 408
 409 &usb_host1 {
 410         status = "okay";
 411 };
 412
 413 &usb_otg {
 414         status = "okay";
 415
 416         assigned-clocks = <&cru SCLK_USBPHY480M_SRC>;
 417         assigned-clock-parents = <&cru SCLK_OTGPHY0>;
 418         dr_mode = "host";
 419 };
 420
 421 &vopb {
 422         status = "okay";
 423 };
 424
 425 &vopb_mmu {
 426         status = "okay";
 427 };
 428
 429 &wdt {
 430         status = "okay";
 431 };
 432
 433 &pinctrl {
 434         pinctrl-names = "default", "sleep";
 435         pinctrl-0 = <
 436                 /* Common for sleep and wake, but no owners */
 437                 &global_pwroff
 438         >;
 439         pinctrl-1 = <
 440                 /* Common for sleep and wake, but no owners */
 441                 &global_pwroff
 442         >;
 443
 444         pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
 445                 bias-disable;
 446                 drive-strength = <8>;
 447         };
 448
 449         pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
 450                 bias-pull-up;
 451                 drive-strength = <8>;
 452         };
 453
 454         pcfg_output_high: pcfg-output-high {
 455                 output-high;
 456         };
 457
 458         pcfg_output_low: pcfg-output-low {
 459                 output-low;
 460         };
 461
 462         buttons {
 463                 pwr_key_l: pwr-key-l {
 464                         rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
 465                 };
 466         };
 467
 468         emmc {
 469                 emmc_reset: emmc-reset {
 470                         rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>;
 471                 };
 472
 473                 /*
 474                  * We run eMMC at max speed; bump up drive strength.
 475                  * We also have external pulls, so disable the internal ones.
 476                  */
 477                 emmc_clk: emmc-clk {
 478                         rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
 479                 };
 480
 481                 emmc_cmd: emmc-cmd {
 482                         rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
 483                 };
 484
 485                 emmc_bus8: emmc-bus8 {
 486                         rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
 487                                         <3 1 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
 488                                         <3 2 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
 489                                         <3 3 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
 490                                         <3 4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
 491                                         <3 5 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
 492                                         <3 6 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
 493                                         <3 7 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
 494                 };
 495         };
 496
 497         pmic {
 498                 pmic_int_l: pmic-int-l {
 499                         rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
 500                 };
 501         };
 502
 503         reboot {
 504                 ap_warm_reset_h: ap-warm-reset-h {
 505                         rockchip,pins = <RK_GPIO0 13 RK_FUNC_GPIO &pcfg_pull_none>;
 506                 };
 507         };
 508
 509         recovery-switch {
 510                 rec_mode_l: rec-mode-l {
 511                         rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
 512                 };
 513         };
 514
 515         sdio0 {
 516                 wifi_enable_h: wifienable-h {
 517                         rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
 518                 };
 519
 520                 /* NOTE: mislabelled on schematic; should be bt_enable_h */
 521                 bt_enable_l: bt-enable-l {
 522                         rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_none>;
 523                 };
 524
 525                 /*
 526                  * We run sdio0 at max speed; bump up drive strength.
 527                  * We also have external pulls, so disable the internal ones.
 528                  */
 529                 sdio0_bus4: sdio0-bus4 {
 530                         rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
 531                                         <4 21 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
 532                                         <4 22 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
 533                                         <4 23 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
 534                 };
 535
 536                 sdio0_cmd: sdio0-cmd {
 537                         rockchip,pins = <4 24 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
 538                 };
 539
 540                 sdio0_clk: sdio0-clk {
 541                         rockchip,pins = <4 25 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
 542                 };
 543         };
 544
 545         tpm {
 546                 tpm_int_h: tpm-int-h {
 547                         rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>;
 548                 };
 549         };
 550
 551         write-protect {
 552                 fw_wp_ap: fw-wp-ap {
 553                         rockchip,pins = <7 6 RK_FUNC_GPIO &pcfg_pull_none>;
 554                 };
 555         };
 556 };