2 * This file is dual-licensed: you can use it either under the terms
3 * of the GPL or the X11 license, at your option. Note that this dual
4 * licensing only applies to this file, and not this project as a
7 * a) This file is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
10 * License, or (at your option) any later version.
12 * This file is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
19 * b) Permission is hereby granted, free of charge, to any person
20 * obtaining a copy of this software and associated documentation
21 * files (the "Software"), to deal in the Software without
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24 * sell copies of the Software, and to permit persons to whom the
25 * Software is furnished to do so, subject to the following
28 * The above copyright notice and this permission notice shall be
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31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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38 * OTHER DEALINGS IN THE SOFTWARE.
43 #include <dt-bindings/clock/rockchip,rk808.h>
44 #include "rk3288.dtsi"
47 model = "Rockchip RK3288 Fennec Board";
48 compatible = "rockchip,rk3288-fennec", "rockchip,rk3288";
51 reg = <0x0 0x80000000>;
52 device_type = "memory";
55 ext_gmac: external-gmac-clock {
56 compatible = "fixed-clock";
58 clock-frequency = <125000000>;
59 clock-output-names = "ext_gmac";
62 sdio_pwrseq: sdio-pwrseq {
63 compatible = "mmc-pwrseq-simple";
64 clocks = <&rk808 RK808_CLKOUT1>;
65 clock-names = "ext_clock";
66 pinctrl-names = "default";
67 pinctrl-0 = <&wifi_enable_h>;
70 * On the module itself this is one of these (depending
71 * on the actual card populated):
72 * - SDIO_RESET_L_WL_REG_ON
73 * - PDN (power down when low)
75 reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
79 compatible = "simple-audio-card";
80 simple-audio-card,format = "i2s";
81 simple-audio-card,name = "rockchip,fennec-codec";
82 simple-audio-card,mclk-fs = <512>;
84 simple-audio-card,dai-link@0 {
95 simple-audio-card,dai-link@1 {
102 sound-dai = <&es8323>;
107 vcc_sys: vsys-regulator {
108 compatible = "regulator-fixed";
109 regulator-name = "vcc_sys";
110 regulator-min-microvolt = <5000000>;
111 regulator-max-microvolt = <5000000>;
116 vcc_host: usb-host-regulator {
117 compatible = "regulator-fixed";
119 gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
120 pinctrl-names = "default";
121 pinctrl-0 = <&host_drv>;
122 regulator-name = "vcc_host_5v";
123 regulator-min-microvolt = <5000000>;
124 regulator-max-microvolt = <5000000>;
128 vcc_otg: usb-otg-regulator {
129 compatible = "regulator-fixed";
131 gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
132 pinctrl-names = "default";
133 pinctrl-0 = <&otg_drv>;
134 regulator-name = "vcc_otg_5v";
135 regulator-min-microvolt = <5000000>;
136 regulator-max-microvolt = <5000000>;
141 compatible = "bluetooth-platdata";
142 uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
143 pinctrl-names = "default", "rts_gpio";
144 pinctrl-0 = <&uart0_rts>;
145 pinctrl-1 = <&uart0_gpios>;
146 BT,reset_gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
147 BT,wake_gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
148 BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
153 compatible = "wlan-platdata";
154 rockchip,grf = <&grf>;
155 wifi_chip_type = "ap6212";
157 WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
163 cpu0-supply = <&vdd_cpu>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
181 card-detect-delay = <200>;
184 pinctrl-names = "default";
185 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
188 vmmc-supply = <&vcc_sd>;
189 vqmmc-supply = <&vccio_sd>;
193 assigned-clocks = <&cru SCLK_MAC>;
194 assigned-clock-parents = <&ext_gmac>;
195 clock_in_out = "input";
196 pinctrl-names = "default";
197 pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
198 phy-supply = <&vcc_lan>;
200 snps,reset-active-low;
201 snps,reset-delays-us = <0 10000 1000000>;
202 snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
209 mali-supply = <&vdd_gpu>;
214 #address-cells = <1>;
216 #sound-dai-cells = <0>;
226 clock-frequency = <400000>;
229 compatible = "rockchip,rk808";
231 interrupt-parent = <&gpio0>;
232 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
234 clock-output-names = "xin32k", "rk808-clkout2";
235 pinctrl-names = "default";
236 pinctrl-0 = <&pmic_int &global_pwroff>;
237 rockchip,system-power-controller;
240 vcc1-supply = <&vcc_sys>;
241 vcc2-supply = <&vcc_sys>;
242 vcc3-supply = <&vcc_sys>;
243 vcc4-supply = <&vcc_sys>;
244 vcc6-supply = <&vcc_sys>;
245 vcc7-supply = <&vcc_sys>;
246 vcc8-supply = <&vcc_io>;
247 vcc9-supply = <&vcc_io>;
248 vcc10-supply = <&vcc_io>;
249 vcc11-supply = <&vcc_io>;
250 vcc12-supply = <&vcc_io>;
251 vddio-supply = <&vcc_io>;
257 regulator-min-microvolt = <750000>;
258 regulator-max-microvolt = <1350000>;
259 regulator-name = "vdd_arm";
260 regulator-state-mem {
261 regulator-off-in-suspend;
268 regulator-min-microvolt = <850000>;
269 regulator-max-microvolt = <1250000>;
270 regulator-name = "vdd_gpu";
271 regulator-ramp-delay = <6000>;
272 regulator-state-mem {
273 regulator-on-in-suspend;
274 regulator-suspend-microvolt = <1000000>;
281 regulator-name = "vcc_ddr";
282 regulator-state-mem {
283 regulator-on-in-suspend;
290 regulator-min-microvolt = <3300000>;
291 regulator-max-microvolt = <3300000>;
292 regulator-name = "vcc_io";
293 regulator-state-mem {
294 regulator-on-in-suspend;
295 regulator-suspend-microvolt = <3300000>;
299 vccio_pmu: LDO_REG1 {
302 regulator-min-microvolt = <3300000>;
303 regulator-max-microvolt = <3300000>;
304 regulator-name = "vccio_pmu";
305 regulator-state-mem {
306 regulator-on-in-suspend;
307 regulator-suspend-microvolt = <3300000>;
314 regulator-min-microvolt = <3300000>;
315 regulator-max-microvolt = <3300000>;
316 regulator-name = "vcca_33";
317 regulator-state-mem {
318 regulator-off-in-suspend;
325 regulator-min-microvolt = <1000000>;
326 regulator-max-microvolt = <1000000>;
327 regulator-name = "vdd_10";
328 regulator-state-mem {
329 regulator-on-in-suspend;
330 regulator-suspend-microvolt = <1000000>;
337 regulator-min-microvolt = <1800000>;
338 regulator-max-microvolt = <1800000>;
339 regulator-name = "vcc_wl";
340 regulator-state-mem {
341 regulator-on-in-suspend;
342 regulator-suspend-microvolt = <1800000>;
349 regulator-min-microvolt = <1800000>;
350 regulator-max-microvolt = <3300000>;
351 regulator-name = "vccio_sd";
352 regulator-state-mem {
353 regulator-on-in-suspend;
354 regulator-suspend-microvolt = <3300000>;
358 vdd10_lcd: LDO_REG6 {
361 regulator-min-microvolt = <1000000>;
362 regulator-max-microvolt = <1000000>;
363 regulator-name = "vdd10_lcd";
364 regulator-state-mem {
365 regulator-on-in-suspend;
366 regulator-suspend-microvolt = <1000000>;
373 regulator-min-microvolt = <1800000>;
374 regulator-max-microvolt = <1800000>;
375 regulator-name = "vcc_18";
376 regulator-state-mem {
377 regulator-on-in-suspend;
378 regulator-suspend-microvolt = <1800000>;
382 vcc18_lcd: LDO_REG8 {
385 regulator-min-microvolt = <1800000>;
386 regulator-max-microvolt = <1800000>;
387 regulator-name = "vcc18_lcd";
388 regulator-state-mem {
389 regulator-on-in-suspend;
390 regulator-suspend-microvolt = <1800000>;
394 vcc_sd: SWITCH_REG1 {
397 regulator-name = "vcc_sd";
398 regulator-state-mem {
399 regulator-on-in-suspend;
403 vcc_lan: SWITCH_REG2 {
406 regulator-name = "vcc_lan";
407 regulator-state-mem {
408 regulator-on-in-suspend;
419 compatible = "everest,es8323";
421 hp-det-gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
422 clock-names = "mclk";
423 clocks = <&cru SCLK_I2S0_OUT>;
424 #sound-dai-cells = <0>;
429 #sound-dai-cells = <0>;
436 wifi-supply = <&vcc_wl>;
445 clock-frequency = <50000000>;
446 clock-freq-min-max = <200000 50000000>;
451 keep-power-in-suspend;
452 mmc-pwrseq = <&sdio_pwrseq>;
455 pinctrl-names = "default";
456 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
462 rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
463 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
468 pinctrl-names = "default";
469 pinctrl-0 = <&uart0_xfer &uart0_cts>;
518 pcfg_output_high: pcfg-output-high {
522 pcfg_output_low: pcfg-output-low {
526 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
527 drive-strength = <8>;
530 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
532 drive-strength = <8>;
537 rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
541 rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
545 rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
551 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
556 wifi_enable_h: wifi-enable-h {
557 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
562 sdmmc_bus4: sdmmc-bus4 {
563 rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
564 <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
565 <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
566 <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
569 sdmmc_clk: sdmmc-clk {
570 rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
573 sdmmc_cmd: sdmmc-cmd {
574 rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
577 sdmmc_pwr: sdmmc-pwr {
578 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
584 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
590 rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
595 uart0_gpios: uart0-gpios {
596 rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;