arm: dts: rk3288-evb: modify panel to edp_panel
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk3288-box.dts
1 /dts-v1/;
2
3 #include "rk3288.dtsi"
4 #include "lcd-box.dtsi"
5 #include <dt-bindings/input/input.h>
6
7 / {
8         fiq-debugger {
9                 status = "okay";
10         };
11
12         hsic-usb-hub{
13                 compatible = "hub_reset";
14                 reset,pin =<&gpio7 GPIO_A6 GPIO_ACTIVE_HIGH>;   // hub reset pin
15                 status = "disabled";
16         };
17
18     wireless-wlan {
19         compatible = "wlan-platdata";
20
21         /* wifi_chip_type - wifi chip define
22         * bcmwifi ==> like ap6xxx, rk90x;
23         * rtkwifi ==> like rtl8188xx, rtl8723xx,rtl8812auv;
24         * esp8089 ==> esp8089;
25         * other   ==> for other wifi;
26         */
27         wifi_chip_type = "bcmwifi";
28         sdio_vref = <1800>; //1800mv or 3300mv
29
30         //keep_wifi_power_on;
31         //power_ctrl_by_pmu;
32         power_pmu_regulator = "act_ldo3";
33         power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
34
35         //vref_ctrl_enable;
36         //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
37         vref_pmu_regulator = "act_ldo3";
38         vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
39
40         WIFI,poweren_gpio = <&gpio4 GPIO_D4 GPIO_ACTIVE_HIGH>;
41         WIFI,host_wake_irq = <&gpio4 GPIO_D6 GPIO_ACTIVE_HIGH>;
42         //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
43
44         status = "okay";
45     };
46
47     wireless-bluetooth {
48         compatible = "bluetooth-platdata";
49
50         //wifi-bt-power-toggle;
51
52         uart_rts_gpios = <&gpio4 GPIO_C3 GPIO_ACTIVE_LOW>;
53         pinctrl-names = "default","rts_gpio";
54         pinctrl-0 = <&uart0_rts>;
55         pinctrl-1 = <&uart0_rts_gpio>;
56
57         BT,power_gpio = <&gpio4 GPIO_D3 GPIO_ACTIVE_HIGH>;
58         BT,reset_gpio = <&gpio4 GPIO_D5 GPIO_ACTIVE_HIGH>;
59         BT,wake_gpio = <&gpio4 GPIO_D2 GPIO_ACTIVE_HIGH>;
60         BT,wake_host_irq = <&gpio4 GPIO_D7 GPIO_ACTIVE_HIGH>;
61
62         status = "okay";
63     };
64
65         pwm_regulator {
66                 compatible = "rockchip_pwm_regulator";
67                 pwms = <&pwm1 0 2000>;
68                 rockchip,pwm_id= <1>;
69                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
70                 rockchip,pwm_voltage= <1100000>;
71                 rockchip,pwm_min_voltage= <925000>;
72                 rockchip,pwm_max_voltage= <1400000>;
73                 rockchip,pwm_suspend_voltage= <950000>;
74                 rockchip,pwm_coefficient= <475>;
75                 regulators {
76                         #address-cells = <1>;
77                         #size-cells = <0>;
78                         pwm_reg0: regulator@0 {
79                                 regulator-compatible = "pwm_dcdc1";
80                                 regulator-name= "vdd_logic";
81                                 regulator-min-microvolt = <925000>;
82                                 regulator-max-microvolt = <1400000>;
83                                 regulator-always-on;
84                                 regulator-boot-on;
85                         };
86                 };
87         };
88
89         codec_hdmi_i2s: codec-hdmi-i2s {
90                 compatible = "hdmi-i2s";
91         };
92
93         codec_hdmi_spdif: codec-hdmi-spdif {
94                 compatible = "hdmi-spdif";
95         };
96
97         rockchip-hdmi-i2s {
98                 status = "disabled";
99                 compatible = "rockchip-hdmi-i2s";
100                 dais {
101                         dai0 {
102                                 audio-codec = <&codec_hdmi_i2s>;
103                                 audio-controller = <&i2s>;
104                                 format = "i2s";
105                                 //continuous-clock;
106                                 //bitclock-inversion;
107                                 //frame-inversion;
108                                 //bitclock-master;
109                                 //frame-master;
110                         };
111                 };
112         };
113
114         rockchip-spdif-card {
115                 compatible = "rockchip-spdif-card";
116                 dais {
117                         dai0 {
118                                 audio-codec = <&codec_hdmi_spdif>;
119                                 audio-controller = <&spdif>;
120                         };
121                 };
122         };
123
124         rockchip-rk1000 {
125                 compatible = "rockchip-rk1000";
126                 dais {
127                         dai0 {
128                                 audio-codec = <&rk1000_codec>;
129                                 audio-controller = <&i2s>;
130                                 format = "i2s";
131                         };
132                 };
133         };
134
135         usb_control {
136                 compatible = "rockchip,rk3288-usb-control";
137
138                 host_drv_gpio = <&gpio0 GPIO_B6 GPIO_ACTIVE_LOW>;
139                 otg_drv_gpio = <&gpio0 GPIO_B4 GPIO_ACTIVE_LOW>;
140
141                 rockchip,remote_wakeup;
142                 rockchip,usb_irq_wakeup;
143         };
144
145         test-power{
146                 status = "okay";
147         };
148
149 };
150
151 &gmac {
152 //      pmu_regulator = "act_ldo5";
153 //      pmu_enable_level = <1>; //1->HIGH, 0->LOW
154 //      power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
155         reset-gpio = <&gpio4 GPIO_B0 GPIO_ACTIVE_LOW>;
156         phy-mode = "rgmii";
157         clock_in_out = "input";
158         tx_delay = <0x30>;
159         rx_delay = <0x10>;
160 };
161
162 &pinctrl {
163         //used for init some gpio
164
165         init-gpios = <&gpio8 GPIO_A1 GPIO_ACTIVE_HIGH
166                 &gpio7 GPIO_B1 GPIO_ACTIVE_HIGH
167                 &gpio4 GPIO_B0 GPIO_ACTIVE_HIGH>;
168         gpio0_gpio {
169                         gpio0_c2: gpio0-c2 {
170                                 rockchip,pins = <GPIO0_C2>;
171                                 rockchip,pull = <VALUE_PULL_DOWN>;
172                         };
173
174                         //to add
175                 };
176
177         gpio7_gpio {
178                         gpio7_b7: gpio7-b7 {
179                                 rockchip,pins = <GPIO7_B7>;
180                                 rockchip,pull = <VALUE_PULL_UP>;
181                         };
182
183                         //to add
184                 };
185         //could add other pinctrl definition such as gpio
186
187         // gmac drive strength
188         gpio4_gmac {
189                 mac_clk: mac-clk {
190                         rockchip,drive = <VALUE_DRV_12MA>;
191                 };
192
193                 mac_txpins: mac-txpins {
194                         rockchip,drive = <VALUE_DRV_12MA>;
195                 };
196
197                 mac_rxpins: mac-rxpins {
198                         rockchip,drive = <VALUE_DRV_12MA>;
199                 };
200
201                 mac_crs: mac-crs {
202                         rockchip,drive = <VALUE_DRV_12MA>;
203                 };
204
205                 mac_mdpins: mac-mdpins {
206                         rockchip,drive = <VALUE_DRV_12MA>;
207                 };
208         };
209 };
210 &nandc0 {
211         status = "okay"; // used nand set "okay" ,used emmc set "disabled"
212 };
213 &nandc1 {
214         status = "disabled"; // used nand set "okay" ,used emmc set "disabled"
215 };
216
217 &nandc0reg {
218         status = "disabled"; // used nand set "okay" ,used emmc set "disabled"
219 };
220 &emmc {
221         clock-frequency = <100000000>;
222         clock-freq-min-max = <400000 100000000>;
223
224         supports-highspeed;
225         supports-emmc;
226         bootpart-no-access;
227         supports-tSD;//only tsd-sdcard mode
228         supports-DDR_MODE;
229         caps2-mmc-hs200;
230
231         ignore-pm-notify;
232                 keep-power-in-suspend;
233                 //poll-hw-reset
234                 status = "okay";
235 };
236
237 &sdmmc {
238                 clock-frequency = <50000000>;
239                 lock-freq-min-max = <400000 50000000>;
240                 supports-highspeed;
241                 supports-sd;
242                 broken-cd;
243                 card-detect-delay = <200>;
244
245                 ignore-pm-notify;
246                 keep-power-in-suspend;
247
248                 vmmc-supply = <&ldo1_reg>;
249                 status = "okay";
250 };
251
252 &sdio {
253                 clock-frequency = <50000000>;
254                 clock-freq-min-max = <200000 50000000>;
255                 supports-highspeed;
256                 supports-sdio;
257                 ignore-pm-notify;
258                 keep-power-in-suspend;
259                 //cap-sdio-irq;
260                 status = "okay";
261 };
262
263 &spi0 {
264         status = "disabled";
265         max-freq = <48000000>;
266         /*
267         spi_test@00 {
268                 compatible = "rockchip,spi_test_bus0_cs0";
269                 reg = <0>;
270                 spi-max-frequency = <24000000>;
271                 //spi-cpha;
272                 //spi-cpol;
273                 poll_mode = <0>;
274                 type = <0>;
275                 enable_dma = <0>;
276
277         };
278
279         spi_test@01 {
280                 compatible = "rockchip,spi_test_bus0_cs1";
281                 reg = <1>;
282                 spi-max-frequency = <24000000>;
283                 spi-cpha;
284                 spi-cpol;
285                 poll_mode = <0>;
286                 type = <0>;
287                 enable_dma = <0>;
288         };
289         */
290 };
291
292 &spi1 {
293         status = "disabled";
294         max-freq = <48000000>;
295         /*
296         spi_test@10 {
297                 compatible = "rockchip,spi_test_bus1_cs0";
298                 reg = <0>;
299                 spi-max-frequency = <24000000>;
300                 //spi-cpha;
301                 //spi-cpol;
302                 poll_mode = <0>;
303                 type = <0>;
304                 enable_dma = <0>;
305         };
306
307         */
308         //dtv: connect to dtv demodulator for control signal
309         tstv-ctrl@00 {
310                 compatible = "rockchip,dtv_spi_ctrl";
311                 gpio-powerup = <&gpio0 GPIO_D7 GPIO_ACTIVE_HIGH>;
312                 gpio-powerdown = <&gpio2 GPIO_B6 GPIO_ACTIVE_HIGH>;
313                 gpio-reset = <&gpio2 GPIO_B7 GPIO_ACTIVE_HIGH>;
314                 gpio-nreset = <&gpio2 GPIO_B4 GPIO_ACTIVE_HIGH>;
315                 spi-max-frequency = <12000000>;
316                 reg = <0>;
317                 poll_mode = <0>;
318                 type = <0>;
319                 enable_dma = <0>;
320         };
321
322 };
323
324 &spi2 {
325         status = "disabled";
326         max-freq = <48000000>;
327         /*
328         spi_test@20 {
329                 compatible = "rockchip,spi_test_bus2_cs0";
330                 reg = <0>;
331                 spi-max-frequency = <24000000>;
332                 //spi-cpha;
333                 //spi-cpol;
334                 poll_mode = <0>;
335                 type = <0>;
336                 enable_dma = <0>;
337         };
338
339         spi_test@21 {
340                 compatible = "rockchip,spi_test_bus2_cs1";
341                 reg = <1>;
342                 spi-max-frequency = <24000000>;
343                 //spi-cpha;
344                 //spi-cpol;
345                 poll_mode = <0>;
346                 type = <0>;
347                 enable_dma = <0>;
348         };
349         */
350 };
351
352 &uart_bt {
353         status = "okay";
354         dma-names = "!tx", "!rx";
355         pinctrl-0 = <&uart0_xfer &uart0_cts>;
356 };
357
358 &i2c0 {
359         status = "okay";
360         rk808: rk808@1b {
361                 reg = <0x1b>;
362                 status = "okay";
363         };
364                 syr827: syr827@40 {
365                 compatible = "silergy,syr82x";
366         reg = <0x40>;
367                 status = "okay";
368                 regulators {
369                         #address-cells = <1>;
370                         #size-cells = <0>;
371                         syr827_dc1: regulator@0 {
372                         reg = <0>;
373                         regulator-compatible = "syr82x_dcdc1";
374                         regulator-name = "vdd_arm";
375                         regulator-min-microvolt = <712500>;
376                         regulator-max-microvolt = <1500000>;
377                         regulator-always-on;
378                         regulator-boot-on;
379                         regulator-initial-mode = <0x2>;
380                         regulator-initial-state = <3>;
381                         regulator-state-mem {
382                                 regulator-state-mode = <0x2>;
383                                 regulator-state-enabled;
384                                 regulator-state-uv = <900000>;
385                         };
386                 };
387            };
388         };
389         syr828: syr828@41 {
390                 compatible = "silergy,syr82x";
391                 reg = <0x41>;
392                 status = "okay";
393                 regulators {
394                         #address-cells = <1>;
395                         #size-cells = <0>;
396                         syr828_dc1: regulator@0 {
397                         reg = <0>;
398                         regulator-compatible = "syr82x_dcdc1";
399                         regulator-name = "vdd_gpu";
400                         regulator-min-microvolt = <712500>;
401                         regulator-max-microvolt = <1500000>;
402                         regulator-always-on;
403                 regulator-boot-on;
404                         regulator-initial-mode = <0x2>;
405                         regulator-initial-state = <3>;
406                         regulator-state-mem {
407                                 regulator-state-mode = <0x2>;
408                                 regulator-state-disabled;
409                                 regulator-state-uv = <900000>;
410                         };
411                 };
412            };
413         };
414         act8846: act8846@5a {
415                 reg = <0x5a>;
416                 status = "okay";
417         };
418
419         rtc@51 {
420                 compatible = "rtc,hym8563";
421                 reg = <0x51>;
422                 irq_gpio = <&gpio0 GPIO_A4 IRQ_TYPE_EDGE_FALLING>;
423         };
424 };
425
426 &i2c1 {
427         status = "okay";
428         rtc@51 {
429                 compatible = "nxp,pcf8563";
430                 reg = <0x51>;
431         };
432 };
433
434 &i2c2 {
435         status = "okay";
436 };
437
438 &i2c3 {
439         status = "okay";
440 };
441
442 &i2c4 {
443         status = "okay";
444         rk1000_control@40 {
445                 compatible = "rockchip,rk1000_control";
446                 reg = <0x40>;
447                 gpio-reset = <&gpio7 GPIO_C5 GPIO_ACTIVE_LOW>;
448                 #clocks = <&clk_i2s>, <&clk_i2s_out>;
449                 #clock-names = "i2s_clk","i2s_mclk";
450                 #pinctrl-names = "default";
451                 #pinctrl-0 = <&i2s_mclk>;
452                 status = "okay";
453         };
454         rk1000_tve@42 {
455                 compatible = "rockchip,rk1000_tve";
456                 reg = <0x42>;
457                 rockchip,source = <0>; //0: LCDC0; 1: LCDC1
458                 rockchip,prop = <PRMRY>;//<EXTEND>
459                 status = "okay";
460         };
461         rk1000_codec: rk1000_codec@60 {
462                 compatible = "rockchip,rk1000_codec";
463                 reg = <0x60>;
464                 spk_ctl_io = <&gpio7 GPIO_A5 GPIO_ACTIVE_LOW>;
465                 boot_depop = <1>;
466                 pa_enable_time = <5000>;
467                 status = "okay";
468         };
469 };
470
471 &i2c5 {
472         status = "disabled";
473 };
474
475 &fb {
476         rockchip,disp-mode = <NO_DUAL>;
477         rockchip,uboot-logo-on = <1>;
478         rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
479 };
480
481 &disp_timings {
482         native-mode = <&timing1>;
483 };
484
485 &rk_screen {
486          display-timings = <&disp_timings>;
487 };
488
489 /*lcdc0 as PRMRY(HDMI)*/
490 &lcdc0 {
491         status = "okay";
492         rockchip,iommu-enabled = <1>;
493         rockchip,prop = <PRMRY>;
494 };
495
496 &lcdc1 {
497         status = "disabled";
498         rockchip,iommu-enabled = <1>;
499         rockchip,prop = <EXTEND>;
500 };
501
502 &hdmi {
503         status = "okay";
504         rockchip,cec_enable = <0>;
505         rockchip,hdcp_enable = <0>;
506 };
507
508 &ion_cma {
509                reg = <0x00000000 0x1000000>; /* 16MB */
510 };
511
512 &vpu {
513         iommu_enabled = <1>;
514 };
515
516 &hevc {
517         iommu_enabled = <1>;
518 };
519
520 &iep {
521         iommu_enabled = <1>;
522 };
523
524 &adc {
525         status = "disabled";
526
527         key {
528                 compatible = "rockchip,key";
529                 /*
530                 io-channels = <&adc 1>;
531
532                 vol-up-key {
533                         linux,code = <115>;
534                         label = "volume up";
535                         rockchip,adc_value = <1>;
536                 };
537
538                 vol-down-key {
539                         linux,code = <114>;
540                         label = "volume down";
541                         rockchip,adc_value = <170>;
542                 };
543                 */
544                 power-key {
545                         gpios = <&gpio0 GPIO_A5 GPIO_ACTIVE_LOW>;
546                         linux,code = <116>;
547                         label = "power";
548                         gpio-key,wakeup;
549                 };
550                 /*
551                 menu-key {
552                         linux,code = <59>;
553                         label = "menu";
554                         rockchip,adc_value = <355>;
555                 };
556
557                 home-key {
558                         linux,code = <102>;
559                         label = "home";
560                         rockchip,adc_value = <746>;
561                 };
562
563                 back-key {
564                         linux,code = <158>;
565                         label = "back";
566                         rockchip,adc_value = <560>;
567                 };
568
569                 camera-key {
570                         linux,code = <212>;
571                         label = "camera";
572                         rockchip,adc_value = <450>;
573                 };*/
574         };
575 };
576
577 &pwm1 {
578         status = "disabled";
579 };
580
581
582 &clk_core_dvfs_table {
583         support-pvtm = <1>;
584         pvtm-operating-points = <
585                 /* KHz    uV    pvtm margin*/
586 //              126000   900000 25000
587 //              216000   900000 25000
588 //              312000   900000 25000
589                 408000   900000 25000
590                 600000   950000 50000
591                 696000   950000 50000
592                 816000  1000000 50000
593                 1008000 1050000 75000
594                 1200000 1100000 75000
595                 1416000 1200000 75000
596                 1512000 1300000 75000
597                 1608000 1350000 75000
598 //              1704000 1350000 75000
599 //              1800000 1350000 75000
600                 >;
601         status="okay";
602 };
603
604 &clk_gpu_dvfs_table {
605         operating-points = <
606                 /* KHz    uV */
607 //              100000 900000
608                 200000 900000
609                 300000 950000
610                 420000 1100000
611                 500000 1150000
612 //              600000 1250000
613                 >;
614         status="okay";
615 };
616
617 &clk_ddr_dvfs_table {
618         operating-points = <
619                 /* KHz    uV */
620                 200000 1075000
621                 300000 1075000
622                 456000 1125000
623                 533000 1150000
624                 >;
625
626         freq-table = <
627                 /*status                freq(KHz)*/
628                 SYS_STATUS_NORMAL       456000
629                 SYS_STATUS_SUSPEND      200000
630                 //SYS_STATUS_VIDEO_1080P  240000
631                 SYS_STATUS_VIDEO_4K     533000
632                 SYS_STATUS_PERFORMANCE  533000
633                 //SYS_STATUS_BOOST      324000
634                 //SYS_STATUS_ISP        400000
635                 >;
636         auto-freq-table = <
637                 240000
638                 324000
639                 456000
640                 528000
641                 >;
642         auto-freq=<0>;
643         status="okay";
644 };
645 /include/ "act8846.dtsi"
646 &act8846 {
647         gpios =<&gpio7 GPIO_A1 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_B2 GPIO_ACTIVE_HIGH>;
648         act8846,system-power-controller;
649
650         regulators {
651
652                 dcdc1_reg: regulator@0{
653                         regulator-name= "act_dcdc1";
654                         regulator-min-microvolt = <1200000>;
655                         regulator-max-microvolt = <1200000>;
656                         regulator-always-on;
657                         regulator-boot-on;
658                 };
659
660                 dcdc2_reg: regulator@1 {
661                         regulator-name= "vccio";
662                         regulator-min-microvolt = <3300000>;
663                         regulator-max-microvolt = <3300000>;
664                         regulator-initial-state = <3>;
665                         regulator-state-mem {
666                                 regulator-state-enabled;
667                                 regulator-state-uv = <3300000>;
668                         };
669                 };
670
671                 dcdc3_reg: regulator@2 {
672                         regulator-name= "vdd_logic";
673                         regulator-min-microvolt = <700000>;
674                         regulator-max-microvolt = <1500000>;
675                         regulator-initial-state = <3>;
676                         regulator-state-mem {
677                                 regulator-state-enabled;
678                                 regulator-state-uv = <1200000>;
679                         };
680
681                 };
682
683                 dcdc4_reg: regulator@3 {
684                         regulator-name= "act_dcdc4";
685                         regulator-min-microvolt = <2000000>;
686                         regulator-max-microvolt = <2000000>;
687                                 regulator-initial-state = <3>;
688                         regulator-state-mem {
689                                 regulator-state-enabled;
690                                 regulator-state-uv = <2000000>;
691                         };
692                 };
693
694                 ldo1_reg: regulator@4 {
695                         regulator-name= "vccio_sd";
696                         regulator-min-microvolt = <1800000>;
697                         regulator-max-microvolt = <3300000>;
698
699                 };
700
701                 ldo2_reg: regulator@5 {
702                         regulator-name= "act_ldo2";
703                         regulator-min-microvolt = <1050000>;
704                         regulator-max-microvolt = <1050000>;
705
706                 };
707
708                 ldo3_reg: regulator@6 {
709                         regulator-name= "act_ldo3";
710                         regulator-min-microvolt = <1800000>;
711                         regulator-max-microvolt = <1800000>;
712
713                 };
714
715                 ldo4_reg:regulator@7 {
716                         regulator-name= "act_ldo4";
717                         regulator-min-microvolt = <3300000>;
718                         regulator-max-microvolt = <3300000>;
719
720                 };
721
722                 ldo5_reg: regulator@8 {
723                         regulator-name= "act_ldo5";
724                         regulator-min-microvolt = <3300000>;
725                         regulator-max-microvolt = <3300000>;
726
727                 };
728
729                 ldo6_reg: regulator@9 {
730                         regulator-name= "act_ldo6";
731                         regulator-min-microvolt = <1100000>;
732                         regulator-max-microvolt = <1100000>;
733                         regulator-initial-state = <3>;
734                         regulator-state-mem {
735                                 regulator-state-enabled;
736                         };
737
738                 };
739
740                 ldo7_reg: regulator@10 {
741                         regulator-name= "vcc_18";
742                         regulator-min-microvolt = <1800000>;
743                         regulator-max-microvolt = <1800000>;
744                         regulator-initial-state = <3>;
745                         regulator-state-mem {
746                                 regulator-state-enabled;
747                         };
748
749                 };
750
751                 ldo8_reg: regulator@11 {
752                         regulator-name= "act_ldo8";
753                         regulator-min-microvolt = <1850000>;
754                         regulator-max-microvolt = <1850000>;
755
756                 };
757         };
758 };
759
760 /include/ "rk808.dtsi"
761 &rk808 {
762         gpios =<&gpio0 GPIO_A4 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_B3 GPIO_ACTIVE_LOW>;
763         rk808,system-power-controller;
764
765         regulators {
766
767                 rk808_dcdc1_reg: regulator@0{
768                         regulator-name= "vdd_arm";
769                         regulator-min-microvolt = <700000>;
770                         regulator-max-microvolt = <1500000>;
771                         regulator-always-on;
772                         regulator-boot-on;
773                         regulator-initial-mode = <0x2>;
774                         regulator-initial-state = <3>;
775                         regulator-state-mem {
776                                 regulator-state-mode = <0x2>;
777                                 regulator-state-disabled;
778                                 regulator-state-uv = <900000>;
779                         };
780                 };
781
782                 rk808_dcdc2_reg: regulator@1 {
783                         regulator-name= "vdd_gpu";
784                         regulator-min-microvolt = <700000>;
785                         regulator-max-microvolt = <1500000>;
786                         regulator-always-on;
787                         regulator-boot-on;
788                         regulator-initial-mode = <0x2>;
789                         regulator-initial-state = <3>;
790                         regulator-state-mem {
791                                 regulator-state-mode = <0x2>;
792                                 regulator-state-disabled;
793                                 regulator-state-uv = <900000>;
794                         };
795                 };
796
797                 rk808_dcdc3_reg: regulator@2 {
798                         regulator-name= "rk_dcdc3";
799                         regulator-min-microvolt = <1200000>;
800                         regulator-max-microvolt = <1200000>;
801                         regulator-always-on;
802                         regulator-boot-on;
803                         regulator-initial-mode = <0x2>;
804                         regulator-initial-state = <3>;
805                         regulator-state-mem {
806                                 regulator-state-mode = <0x2>;
807                                 regulator-state-enabled;
808                                 regulator-state-uv = <1200000>;
809                         };
810                 };
811
812                 rk808_dcdc4_reg: regulator@3 {
813                         regulator-name= "vccio";
814                         regulator-min-microvolt = <1800000>;
815                         regulator-max-microvolt = <3300000>;
816                         regulator-always-on;
817                         regulator-boot-on;
818                         regulator-initial-mode = <0x2>;
819                         regulator-initial-state = <3>;
820                         regulator-state-mem {
821                                 regulator-state-mode = <0x2>;
822                                 regulator-state-enabled;
823                                 regulator-state-uv = <2800000>;
824                         };
825                 };
826
827     /* NO USED, 3.3V*/
828                 rk808_ldo1_reg: regulator@4 {
829                         regulator-name= "rk_ldo1";
830                         regulator-min-microvolt = <3300000>;
831                         regulator-max-microvolt = <3300000>;
832                         regulator-always-on;
833                         regulator-boot-on;
834                         regulator-initial-state = <3>;
835                         regulator-state-mem {
836                                 regulator-state-enabled;
837                                 regulator-state-uv = <3300000>;
838                         };
839                 };
840
841     /* BOX:RK1000s, 3.3V  */
842                 rk808_ldo2_reg: regulator@5 {
843                         regulator-name= "rk_ldo2";
844                         regulator-min-microvolt = <3300000>;
845                         regulator-max-microvolt = <3300000>;
846                         regulator-always-on;
847                         regulator-boot-on;
848                         regulator-initial-state = <3>;
849                         regulator-state-mem {
850                                 regulator-state-enabled;
851                                 regulator-state-uv = <3300000>;
852                         };
853                 };
854
855     /* RK3288 PLL,USB PHY, 1.0V */
856                 rk808_ldo3_reg: regulator@6 {
857                         regulator-name= "rk_ldo3";
858                         regulator-min-microvolt = <1000000>;
859                         regulator-max-microvolt = <1000000>;
860                         regulator-always-on;
861                         regulator-boot-on;
862                         regulator-initial-state = <3>;
863                         regulator-state-mem {
864                                 regulator-state-enabled;
865                                 regulator-state-uv = <1000000>;
866                         };
867                 };
868
869     /* BOX:RK1000S CORE, 1.8V  */
870                 rk808_ldo4_reg:regulator@7 {
871                         regulator-name= "rk_ldo4";
872                         regulator-min-microvolt = <1800000>;
873                         regulator-max-microvolt = <1800000>;
874                         regulator-always-on;
875                         regulator-boot-on;
876                         regulator-initial-state = <3>;
877                         regulator-state-mem {
878                                 regulator-state-disabled;
879                                 regulator-state-uv = <1800000>;
880                         };
881                 };
882
883     /* SDMMC IO, 3.3V*/
884                 rk808_ldo5_reg: regulator@8 {
885                         regulator-name= "rk_ldo5";
886                         regulator-min-microvolt = <3300000>;
887                         regulator-max-microvolt = <3300000>;
888                         regulator-always-on;
889                         regulator-boot-on;
890                         regulator-initial-state = <3>;
891                         regulator-state-mem {
892                                 regulator-state-enabled;
893                                 regulator-state-uv = <3300000>;
894                         };
895                 };
896
897     /* CAMERA, 1.8V  box modify*/
898                 rk808_ldo6_reg: regulator@9 {
899                         regulator-name= "rk_ldo6";
900                         regulator-min-microvolt = <1800000>;
901                         regulator-max-microvolt = <1800000>;
902                         regulator-always-on;
903                         regulator-boot-on;
904                         regulator-initial-state = <3>;
905                         regulator-state-mem {
906                                 regulator-state-disabled;
907                                 regulator-state-uv = <1000000>;
908                         };
909                 };
910
911     /* RK3288 USB PHY, SAR-ADC, WIFI IO, 1.8V */
912                 rk808_ldo7_reg: regulator@10 {
913                         regulator-name= "rk_ldo7";
914                         regulator-min-microvolt = <1800000>;
915                         regulator-max-microvolt = <1800000>;
916                         regulator-always-on;
917                         regulator-boot-on;
918                         regulator-initial-state = <3>;
919                         regulator-state-mem {
920                                 regulator-state-enabled;
921                                 regulator-state-uv = <1800000>;
922                         };
923                 };
924
925     /* DTV, 3.3V  box modify*/
926                 rk808_ldo8_reg: regulator@11 {
927                         regulator-name= "rk_ldo8";
928                         regulator-min-microvolt = <3300000>;
929                         regulator-max-microvolt = <3300000>;
930                         regulator-always-on;
931                         regulator-boot-on;
932                         regulator-initial-state = <3>;
933                         regulator-state-mem {
934                                 regulator-state-enabled;
935                                 regulator-state-uv = <3300000>;
936                         };
937                 };
938
939                 rk808_ldo9_reg: regulator@12 {
940                         regulator-name= "rk_ldo9";
941                         regulator-always-on;
942                         regulator-boot-on;
943                         regulator-initial-state = <3>;
944                         regulator-state-mem {
945                                 regulator-state-enabled;
946                         };
947                 };
948
949                 rk808_ldo10_reg: regulator@13 {
950                         regulator-name= "rk_ldo10";
951                         regulator-always-on;
952                         regulator-boot-on;
953                         regulator-initial-state = <3>;
954                         regulator-state-mem {
955                                 regulator-state-disabled;
956                         };
957                 };
958         };
959 };
960
961 &lcdc_vdd_domain {
962         regulator-name = "vcc30_lcd";
963         };
964 &dpio_vdd_domain{
965         regulator-name = "vcc18_cif";
966         };
967 &flash0_vdd_domain{
968         regulator-name = "vcc_flash";
969         };
970 &flash1_vdd_domain{
971         regulator-name = "vcc_flash";
972         };
973 &apio3_vdd_domain{
974         regulator-name = "vccio_wl";
975         };
976 &apio5_vdd_domain{
977         regulator-name = "vccio";
978         };
979 &apio4_vdd_domain{
980         regulator-name = "vccio";
981         };
982 &apio1_vdd_domain{
983         regulator-name = "vccio";
984         };
985 &apio2_vdd_domain{
986         regulator-name = "vccio";
987         };
988 &sdmmc0_vdd_domain{
989         regulator-name = "vcc_sd";
990         };
991
992 /*
993  * Due to not have the software of PWM for remotectrl.
994  * We can _*HACK*_ do that as the following.
995  */
996 &pwm0 {
997         compatible = "rockchip,remotectl-pwm";
998         remote_pwm_id = <0>;
999         handle_cpu_id = <1>;
1000         status = "okay";
1001
1002         ir_key1{
1003                 rockchip,usercode = <0x4040>;
1004                 rockchip,key_table =
1005                         <0xf2   KEY_REPLY>,
1006                         <0xba   KEY_BACK>,
1007                         <0xf4   KEY_UP>,
1008                         <0xf1   KEY_DOWN>,
1009                         <0xef   KEY_LEFT>,
1010                         <0xee   KEY_RIGHT>,
1011                         <0xbd   KEY_HOME>,
1012                         <0xea   KEY_VOLUMEUP>,
1013                         <0xe3   KEY_VOLUMEDOWN>,
1014                         <0xe2   KEY_SEARCH>,
1015                         <0xb2   KEY_POWER>,
1016                         <0xbc   KEY_MUTE>,
1017                         <0xec   KEY_MENU>,
1018                         <0xbf   0x190>,
1019                         <0xe0   0x191>,
1020                         <0xe1   0x192>,
1021                         <0xe9   183>,
1022                         <0xe6   248>,
1023                         <0xe8   185>,
1024                         <0xe7   186>,
1025                         <0xf0   388>,
1026                         <0xbe   0x175>;
1027         };
1028         ir_key2{
1029                 rockchip,usercode = <0xff00>;
1030                 rockchip,key_table =
1031                         <0xf9   KEY_HOME>,
1032                         <0xbf   KEY_BACK>,
1033                         <0xfb   KEY_MENU>,
1034                         <0xaa   KEY_REPLY>,
1035                         <0xb9   KEY_UP>,
1036                         <0xe9   KEY_DOWN>,
1037                         <0xb8   KEY_LEFT>,
1038                         <0xea   KEY_RIGHT>,
1039                         <0xeb   KEY_VOLUMEDOWN>,
1040                         <0xef   KEY_VOLUMEUP>,
1041                         <0xf7   KEY_MUTE>,
1042                         <0xe7   KEY_POWER>,
1043                         <0xfc   KEY_POWER>,
1044                         <0xa9   KEY_VOLUMEDOWN>,
1045                         <0xa8   KEY_VOLUMEDOWN>,
1046                         <0xe0   KEY_VOLUMEDOWN>,
1047                         <0xa5   KEY_VOLUMEDOWN>,
1048                         <0xab   183>,
1049                         <0xb7   388>,
1050                         <0xf8   184>,
1051                         <0xaf   185>,
1052                         <0xed   KEY_VOLUMEDOWN>,
1053                         <0xee   186>,
1054                         <0xb3   KEY_VOLUMEDOWN>,
1055                         <0xf1   KEY_VOLUMEDOWN>,
1056                         <0xf2   KEY_VOLUMEDOWN>,
1057                         <0xf3   KEY_SEARCH>,
1058                         <0xb4   KEY_VOLUMEDOWN>,
1059                         <0xbe   KEY_SEARCH>;
1060         };
1061         ir_key3{
1062                 rockchip,usercode = <0x1dcc>;
1063                 rockchip,key_table =
1064                         <0xee   KEY_REPLY>,
1065                         <0xf0   KEY_BACK>,
1066                         <0xf8   KEY_UP>,
1067                         <0xbb   KEY_DOWN>,
1068                         <0xef   KEY_LEFT>,
1069                         <0xed   KEY_RIGHT>,
1070                         <0xfc   KEY_HOME>,
1071                         <0xf1   KEY_VOLUMEUP>,
1072                         <0xfd   KEY_VOLUMEDOWN>,
1073                         <0xb7   KEY_SEARCH>,
1074                         <0xff   KEY_POWER>,
1075                         <0xf3   KEY_MUTE>,
1076                         <0xbf   KEY_MENU>,
1077                         <0xf9   0x191>,
1078                         <0xf5   0x192>,
1079                         <0xb3   388>,
1080                         <0xbe   KEY_1>,
1081                         <0xba   KEY_2>,
1082                         <0xb2   KEY_3>,
1083                         <0xbd   KEY_4>,
1084                         <0xf9   KEY_5>,
1085                         <0xb1   KEY_6>,
1086                         <0xfc   KEY_7>,
1087                         <0xf8   KEY_8>,
1088                         <0xb0   KEY_9>,
1089                         <0xb6   KEY_0>,
1090                         <0xb5   KEY_BACKSPACE>;
1091         };
1092 };