arch/arm/boot/dts/dm814x-clocks.dtsi

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License version 2 as
   4  * published by the Free Software Foundation.
   5  */
   6
   7 &scm_clocks {
   8
   9         tclkin_ck: tclkin_ck {
  10                 #clock-cells = <0>;
  11                 compatible = "fixed-clock";
  12                 clock-frequency = <32768>;
  13         };
  14
  15         devosc_ck: devosc_ck {
  16                 #clock-cells = <0>;
  17                 compatible = "fixed-clock";
  18                 clock-frequency = <20000000>;
  19         };
  20
  21         /* Optional auxosc, 20 - 30 MHz range, assume 27 MHz by default */
  22         auxosc_ck: auxosc_ck {
  23                 #clock-cells = <0>;
  24                 compatible = "fixed-clock";
  25                 clock-frequency = <27000000>;
  26         };
  27
  28         mpu_ck: mpu_ck {
  29                 #clock-cells = <0>;
  30                 compatible = "fixed-clock";
  31                 clock-frequency = <1000000000>;
  32         };
  33
  34         sysclk4_ck: sysclk4_ck {
  35                 #clock-cells = <0>;
  36                 compatible = "fixed-clock";
  37                 clock-frequency = <222000000>;
  38         };
  39
  40         sysclk6_ck: sysclk6_ck {
  41                 #clock-cells = <0>;
  42                 compatible = "fixed-clock";
  43                 clock-frequency = <100000000>;
  44         };
  45
  46         sysclk10_ck: sysclk10_ck {
  47                 #clock-cells = <0>;
  48                 compatible = "fixed-clock";
  49                 clock-frequency = <48000000>;
  50         };
  51
  52         sysclk18_ck: sysclk18_ck {
  53                 #clock-cells = <0>;
  54                 compatible = "fixed-clock";
  55                 clock-frequency = <32768>;
  56         };
  57
  58         cpsw_125mhz_gclk: cpsw_125mhz_gclk {
  59                 #clock-cells = <0>;
  60                 compatible = "fixed-clock";
  61                 clock-frequency = <125000000>;
  62         };
  63
  64         cpsw_cpts_rft_clk: cpsw_cpts_rft_clk {
  65                 #clock-cells = <0>;
  66                 compatible = "fixed-clock";
  67                 clock-frequency = <250000000>;
  68         };
  69
  70 };
  71
  72 &pllss_clocks {
  73
  74         aud_clkin0_ck: aud_clkin0_ck {
  75                 #clock-cells = <0>;
  76                 compatible = "fixed-clock";
  77                 clock-frequency = <20000000>;
  78         };
  79
  80         aud_clkin1_ck: aud_clkin1_ck {
  81                 #clock-cells = <0>;
  82                 compatible = "fixed-clock";
  83                 clock-frequency = <20000000>;
  84         };
  85
  86         aud_clkin2_ck: aud_clkin2_ck {
  87                 #clock-cells = <0>;
  88                 compatible = "fixed-clock";
  89                 clock-frequency = <20000000>;
  90         };
  91
  92         timer1_mux_ck: timer1_mux_ck {
  93                 #clock-cells = <0>;
  94                 compatible = "ti,mux-clock";
  95                 clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
  96                           &aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
  97                 ti,bit-shift = <3>;
  98                 reg = <0x2e0>;
  99         };
 100
 101         timer2_mux_ck: timer2_mux_ck {
 102                 #clock-cells = <0>;
 103                 compatible = "ti,mux-clock";
 104                 clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
 105                           &aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
 106                 ti,bit-shift = <6>;
 107                 reg = <0x2e0>;
 108         };
 109 };