1 ROCKCHIP MIPI DPHY WITH INNO IP BLOCK
4 - compatible : should be "rockchip,rk3368-mipi-dphy";
5 - reg : the address offset of register for mipi-dphy configuration.
6 - #phy-cells : must be 0. See ./phy-bindings.txt for details.
7 - clocks and clock-names:
8 - the "pclk" clock is required by the phy module, used to register
10 - the "ref" clock is used to get the rate of the reference clock
11 provided to the PHY module
12 - rockchip,dsi-panel : phandle to MIPI DSI panel node, used to get the display
13 timing of the panel provided to the PHY module.
16 - resets : phandle to the reset of MIPI DSI PHY APB clock.
17 - reset-names : should be "apb".
23 mipi_dphy: mipi-dphy@ff968000 {
24 compatible = "rockchip,rk3368-mipi-dphy";
25 reg = <0x0 0xff968000 0x0 0x4000>;
27 clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_DPHYTX0>;
28 clock-names = "ref", "pclk";
29 resets = <&cru SRST_MIPIDPHYTX>;
31 rockchip,dsi-panel = <&dsi_panel>;
34 Then the PHY can be used in other nodes such as:
36 mipi-dsi-host@ff960000 {
38 phy-names = "mipi_dphy";