edits
[cdsspec-compiler.git] / benchmark / chase-lev-deque-bugfix / deque.c
index c9fc8a9327f5d2a20fe623ba796527fe6cd52f81..bb12be0b09a222cfd2bbd1cca1fa0e329fa3a39a 100644 (file)
@@ -22,26 +22,33 @@ Deque * create() {
 */
 int take(Deque *q) {
        size_t b = atomic_load_explicit(&q->bottom, memory_order_relaxed) - 1;
-       Array *a = (Array *) atomic_load_explicit(&q->array, memory_order_relaxed);
-       atomic_store_explicit(&q->bottom, b, memory_order_relaxed);
-       /**** detected correctness ****/
-       atomic_thread_fence(memory_order_seq_cst);
-       size_t t = atomic_load_explicit(&q->top, memory_order_relaxed);
        /**
                @Begin
-               @Commit_point_define_check: t > b
-               @Label: Take_Point1
+               @Commit_point_define_check: true
+               @Label: TakeReadBottom
                @End
        */
+       Array *a = (Array *) atomic_load_explicit(&q->array, memory_order_relaxed);
+       atomic_store_explicit(&q->bottom, b, memory_order_relaxed);
+       /**** SPEC (sequential) (testcase1.c) ****/
+       atomic_thread_fence(memory_order_seq_cst);
+       size_t t = atomic_load_explicit(&q->top, memory_order_relaxed);
        int x;
        if (t <= b) {
+               /**
+                       @Begin
+                       @Commit_point_clear: true
+                       @Label: TakeClear1
+                       @End
+               */
+
                /* Non-empty queue. */
                int size = atomic_load_explicit(&a->size,memory_order_relaxed);
                x = atomic_load_explicit(&a->buffer[b % size], memory_order_relaxed);
                /**
                        @Begin
-                       @Commit_point_define_check: t != b
-                       @Label: Take_Point2
+                       @Commit_point_define_check: true 
+                       @Label: TakeReadBuffer
                        @End
                */
                if (t == b) {
@@ -49,13 +56,21 @@ int take(Deque *q) {
                        //FIXME: weaken the following seq_cst causes no spec problem
                        bool succ = atomic_compare_exchange_strong_explicit(&q->top, &t, t +
                                1, memory_order_seq_cst, memory_order_relaxed);
-                       /**
-                               @Begin
-                               @Commit_point_define_check: true
-                               @Label: Take_Point3
-                               @End
-                       */
                        if (!succ) {
+                               /**
+                                       @Begin
+                                       @Commit_point_clear: true
+                                       @Label: TakeClear2
+                                       @End
+                               */
+
+                               /**
+                                       @Begin
+                                       @Commit_point_define_check: true
+                                       @Label: TakeReadTop
+                                       @End
+                               */
+
                                /* Failed race. */
                                x = EMPTY;
                        }
@@ -77,6 +92,14 @@ void resize(Deque *q) {
        size_t bottom=atomic_load_explicit(&q->bottom, memory_order_relaxed);
        atomic_store_explicit(&new_a->size, new_size, memory_order_relaxed);
        size_t i;
+
+       // Initialize the whole new array to turn off the CDSChecker UL error
+       // Check if CDSSpec checker can catch this bug
+       /*
+       for(i=0; i < new_size; i++) {
+               atomic_store_explicit(&new_a->buffer[i % new_size], atomic_load_explicit(&a->buffer[i % size], memory_order_relaxed), memory_order_relaxed);
+       }
+       */
        for(i=top; i < bottom; i++) {
                atomic_store_explicit(&new_a->buffer[i % new_size], atomic_load_explicit(&a->buffer[i % size], memory_order_relaxed), memory_order_relaxed);
        }
@@ -92,25 +115,26 @@ void resize(Deque *q) {
 */
 void push(Deque *q, int x) {
        size_t b = atomic_load_explicit(&q->bottom, memory_order_relaxed);
-       /**** detected correctness ****/
+       /**** SPEC (sequential) ****/
        size_t t = atomic_load_explicit(&q->top, memory_order_acquire);
        Array *a = (Array *) atomic_load_explicit(&q->array, memory_order_relaxed);
        if (b - t > atomic_load_explicit(&a->size, memory_order_relaxed) - 1) /* Full queue. */ {
                resize(q);
+               // CDSSpec can actually detect the same bug if we avoid the UL error
                //Bug in paper...should have next line...
                a = (Array *) atomic_load_explicit(&q->array, memory_order_relaxed);
        }
        int size = atomic_load_explicit(&a->size, memory_order_relaxed);
+
        atomic_store_explicit(&a->buffer[b % size], x, memory_order_relaxed);
        /**
                @Begin
                @Commit_point_define_check: true
-               @Label: Push_Point
+               @Label: PushUpdateBuffer
                @End
        */
-       /**** correctness error ****/
+       /**** UL & SPEC (Sync) (run with -u100 to avoid the uninitialized bug) ****/
        atomic_thread_fence(memory_order_release);
-       
        atomic_store_explicit(&q->bottom, b + 1, memory_order_relaxed);
        
 }
@@ -121,20 +145,29 @@ void push(Deque *q, int x) {
        @End
 */
 int steal(Deque *q) {
-       //FIXME: weaken the following acquire causes no spec problem
+       //Watch out: actually on need to be an acquire (don't count it)
+       // An old bug
        size_t t = atomic_load_explicit(&q->top, memory_order_acquire);
-       //FIXME: remove the fence causes no error and fewer executions..
-       atomic_thread_fence(memory_order_seq_cst);
-       /**** detected UL ****/
-       size_t b = atomic_load_explicit(&q->bottom, memory_order_acquire);
        /**
                @Begin
-               @Commit_point_define_check: t >= b
-               @Label: Steal_Point1
+               @Commit_point_define_check: true
+               @Label: StealReadTop1
                @End
        */
+       /********** SPEC error (testcase3.c) **********/
+       atomic_thread_fence(memory_order_seq_cst);
+       /**** SPEC & UL ****/
+       size_t b = atomic_load_explicit(&q->bottom, memory_order_acquire);
+       
        int x = EMPTY;
        if (t < b) {
+               /**
+                       @Begin
+                       @Commit_point_clear: true
+                       @Label: StealClear1
+                       @End
+               */
+
                /* Non-empty queue. */
                /**** detected UL ****/
                Array *a = (Array *) atomic_load_explicit(&q->array, memory_order_acquire);
@@ -142,28 +175,28 @@ int steal(Deque *q) {
                x = atomic_load_explicit(&a->buffer[t % size], memory_order_relaxed);
                /**
                        @Begin
-                       @Potential_commit_point_define: true
-                       @Label: Potential_Steal
+                       @Commit_point_define_check: true
+                       @Label: StealReadBuffer
                        @End
                */
-               /**** detected correctness failure ****/ 
+               /**** SPEC (sequential) ****/ 
                bool succ = atomic_compare_exchange_strong_explicit(&q->top, &t, t + 1,
                        memory_order_seq_cst, memory_order_relaxed);
-               /**
-                       @Begin
-                       @Commit_point_define_check: !succ
-                       @Label: Steal_Point2
-                       @End
-               */
-
-               /**
-                       @Begin
-                       @Commit_point_define: succ
-                       @Potential_commit_point_label: Potential_Steal
-                       @Label: Steal_Point3
-                       @End
-               */
                if (!succ) {
+                       /**
+                               @Begin
+                               @Commit_point_clear: true
+                               @Label: StealClear2
+                               @End
+                       */
+
+                       /**
+                               @Begin
+                               @Commit_point_define_check: true
+                               @Label: StealReadTop2
+                               @End
+                       */
+
                        /* Failed race. */
                        return ABORT;
                }