changes

[c11tester.git] / action.cc

diff --git a/action.cc b/action.cc
index b5c72c0226aa8e562cf80cedd6444e2088bb19ba..33dbe75b22c7c3daf8f25f0b51f4a077d652e682 100644 (file)
--- a/action.cc
+++ b/action.cc
@@ -28,12 +28,17 @@ ModelAction::~ModelAction()
 
 bool ModelAction::is_read() const
 {
-       return type == ATOMIC_READ;
+       return type == ATOMIC_READ || type == ATOMIC_RMWR || type == ATOMIC_RMW;
 }
 
 bool ModelAction::is_write() const
 {
-       return type == ATOMIC_WRITE || type == ATOMIC_INIT;
+       return type == ATOMIC_WRITE || type == ATOMIC_RMW || type == ATOMIC_INIT;
+}
+
+bool ModelAction::is_rmwr() const
+{
+       return type == ATOMIC_RMWR;
 }
 
 bool ModelAction::is_rmw() const
@@ -41,6 +46,11 @@ bool ModelAction::is_rmw() const
        return type == ATOMIC_RMW;
 }
 
+bool ModelAction::is_rmwc() const
+{
+       return type == ATOMIC_RMWC;
+}
+
 bool ModelAction::is_initialization() const
 {
        return type == ATOMIC_INIT;
@@ -49,9 +59,9 @@ bool ModelAction::is_initialization() const
 bool ModelAction::is_acquire() const
 {
        switch (order) {
-       case memory_order_acquire:
-       case memory_order_acq_rel:
-       case memory_order_seq_cst:
+       case std::memory_order_acquire:
+       case std::memory_order_acq_rel:
+       case std::memory_order_seq_cst:
                return true;
        default:
                return false;
@@ -61,9 +71,9 @@ bool ModelAction::is_acquire() const
 bool ModelAction::is_release() const
 {
        switch (order) {
-       case memory_order_release:
-       case memory_order_acq_rel:
-       case memory_order_seq_cst:
+       case std::memory_order_release:
+       case std::memory_order_acq_rel:
+       case std::memory_order_seq_cst:
                return true;
        default:
                return false;
@@ -72,7 +82,7 @@ bool ModelAction::is_release() const
 
 bool ModelAction::is_seqcst() const
 {
-       return order==memory_order_seq_cst;
+       return order==std::memory_order_seq_cst;
 }
 
 bool ModelAction::same_var(const ModelAction *act) const
@@ -85,6 +95,27 @@ bool ModelAction::same_thread(const ModelAction *act) const
        return tid == act->tid;
 }
 
+void ModelAction::copy_typeandorder(ModelAction * act) {
+       this->type=act->type;
+       this->order=act->order;
+}
+
+/** This method changes an existing read part of an RMW action into either:
+ *  (1) a full RMW action in case of the completed write or
+ *  (2) a READ action in case a failed action.
+ * @todo  If the memory_order changes, we may potentially need to update our
+ * clock vector.
+ */
+void ModelAction::process_rmw(ModelAction * act) {
+       this->order=act->order;
+       if (act->is_rmwc())
+               this->type=ATOMIC_READ;
+       else if (act->is_rmw()) {
+               this->type=ATOMIC_RMW;
+               this->value=act->value;
+       }
+}
+
 /** The is_synchronizing method should only explore interleavings if:
  *  (1) the operations are seq_cst and don't commute or
  *  (2) the reordering may establish or break a synchronization relation.
@@ -94,7 +125,6 @@ bool ModelAction::same_thread(const ModelAction *act) const
  *  @param act is the action to consider exploring a reordering.
  *  @return tells whether we have to explore a reordering.
  */
-
 bool ModelAction::is_synchronizing(const ModelAction *act) const
 {
        //Same thread can't be reordered
@@ -130,13 +160,25 @@ void ModelAction::create_cv(const ModelAction *parent)
                cv = new ClockVector(NULL, this);
 }
 
+
+/** Update the model action's read_from action */
 void ModelAction::read_from(const ModelAction *act)
 {
        ASSERT(cv);
-       if (act->is_release() && this->is_acquire())
+       if (act->is_release() && this->is_acquire()) {
+               synchronized(act);
                cv->merge(act->cv);
+       }
        reads_from = act;
-       value = act->value;
+}
+
+
+/** Synchronize the current thread with the thread corresponding to
+ *  the ModelAction parameter. */
+
+void ModelAction::synchronized(const ModelAction *act) {
+       model->check_promises(cv, act->cv);
+       cv->merge(act->cv);
 }
 
 /**
@@ -175,6 +217,12 @@ void ModelAction::print(void) const
        case ATOMIC_RMW:
                type_str = "atomic rmw";
                break;
+       case ATOMIC_RMWR:
+               type_str = "atomic rmwr";
+               break;
+       case ATOMIC_RMWC:
+               type_str = "atomic rmwc";
+               break;
        case ATOMIC_INIT:
                type_str = "init atomic";
                break;
@@ -182,8 +230,10 @@ void ModelAction::print(void) const
                type_str = "unknown type";
        }
 
+       uint64_t valuetoprint=type==ATOMIC_READ?(reads_from!=NULL?reads_from->value:VALUE_NONE):value;
+
        printf("(%3d) Thread: %-2d    Action: %-13s    MO: %d    Loc: %14p    Value: %-12" PRIu64,
-                       seq_number, id_to_int(tid), type_str, order, location, value);
+                       seq_number, id_to_int(tid), type_str, order, location, valuetoprint);
        if (reads_from)
                printf(" Rf: %d", reads_from->get_seq_number());
        if (cv) {