oota-llvm.git
2005-08-23 Chris LattnerNew testcase for PR618
2005-08-23 Chris Lattneradd a note
2005-08-23 Nate BegemanAck, typo
2005-08-23 Nate BegemanAdd an option to make SetCC illegal as a beta option
2005-08-23 Nate BegemanTeach the SelectionDAG how to transform select_cc eq...
2005-08-23 Nate BegemanTeach Legalize how to turn setcc into select_cc
2005-08-23 Nate BegemanRemove some instructions we no longer generate
2005-08-22 Chris LattnerRemove some regs that are not used.
2005-08-22 Chris LattnerNate noticed that 30% of the malloc/frees in llc come...
2005-08-22 Chris LattnerFix a crash I introduced into the IA64 backend with...
2005-08-22 Chris LattnerTry to avoid scanning the fixed list. On architectures...
2005-08-22 Chris LattnerMove some code in the register assignment case that...
2005-08-22 Chris LattnerAdd a pass name for -time-passes output
2005-08-22 Chris LattnerFix a problem where constant expr shifts would not...
2005-08-22 Chris LattnerTestcase for a crash in the legalizer on ia64. This...
2005-08-22 Chris LattnerAdd a long-overdue itanium regression test dir: hint...
2005-08-22 Chris LattnerSpeed up this loop a bit, based on some observations...
2005-08-22 Chris LattnerRevert my patch which changed the code to not work.
2005-08-22 Chris LattnerMake the example a bit easier to understand, suggested...
2005-08-22 Chris LattnerImplement stores.
2005-08-22 Chris LattnerAdd a fast-path for register values. Add support for...
2005-08-22 Chris LattnerFix compilation of:
2005-08-22 Chris LattnerMake sure expressions only have one use before emitting...
2005-08-21 Chris LattnerImplement most of load support. There is still a bug...
2005-08-21 Chris Lattneradd a method
2005-08-21 Chris Lattneradd anew method
2005-08-21 Chris LattnerAdd support for frame index nodes
2005-08-21 Chris Lattneradd a method
2005-08-21 Chris LattnerADd a method
2005-08-21 Chris LattnerDon't print out the MBB label for the entry mbb
2005-08-21 Chris LattnerSimplify the logic for BRTWOWAY_CC handling. The isel...
2005-08-21 Chris LattnerImplement selection for branches.
2005-08-21 Chris LattnerAdd 5-operand version of SelectNodeTo
2005-08-21 Chris Lattneradd a method
2005-08-21 Chris LattnerAdd support for basic blocks, fix a bug in result ...
2005-08-21 Chris LattnerWhen legalizing brcond ->brcc or select -> selectcc...
2005-08-21 Chris LattnerIf the false value for a select_cc is really simple...
2005-08-21 Chris LattnerFix a bug in the RUN line
2005-08-21 Duraid Madinareenable collapse of loadimm+AND -> dep.z (thanks guys)
2005-08-20 Chris Lattnerfix bogus warning
2005-08-20 Jim LaskeyRepair an out by one error for IA64.
2005-08-19 Chris Lattneradd support for global address, including PIC support.
2005-08-19 Chris LattnerAdd support for global address nodes
2005-08-19 Chris LattnerADd support for TargetGlobalAddress nodes
2005-08-19 Chris LattnerAdd support for TargetGlobalAddress nodes
2005-08-19 Chris LattnerImplement CopyFromReg, TokenFactor, and fix a bug in...
2005-08-19 Chris LattnerFix a bug in previous commit
2005-08-19 Chris LattnerFix a typeo, no wonder all tokenfactor edges were the...
2005-08-19 Chris LattnerPrint physreg register nodes with target names (e.g...
2005-08-19 Chris LattnerBefore implementing copyfromreg, we'll implement copyto...
2005-08-19 Chris LattnerNow that we have operand info for machine instructions...
2005-08-19 Chris LattnerEmit this:
2005-08-19 Chris LattnerExpose the derived register classes to the public heade...
2005-08-19 Chris LattnerSplit RegisterClass 'Methods' into MethodProtos and...
2005-08-19 Chris LattnerSplit register class "Methods" into MethodProtos and...
2005-08-19 Chris Lattnerput reg classes into namespace
2005-08-19 Chris LattnerPut reg classes into namespaces
2005-08-19 Chris LattnerPut register classes into namespaces
2005-08-19 Chris LattnerPut register classes in namespaces
2005-08-19 Chris LattnerFix code that assumes the register info will be dumped...
2005-08-19 Chris Lattnerput reg classes in namespaces
2005-08-19 Chris LattnerRequire that targets specify a namespace for their...
2005-08-19 Chris LattnerRefactor to use Target.getRegisterClasses consistently...
2005-08-19 Chris LattnerEmit real operand info for instructions. This currentl...
2005-08-19 Chris LattnerRead the namespace field from register classes
2005-08-19 Chris LattnerThe skeleton target has never had an isel
2005-08-19 Chris LattnerThis code has always been dead on itanium
2005-08-19 Chris LattnerThis code has always been dead for alpha
2005-08-19 Chris LattnerThe simple isel being gone makes this dead!
2005-08-19 Chris LattnerNow that the simple isels are dead, so is this.
2005-08-19 Chris Lattneradd a setName method to record
2005-08-19 Chris LattnerAdd a setName method to Record.
2005-08-19 Chris LattnerFor now, just emit empty operand info structures.
2005-08-19 Chris LattnerSparcv9 gets no operand info
2005-08-19 Chris LattnerAdd a new field to TargetInstrDescriptor for tracking...
2005-08-19 Jeff CohenFix VC++ constant truncation warning.
2005-08-19 Jeff CohenUpdate Visual Studio projects for removed file.
2005-08-19 Duraid Madinaa bugfix (up top) and a quick repair job: disable gener...
2005-08-19 Chris LattnerFix a problem jeffc noticed
2005-08-19 Jeff CohenFix VC++ precedence warning.
2005-08-19 Nate BegemanFix a bug where we were passing the wrong number of...
2005-08-19 Chris Lattnerremove dead args
2005-08-19 Chris Lattnerremove dead options
2005-08-19 Chris Lattnerremove dead flags
2005-08-19 Chris LattnerThe code emitter generator only supports targets with...
2005-08-19 Chris LattnerFix computation of # operands, add a temporary hack...
2005-08-19 Chris Lattnernow that all of the targets are clean w.r.t. the number...
2005-08-19 Nate BegemanAdd support for target nodes with more than 3 operands...
2005-08-19 Chris Lattnermark variable arity instructions as such. Alpha wins...
2005-08-19 Chris LattnerMark some instructions as variable_ops, and PSEUDO_ALLO...
2005-08-19 Chris Lattneradd a few missing cases
2005-08-19 Chris LattnerGive ADJCALLSTACKDOWN/UP the correct operands.
2005-08-19 Nate BegemanISD::OR, and it's accompanying SelectBitfieldInsert
2005-08-19 Chris LattnerThe variable SAR's only take one operand too
2005-08-19 Chris LattnerStop adding bogus operands to variable shifts on X86...
2005-08-18 Nate BegemanRemove the X86 and PowerPC Simple instruction selectors...
2005-08-18 Chris LattnerFigure out how many operands each instruction has,...
2005-08-18 Nate BegemanAdd shifts.
2005-08-18 Chris LattnerFix operand numbers by marking variable arity nodes...
2005-08-18 Chris LattnerMFLR doesn't take an operand, the LR register is implicit
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