From fe532ad6d6643219669056dc268d63fb29a8d1ee Mon Sep 17 00:00:00 2001 From: JF Bastien Date: Fri, 14 Jun 2013 02:49:43 +0000 Subject: [PATCH] Enable FastISel on ARM for Linux and NaCl, not MCJIT This is a resubmit of r182877, which was reverted because it broken MCJIT tests on ARM. The patch leaves MCJIT on ARM as it was before: only enabled for iOS. I've CC'ed people from the original review and revert. FastISel was only enabled for iOS ARM and Thumb2, this patch enables it for ARM (not Thumb2) on Linux and NaCl, but not MCJIT. Thumb2 support needs a bit more work, mainly around register class restrictions. The patch punts to SelectionDAG when doing TLS relocation on non-Darwin targets. I will fix this and other FastISel-to-SelectionDAG failures in a separate patch. The patch also forces FastISel to retain frame pointers: iOS always keeps them for backtracking (so emitted code won't change because of this), but Linux was getting much worse code that was incorrect when using big frames (such as test-suite's lencod). I'll also fix this in a later patch, it will probably require a peephole so that FastISel doesn't rematerialize frame pointers back-to-back. The test changes are straightforward, similar to: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20130513/174279.html They also add a vararg test that got dropped in that change. I ran all of lnt test-suite on A15 hardware with --optimize-option=-O0 and all the tests pass. All the tests also pass on x86 make check-all. I also re-ran the check-all tests that failed on ARM, and they all seem to pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183966 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/ExecutionEngine/TargetSelect.cpp | 8 ++++ lib/Target/ARM/ARMFastISel.cpp | 21 +++++++-- test/CodeGen/ARM/fast-isel-GEP-coalesce.ll | 1 + test/CodeGen/ARM/fast-isel-binary.ll | 1 + test/CodeGen/ARM/fast-isel-br-const.ll | 1 + .../ARM/fast-isel-call-multi-reg-return.ll | 1 + test/CodeGen/ARM/fast-isel-call.ll | 3 ++ test/CodeGen/ARM/fast-isel-cmp-imm.ll | 1 + test/CodeGen/ARM/fast-isel-conversion.ll | 1 + test/CodeGen/ARM/fast-isel-crash.ll | 1 + test/CodeGen/ARM/fast-isel-crash2.ll | 1 + test/CodeGen/ARM/fast-isel-ext.ll | 3 ++ test/CodeGen/ARM/fast-isel-fold.ll | 1 + test/CodeGen/ARM/fast-isel-frameaddr.ll | 6 +-- test/CodeGen/ARM/fast-isel-icmp.ll | 1 + test/CodeGen/ARM/fast-isel-indirectbr.ll | 1 + test/CodeGen/ARM/fast-isel-intrinsic.ll | 14 +++--- test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll | 1 + test/CodeGen/ARM/fast-isel-mvn.ll | 1 + test/CodeGen/ARM/fast-isel-pic.ll | 4 +- test/CodeGen/ARM/fast-isel-pred.ll | 1 + test/CodeGen/ARM/fast-isel-ret.ll | 1 + test/CodeGen/ARM/fast-isel-select.ll | 1 + test/CodeGen/ARM/fast-isel-shifter.ll | 1 + test/CodeGen/ARM/fast-isel-static.ll | 2 + test/CodeGen/ARM/fast-isel-vararg.ll | 47 +++++++++++++++++++ test/CodeGen/ARM/fast-isel.ll | 1 + 27 files changed, 111 insertions(+), 15 deletions(-) create mode 100644 test/CodeGen/ARM/fast-isel-vararg.ll diff --git a/lib/ExecutionEngine/TargetSelect.cpp b/lib/ExecutionEngine/TargetSelect.cpp index ca4330fa22b..558d8b37af1 100644 --- a/lib/ExecutionEngine/TargetSelect.cpp +++ b/lib/ExecutionEngine/TargetSelect.cpp @@ -88,6 +88,14 @@ TargetMachine *EngineBuilder::selectTarget(const Triple &TargetTriple, FeaturesStr = Features.getString(); } + // FIXME: non-iOS ARM FastISel is broken with MCJIT. + if (UseMCJIT && + TheTriple.getArch() == Triple::arm && + TheTriple.getOS() != Triple::IOS && + OptLevel == CodeGenOpt::None) { + OptLevel = CodeGenOpt::Less; + } + // Allocate a target... TargetMachine *Target = TheTarget->createTargetMachine(TheTriple.getTriple(), MCPU, FeaturesStr, diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index a4de9416892..97dc63ff92b 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -630,6 +630,11 @@ unsigned ARMFastISel::ARMMaterializeGV(const GlobalValue *GV, MVT VT) { (const TargetRegisterClass*)&ARM::GPRRegClass; unsigned DestReg = createResultReg(RC); + // FastISel TLS support on non-Darwin is broken, punt to SelectionDAG. + const GlobalVariable *GVar = dyn_cast(GV); + bool IsThreadLocal = GVar && GVar->isThreadLocal(); + if (!Subtarget->isTargetDarwin() && IsThreadLocal) return 0; + // Use movw+movt when possible, it avoids constant pool entries. // Darwin targets don't support movt with Reloc::Static, see // ARMTargetLowering::LowerGlobalAddressDarwin. Other targets only support @@ -3044,13 +3049,23 @@ bool ARMFastISel::FastLowerArguments() { namespace llvm { FastISel *ARM::createFastISel(FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo) { - // Completely untested on non-iOS. const TargetMachine &TM = funcInfo.MF->getTarget(); - // Darwin and thumb1 only for now. const ARMSubtarget *Subtarget = &TM.getSubtarget(); - if (Subtarget->isTargetIOS() && !Subtarget->isThumb1Only()) + // Thumb2 support on iOS; ARM support on iOS, Linux and NaCl. + bool UseFastISel = false; + UseFastISel |= Subtarget->isTargetIOS() && !Subtarget->isThumb1Only(); + UseFastISel |= Subtarget->isTargetLinux() && !Subtarget->isThumb(); + UseFastISel |= Subtarget->isTargetNaCl() && !Subtarget->isThumb(); + + if (UseFastISel) { + // iOS always has a FP for backtracking, force other targets + // to keep their FP when doing FastISel. The emitted code is + // currently superior, and in cases like test-suite's lencod + // FastISel isn't quite correct when FP is eliminated. + TM.Options.NoFramePointerElim = true; return new ARMFastISel(funcInfo, libInfo); + } return 0; } } diff --git a/test/CodeGen/ARM/fast-isel-GEP-coalesce.ll b/test/CodeGen/ARM/fast-isel-GEP-coalesce.ll index 28a84e3bf9e..05a6bab99db 100644 --- a/test/CodeGen/ARM/fast-isel-GEP-coalesce.ll +++ b/test/CodeGen/ARM/fast-isel-GEP-coalesce.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB %struct.A = type { i32, [2 x [2 x i32]], i8, [3 x [3 x [3 x i32]]] } diff --git a/test/CodeGen/ARM/fast-isel-binary.ll b/test/CodeGen/ARM/fast-isel-binary.ll index 723383e04b8..31596276f37 100644 --- a/test/CodeGen/ARM/fast-isel-binary.ll +++ b/test/CodeGen/ARM/fast-isel-binary.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB ; Test add with non-legal types diff --git a/test/CodeGen/ARM/fast-isel-br-const.ll b/test/CodeGen/ARM/fast-isel-br-const.ll index aefe200dc74..293302f5726 100644 --- a/test/CodeGen/ARM/fast-isel-br-const.ll +++ b/test/CodeGen/ARM/fast-isel-br-const.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB define i32 @t1(i32 %a, i32 %b) nounwind uwtable ssp { diff --git a/test/CodeGen/ARM/fast-isel-call-multi-reg-return.ll b/test/CodeGen/ARM/fast-isel-call-multi-reg-return.ll index 46d5f997c6e..da829e929ef 100644 --- a/test/CodeGen/ARM/fast-isel-call-multi-reg-return.ll +++ b/test/CodeGen/ARM/fast-isel-call-multi-reg-return.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB ; Fast-isel can't handle non-double multi-reg retvals. diff --git a/test/CodeGen/ARM/fast-isel-call.ll b/test/CodeGen/ARM/fast-isel-call.ll index f4a5d99c156..3833043ad73 100644 --- a/test/CodeGen/ARM/fast-isel-call.ll +++ b/test/CodeGen/ARM/fast-isel-call.ll @@ -1,8 +1,11 @@ ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=ARM-LONG +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -arm-long-calls | FileCheck %s --check-prefix=ARM-LONG ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=THUMB-LONG ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=ARM-NOVFP +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -mattr=-vfp2 | FileCheck %s --check-prefix=ARM-NOVFP ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=THUMB-NOVFP ; Note that some of these tests assume that relocations are either diff --git a/test/CodeGen/ARM/fast-isel-cmp-imm.ll b/test/CodeGen/ARM/fast-isel-cmp-imm.ll index 660156aa48b..45ef4ed75a6 100644 --- a/test/CodeGen/ARM/fast-isel-cmp-imm.ll +++ b/test/CodeGen/ARM/fast-isel-cmp-imm.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB define void @t1a(float %a) uwtable ssp { diff --git a/test/CodeGen/ARM/fast-isel-conversion.ll b/test/CodeGen/ARM/fast-isel-conversion.ll index 94654f39d12..e40891a2ddf 100644 --- a/test/CodeGen/ARM/fast-isel-conversion.ll +++ b/test/CodeGen/ARM/fast-isel-conversion.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB ; Test sitofp diff --git a/test/CodeGen/ARM/fast-isel-crash.ll b/test/CodeGen/ARM/fast-isel-crash.ll index 7d45feff69b..ec9cf8d9501 100644 --- a/test/CodeGen/ARM/fast-isel-crash.ll +++ b/test/CodeGen/ARM/fast-isel-crash.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=thumbv7-apple-darwin +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=thumbv7-linux-gnueabi %union.anon = type { <16 x i32> } diff --git a/test/CodeGen/ARM/fast-isel-crash2.ll b/test/CodeGen/ARM/fast-isel-crash2.ll index 8867f87065a..d606877673d 100644 --- a/test/CodeGen/ARM/fast-isel-crash2.ll +++ b/test/CodeGen/ARM/fast-isel-crash2.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=thumbv7-apple-darwin +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=thumbv7-linux-gnueabi ; rdar://9515076 ; (Make sure this doesn't crash.) diff --git a/test/CodeGen/ARM/fast-isel-ext.ll b/test/CodeGen/ARM/fast-isel-ext.ll index cb6e9ba1a15..38ce4815715 100644 --- a/test/CodeGen/ARM/fast-isel-ext.ll +++ b/test/CodeGen/ARM/fast-isel-ext.ll @@ -1,6 +1,9 @@ ; RUN: llc < %s -O0 -fast-isel-abort -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=v7 +; RUN: llc < %s -O0 -fast-isel-abort -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=v7 ; RUN: llc < %s -O0 -fast-isel-abort -mtriple=armv4t-apple-ios | FileCheck %s --check-prefix=prev6 +; RUN: llc < %s -O0 -fast-isel-abort -mtriple=armv4t-linux-gnueabi | FileCheck %s --check-prefix=prev6 ; RUN: llc < %s -O0 -fast-isel-abort -mtriple=armv5-apple-ios | FileCheck %s --check-prefix=prev6 +; RUN: llc < %s -O0 -fast-isel-abort -mtriple=armv5-linux-gnueabi | FileCheck %s --check-prefix=prev6 ; RUN: llc < %s -O0 -fast-isel-abort -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=v7 ; Can't test pre-ARMv6 Thumb because ARM FastISel currently only supports diff --git a/test/CodeGen/ARM/fast-isel-fold.ll b/test/CodeGen/ARM/fast-isel-fold.ll index c920f9b5e70..e8ed8cbf34e 100644 --- a/test/CodeGen/ARM/fast-isel-fold.ll +++ b/test/CodeGen/ARM/fast-isel-fold.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB @a = global i8 1, align 1 diff --git a/test/CodeGen/ARM/fast-isel-frameaddr.ll b/test/CodeGen/ARM/fast-isel-frameaddr.ll index c256e73ab98..5ae7ad7f144 100644 --- a/test/CodeGen/ARM/fast-isel-frameaddr.ll +++ b/test/CodeGen/ARM/fast-isel-frameaddr.ll @@ -46,8 +46,7 @@ entry: ; LINUX-ARM: frameaddr_index1: ; LINUX-ARM: push {r11} ; LINUX-ARM: mov r11, sp -; LINUX-ARM: mov r0, r11 -; LINUX-ARM: ldr r0, [r0] +; LINUX-ARM: ldr r0, [r11] ; LINUX-THUMB2: frameaddr_index1: ; LINUX-THUMB2: str r7, [sp, #-4]! @@ -80,8 +79,7 @@ entry: ; LINUX-ARM: frameaddr_index3: ; LINUX-ARM: push {r11} ; LINUX-ARM: mov r11, sp -; LINUX-ARM: mov r0, r11 -; LINUX-ARM: ldr r0, [r0] +; LINUX-ARM: ldr r0, [r11] ; LINUX-ARM: ldr r0, [r0] ; LINUX-ARM: ldr r0, [r0] diff --git a/test/CodeGen/ARM/fast-isel-icmp.ll b/test/CodeGen/ARM/fast-isel-icmp.ll index 9d4beb6eebd..3dc1109165a 100644 --- a/test/CodeGen/ARM/fast-isel-icmp.ll +++ b/test/CodeGen/ARM/fast-isel-icmp.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB define i32 @icmp_i16_signed(i16 %a, i16 %b) nounwind { diff --git a/test/CodeGen/ARM/fast-isel-indirectbr.ll b/test/CodeGen/ARM/fast-isel-indirectbr.ll index ebc0e8426d5..2456ef44204 100644 --- a/test/CodeGen/ARM/fast-isel-indirectbr.ll +++ b/test/CodeGen/ARM/fast-isel-indirectbr.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB define void @t1(i8* %x) { diff --git a/test/CodeGen/ARM/fast-isel-intrinsic.ll b/test/CodeGen/ARM/fast-isel-intrinsic.ll index d2d208b3cf5..572ac3ad96f 100644 --- a/test/CodeGen/ARM/fast-isel-intrinsic.ll +++ b/test/CodeGen/ARM/fast-isel-intrinsic.ll @@ -1,6 +1,8 @@ ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=ARM-LONG +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -arm-long-calls | FileCheck %s --check-prefix=ARM-LONG ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=THUMB-LONG ; Note that some of these tests assume that relocations are either @@ -20,8 +22,8 @@ define void @t1() nounwind ssp { ; ARM: and r1, r1, #255 ; ARM: bl {{_?}}memset ; ARM-LONG: t1 -; ARM-LONG: movw r3, :lower16:L_memset$non_lazy_ptr -; ARM-LONG: movt r3, :upper16:L_memset$non_lazy_ptr +; ARM-LONG: {{(movw r3, :lower16:L_memset\$non_lazy_ptr)|(ldr r3, .LCPI)}} +; ARM-LONG: {{(movt r3, :upper16:L_memset\$non_lazy_ptr)?}} ; ARM-LONG: ldr r3, [r3] ; ARM-LONG: blx r3 ; THUMB: t1 @@ -58,8 +60,8 @@ define void @t2() nounwind ssp { ; ARM: ldr r1, [sp[[SLOT]]] @ 4-byte Reload ; ARM: bl {{_?}}memcpy ; ARM-LONG: t2 -; ARM-LONG: movw r3, :lower16:L_memcpy$non_lazy_ptr -; ARM-LONG: movt r3, :upper16:L_memcpy$non_lazy_ptr +; ARM-LONG: {{(movw r3, :lower16:L_memcpy\$non_lazy_ptr)|(ldr r3, .LCPI)}} +; ARM-LONG: {{(movt r3, :upper16:L_memcpy\$non_lazy_ptr)?}} ; ARM-LONG: ldr r3, [r3] ; ARM-LONG: blx r3 ; THUMB: t2 @@ -96,8 +98,8 @@ define void @t3() nounwind ssp { ; ARM: mov r0, r1 ; ARM: bl {{_?}}memmove ; ARM-LONG: t3 -; ARM-LONG: movw r3, :lower16:L_memmove$non_lazy_ptr -; ARM-LONG: movt r3, :upper16:L_memmove$non_lazy_ptr +; ARM-LONG: {{(movw r3, :lower16:L_memmove\$non_lazy_ptr)|(ldr r3, .LCPI)}} +; ARM-LONG: {{(movt r3, :upper16:L_memmove\$non_lazy_ptr)?}} ; ARM-LONG: ldr r3, [r3] ; ARM-LONG: blx r3 ; THUMB: t3 diff --git a/test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll b/test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll index 0e71322d4e2..c05ea398d72 100644 --- a/test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll +++ b/test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM ; rdar://10418009 define zeroext i16 @t1(i16* nocapture %a) nounwind uwtable readonly ssp { diff --git a/test/CodeGen/ARM/fast-isel-mvn.ll b/test/CodeGen/ARM/fast-isel-mvn.ll index 328168a84ff..0bc9395e2d7 100644 --- a/test/CodeGen/ARM/fast-isel-mvn.ll +++ b/test/CodeGen/ARM/fast-isel-mvn.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB ; rdar://10412592 diff --git a/test/CodeGen/ARM/fast-isel-pic.ll b/test/CodeGen/ARM/fast-isel-pic.ll index da7007bd4a9..0589f9ada8f 100644 --- a/test/CodeGen/ARM/fast-isel-pic.ll +++ b/test/CodeGen/ARM/fast-isel-pic.ll @@ -26,7 +26,7 @@ entry: ; ARMv7-ELF: LoadGV ; ARMv7-ELF: ldr r[[reg2:[0-9]+]], ; ARMv7-ELF: ldr r[[reg3:[0-9]+]], -; ARMv7-ELF: ldr r[[reg2]], [r[[reg2]], r[[reg3]]] +; ARMv7-ELF: ldr r[[reg2]], [r[[reg3]], r[[reg2]]] %tmp = load i32* @g ret i32 %tmp } @@ -55,7 +55,7 @@ entry: ; ARMv7-ELF: LoadIndirectSymbol ; ARMv7-ELF: ldr r[[reg5:[0-9]+]], ; ARMv7-ELF: ldr r[[reg6:[0-9]+]], -; ARMv7-ELF: ldr r[[reg5]], [r[[reg5]], r[[reg6]]] +; ARMv7-ELF: ldr r[[reg5]], [r[[reg6]], r[[reg5]]] %tmp = load i32* @i ret i32 %tmp } diff --git a/test/CodeGen/ARM/fast-isel-pred.ll b/test/CodeGen/ARM/fast-isel-pred.ll index 27731def1f5..48f93225b6b 100644 --- a/test/CodeGen/ARM/fast-isel-pred.ll +++ b/test/CodeGen/ARM/fast-isel-pred.ll @@ -1,4 +1,5 @@ ; RUN: llc -O0 -verify-machineinstrs -mtriple=armv7-apple-darwin < %s +; RUN: llc -O0 -verify-machineinstrs -mtriple=armv7-linux-gnueabi < %s define i32 @main() nounwind ssp { entry: diff --git a/test/CodeGen/ARM/fast-isel-ret.ll b/test/CodeGen/ARM/fast-isel-ret.ll index 4091dc6f6b9..ba5412c4f11 100644 --- a/test/CodeGen/ARM/fast-isel-ret.ll +++ b/test/CodeGen/ARM/fast-isel-ret.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s ; Sign-extend of i1 currently not supported by fast-isel diff --git a/test/CodeGen/ARM/fast-isel-select.ll b/test/CodeGen/ARM/fast-isel-select.ll index a9370362846..bb8881430ca 100644 --- a/test/CodeGen/ARM/fast-isel-select.ll +++ b/test/CodeGen/ARM/fast-isel-select.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB define i32 @t1(i1 %c) nounwind readnone { diff --git a/test/CodeGen/ARM/fast-isel-shifter.ll b/test/CodeGen/ARM/fast-isel-shifter.ll index 111818b289e..dbb1ce231a0 100644 --- a/test/CodeGen/ARM/fast-isel-shifter.ll +++ b/test/CodeGen/ARM/fast-isel-shifter.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM define i32 @shl() nounwind ssp { entry: diff --git a/test/CodeGen/ARM/fast-isel-static.ll b/test/CodeGen/ARM/fast-isel-static.ll index afdfa84f390..7d86cb9b697 100644 --- a/test/CodeGen/ARM/fast-isel-static.ll +++ b/test/CodeGen/ARM/fast-isel-static.ll @@ -1,5 +1,7 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=static -arm-long-calls | FileCheck -check-prefix=LONG %s +; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=static -arm-long-calls | FileCheck -check-prefix=LONG %s ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=static | FileCheck -check-prefix=NORM %s +; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=static | FileCheck -check-prefix=NORM %s define void @myadd(float* %sum, float* %addend) nounwind { entry: diff --git a/test/CodeGen/ARM/fast-isel-vararg.ll b/test/CodeGen/ARM/fast-isel-vararg.ll new file mode 100644 index 00000000000..0b7b0bd1c6f --- /dev/null +++ b/test/CodeGen/ARM/fast-isel-vararg.ll @@ -0,0 +1,47 @@ +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB + +define i32 @VarArg() nounwind { +entry: + %i = alloca i32, align 4 + %j = alloca i32, align 4 + %k = alloca i32, align 4 + %m = alloca i32, align 4 + %n = alloca i32, align 4 + %tmp = alloca i32, align 4 + %0 = load i32* %i, align 4 + %1 = load i32* %j, align 4 + %2 = load i32* %k, align 4 + %3 = load i32* %m, align 4 + %4 = load i32* %n, align 4 +; ARM: VarArg +; ARM: mov [[FP:r[0-9]+]], sp +; ARM: sub sp, sp, #32 +; ARM: movw r0, #5 +; ARM: ldr r1, {{\[}}[[FP]], #-4] +; ARM: ldr r2, {{\[}}[[FP]], #-8] +; ARM: ldr r3, {{\[}}[[FP]], #-12] +; ARM: ldr [[Ra:r[0-9]+]], [sp, #16] +; ARM: ldr [[Rb:[lr]+[0-9]*]], [sp, #12] +; ARM: str [[Ra]], [sp] +; ARM: str [[Rb]], [sp, #4] +; ARM: bl {{_?CallVariadic}} +; THUMB: sub sp, #32 +; THUMB: movs r0, #5 +; THUMB: movt r0, #0 +; THUMB: ldr r1, [sp, #28] +; THUMB: ldr r2, [sp, #24] +; THUMB: ldr r3, [sp, #20] +; THUMB: ldr.w {{[a-z0-9]+}}, [sp, #16] +; THUMB: ldr.w {{[a-z0-9]+}}, [sp, #12] +; THUMB: str.w {{[a-z0-9]+}}, [sp] +; THUMB: str.w {{[a-z0-9]+}}, [sp, #4] +; THUMB: bl {{_?}}CallVariadic + %call = call i32 (i32, ...)* @CallVariadic(i32 5, i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) + store i32 %call, i32* %tmp, align 4 + %5 = load i32* %tmp, align 4 + ret i32 %5 +} + +declare i32 @CallVariadic(i32, ...) diff --git a/test/CodeGen/ARM/fast-isel.ll b/test/CodeGen/ARM/fast-isel.ll index f877e78c6e9..fd846bd97d6 100644 --- a/test/CodeGen/ARM/fast-isel.ll +++ b/test/CodeGen/ARM/fast-isel.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB ; Very basic fast-isel functionality. -- 2.34.1