From fd4418fc9b4725c44210c169c4d6500be468ca70 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Wed, 25 Jun 2008 16:07:49 +0000 Subject: [PATCH] Remove the OrigVT member from AtomicSDNode, as it is redundant with the base SDNode's VTList. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52722 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/SelectionDAG.h | 4 ++-- include/llvm/CodeGen/SelectionDAGNodes.h | 11 ++++----- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 4 ++-- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 12 ++++------ lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 6 ++--- lib/Target/TargetSelectionDAG.td | 24 +++++++++---------- lib/Target/X86/X86ISelLowering.cpp | 8 +++---- 7 files changed, 31 insertions(+), 38 deletions(-) diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h index 4c2ddce8a90..8b3dad223a0 100644 --- a/include/llvm/CodeGen/SelectionDAG.h +++ b/include/llvm/CodeGen/SelectionDAG.h @@ -370,13 +370,13 @@ public: /// getAtomic - Gets a node for an atomic op, produces result and chain, takes /// 3 operands SDOperand getAtomic(unsigned Opcode, SDOperand Chain, SDOperand Ptr, - SDOperand Cmp, SDOperand Swp, MVT VT, const Value* PtrVal, + SDOperand Cmp, SDOperand Swp, const Value* PtrVal, unsigned Alignment=0); /// getAtomic - Gets a node for an atomic op, produces result and chain, takes /// 2 operands SDOperand getAtomic(unsigned Opcode, SDOperand Chain, SDOperand Ptr, - SDOperand Val, MVT VT, const Value* PtrVal, + SDOperand Val, const Value* PtrVal, unsigned Alignment = 0); /// getLoad - Loads are not normal binary operators: their result type is not diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index 67daaafd320..2e274558138 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -1491,7 +1491,6 @@ public: class AtomicSDNode : public MemSDNode { virtual void ANCHOR(); // Out-of-line virtual method to give class a home. SDUse Ops[4]; - MVT OrigVT; public: // Opc: opcode for atomic @@ -1500,13 +1499,12 @@ class AtomicSDNode : public MemSDNode { // Ptr: address to update as a SDOperand // Cmp: compare value // Swp: swap value - // VT: resulting value type // SrcVal: address to update as a Value (used for MemOperand) // Align: alignment of memory AtomicSDNode(unsigned Opc, SDVTList VTL, SDOperand Chain, SDOperand Ptr, - SDOperand Cmp, SDOperand Swp, MVT VT, const Value* SrcVal, + SDOperand Cmp, SDOperand Swp, const Value* SrcVal, unsigned Align=0) - : MemSDNode(Opc, VTL, SrcVal, Align), OrigVT(VT) { + : MemSDNode(Opc, VTL, SrcVal, Align) { Ops[0] = Chain; Ops[1] = Ptr; Ops[2] = Swp; @@ -1514,15 +1512,14 @@ class AtomicSDNode : public MemSDNode { InitOperands(Ops, 4); } AtomicSDNode(unsigned Opc, SDVTList VTL, SDOperand Chain, SDOperand Ptr, - SDOperand Val, MVT VT, const Value* SrcVal, unsigned Align=0) - : MemSDNode(Opc, VTL, SrcVal, Align), OrigVT(VT) { + SDOperand Val, const Value* SrcVal, unsigned Align=0) + : MemSDNode(Opc, VTL, SrcVal, Align) { Ops[0] = Chain; Ops[1] = Ptr; Ops[2] = Val; InitOperands(Ops, 3); } - MVT getVT() const { return OrigVT; } const SDOperand &getChain() const { return getOperand(0); } const SDOperand &getBasePtr() const { return getOperand(1); } const SDOperand &getVal() const { return getOperand(2); } diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index cf335087517..f087496996a 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -4276,7 +4276,7 @@ SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) { Tmp3 = PromoteOp(Node->getOperand(3)); Result = DAG.getAtomic(Node->getOpcode(), AtomNode->getChain(), AtomNode->getBasePtr(), Tmp2, Tmp3, - AtomNode->getVT(), AtomNode->getSrcValue(), + AtomNode->getSrcValue(), AtomNode->getAlignment()); // Remember that we legalized the chain. AddLegalizedOperand(Op.getValue(1), LegalizeOp(Result.getValue(1))); @@ -4297,7 +4297,7 @@ SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) { Tmp2 = PromoteOp(Node->getOperand(2)); Result = DAG.getAtomic(Node->getOpcode(), AtomNode->getChain(), AtomNode->getBasePtr(), Tmp2, - AtomNode->getVT(), AtomNode->getSrcValue(), + AtomNode->getSrcValue(), AtomNode->getAlignment()); // Remember that we legalized the chain. AddLegalizedOperand(Op.getValue(1), LegalizeOp(Result.getValue(1))); diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 1454a15778f..78281aa6326 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -2989,7 +2989,7 @@ SDOperand SelectionDAG::getMemset(SDOperand Chain, SDOperand Dst, SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain, SDOperand Ptr, SDOperand Cmp, - SDOperand Swp, MVT VT, const Value* PtrVal, + SDOperand Swp, const Value* PtrVal, unsigned Alignment) { assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); @@ -2997,11 +2997,10 @@ SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain, FoldingSetNodeID ID; SDOperand Ops[] = {Chain, Ptr, Cmp, Swp}; AddNodeIDNode(ID, Opcode, VTs, Ops, 4); - ID.AddInteger(VT.getRawBits()); void* IP = 0; if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) return SDOperand(E, 0); - SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, VT, + SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, PtrVal, Alignment); CSEMap.InsertNode(N, IP); AllNodes.push_back(N); @@ -3010,7 +3009,7 @@ SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain, SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain, SDOperand Ptr, SDOperand Val, - MVT VT, const Value* PtrVal, + const Value* PtrVal, unsigned Alignment) { assert(( Opcode == ISD::ATOMIC_LOAD_ADD || Opcode == ISD::ATOMIC_LOAD_SUB || Opcode == ISD::ATOMIC_SWAP || Opcode == ISD::ATOMIC_LOAD_AND @@ -3023,11 +3022,10 @@ SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain, FoldingSetNodeID ID; SDOperand Ops[] = {Chain, Ptr, Val}; AddNodeIDNode(ID, Opcode, VTs, Ops, 3); - ID.AddInteger(VT.getRawBits()); void* IP = 0; if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) return SDOperand(E, 0); - SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, VT, + SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, PtrVal, Alignment); CSEMap.InsertNode(N, IP); AllNodes.push_back(N); @@ -4217,7 +4215,7 @@ GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, /// getMemOperand - Return a MachineMemOperand object describing the memory /// reference performed by this atomic. MachineMemOperand AtomicSDNode::getMemOperand() const { - int Size = (getVT().getSizeInBits() + 7) >> 3; + int Size = (getValueType(0).getSizeInBits() + 7) >> 3; int Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index e20a7a7fd61..ea43e56124c 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -3085,10 +3085,9 @@ static void addCatchInfo(CallInst &I, MachineModuleInfo *MMI, const char * SelectionDAGLowering::implVisitBinaryAtomic(CallInst& I, ISD::NodeType Op) { SDOperand Root = getRoot(); - SDOperand O2 = getValue(I.getOperand(2)); SDOperand L = DAG.getAtomic(Op, Root, getValue(I.getOperand(1)), - O2, O2.getValueType(), + getValue(I.getOperand(2)), I.getOperand(1)); setValue(&I, L); DAG.setRoot(L.getValue(1)); @@ -3521,11 +3520,10 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { } case Intrinsic::atomic_cmp_swap: { SDOperand Root = getRoot(); - SDOperand O3 = getValue(I.getOperand(3)); SDOperand L = DAG.getAtomic(ISD::ATOMIC_CMP_SWAP, Root, getValue(I.getOperand(1)), getValue(I.getOperand(2)), - O3, O3.getValueType(), + getValue(I.getOperand(3)), I.getOperand(1)); setValue(&I, L); DAG.setRoot(L.getValue(1)); diff --git a/lib/Target/TargetSelectionDAG.td b/lib/Target/TargetSelectionDAG.td index c30933d0f9a..83bb3e04eb6 100644 --- a/lib/Target/TargetSelectionDAG.td +++ b/lib/Target/TargetSelectionDAG.td @@ -768,75 +768,75 @@ def post_truncstf32 : PatFrag<(ops node:$val, node:$base, node:$offset), def atomic_cmp_swap_8 : PatFrag<(ops node:$ptr, node:$cmp, node:$swp), (atomic_cmp_swap node:$ptr, node:$cmp, node:$swp), [{ if (AtomicSDNode* V = dyn_cast(N)) - return V->getVT() == MVT::i8; + return V->getValueType(0) == MVT::i8; return false; }]>; def atomic_cmp_swap_16 : PatFrag<(ops node:$ptr, node:$cmp, node:$swp), (atomic_cmp_swap node:$ptr, node:$cmp, node:$swp), [{ if (AtomicSDNode* V = dyn_cast(N)) - return V->getVT() == MVT::i16; + return V->getValueType(0) == MVT::i16; return false; }]>; def atomic_cmp_swap_32 : PatFrag<(ops node:$ptr, node:$cmp, node:$swp), (atomic_cmp_swap node:$ptr, node:$cmp, node:$swp), [{ if (AtomicSDNode* V = dyn_cast(N)) - return V->getVT() == MVT::i32; + return V->getValueType(0) == MVT::i32; return false; }]>; def atomic_cmp_swap_64 : PatFrag<(ops node:$ptr, node:$cmp, node:$swp), (atomic_cmp_swap node:$ptr, node:$cmp, node:$swp), [{ if (AtomicSDNode* V = dyn_cast(N)) - return V->getVT() == MVT::i64; + return V->getValueType(0) == MVT::i64; return false; }]>; def atomic_load_add_8 : PatFrag<(ops node:$ptr, node:$inc), (atomic_load_add node:$ptr, node:$inc), [{ if (AtomicSDNode* V = dyn_cast(N)) - return V->getVT() == MVT::i8; + return V->getValueType(0) == MVT::i8; return false; }]>; def atomic_load_add_16 : PatFrag<(ops node:$ptr, node:$inc), (atomic_load_add node:$ptr, node:$inc), [{ if (AtomicSDNode* V = dyn_cast(N)) - return V->getVT() == MVT::i16; + return V->getValueType(0) == MVT::i16; return false; }]>; def atomic_load_add_32 : PatFrag<(ops node:$ptr, node:$inc), (atomic_load_add node:$ptr, node:$inc), [{ if (AtomicSDNode* V = dyn_cast(N)) - return V->getVT() == MVT::i32; + return V->getValueType(0) == MVT::i32; return false; }]>; def atomic_load_add_64 : PatFrag<(ops node:$ptr, node:$inc), (atomic_load_add node:$ptr, node:$inc), [{ if (AtomicSDNode* V = dyn_cast(N)) - return V->getVT() == MVT::i64; + return V->getValueType(0) == MVT::i64; return false; }]>; def atomic_swap_8 : PatFrag<(ops node:$ptr, node:$inc), (atomic_swap node:$ptr, node:$inc), [{ if (AtomicSDNode* V = dyn_cast(N)) - return V->getVT() == MVT::i8; + return V->getValueType(0) == MVT::i8; return false; }]>; def atomic_swap_16 : PatFrag<(ops node:$ptr, node:$inc), (atomic_swap node:$ptr, node:$inc), [{ if (AtomicSDNode* V = dyn_cast(N)) - return V->getVT() == MVT::i16; + return V->getValueType(0) == MVT::i16; return false; }]>; def atomic_swap_32 : PatFrag<(ops node:$ptr, node:$inc), (atomic_swap node:$ptr, node:$inc), [{ if (AtomicSDNode* V = dyn_cast(N)) - return V->getVT() == MVT::i32; + return V->getValueType(0) == MVT::i32; return false; }]>; def atomic_swap_64 : PatFrag<(ops node:$ptr, node:$inc), (atomic_swap node:$ptr, node:$inc), [{ if (AtomicSDNode* V = dyn_cast(N)) - return V->getVT() == MVT::i64; + return V->getValueType(0) == MVT::i64; return false; }]>; diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index ae7f6e77c06..16714427ba5 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -5656,7 +5656,7 @@ SDOperand X86TargetLowering::LowerCTTZ(SDOperand Op, SelectionDAG &DAG) { } SDOperand X86TargetLowering::LowerCMP_SWAP(SDOperand Op, SelectionDAG &DAG) { - MVT T = cast(Op.Val)->getVT(); + MVT T = Op.getValueType(); unsigned Reg = 0; unsigned size = 0; switch(T.getSimpleVT()) { @@ -5687,7 +5687,7 @@ SDOperand X86TargetLowering::LowerCMP_SWAP(SDOperand Op, SelectionDAG &DAG) { } SDNode* X86TargetLowering::ExpandATOMIC_CMP_SWAP(SDNode* Op, SelectionDAG &DAG) { - MVT T = cast(Op)->getVT(); + MVT T = Op->getValueType(0); assert (T == MVT::i64 && "Only know how to expand i64 Cmp and Swap"); SDOperand cpInL, cpInH; cpInL = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op->getOperand(3), @@ -5723,12 +5723,12 @@ SDNode* X86TargetLowering::ExpandATOMIC_CMP_SWAP(SDNode* Op, SelectionDAG &DAG) } SDNode* X86TargetLowering::ExpandATOMIC_LOAD_SUB(SDNode* Op, SelectionDAG &DAG) { - MVT T = cast(Op)->getVT(); + MVT T = Op->getValueType(0); assert (T == MVT::i32 && "Only know how to expand i32 Atomic Load Sub"); SDOperand negOp = DAG.getNode(ISD::SUB, T, DAG.getConstant(0, T), Op->getOperand(2)); return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, Op->getOperand(0), - Op->getOperand(1), negOp, T, + Op->getOperand(1), negOp, cast(Op)->getSrcValue(), cast(Op)->getAlignment()).Val; } -- 2.34.1