From f95701286664df01a5683a71c9a02c056fed0aa7 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Thu, 14 May 2009 00:46:35 +0000 Subject: [PATCH] Update the names of the exception handling sjlj instrinsics to llvm.eh.sjlj.* for better clarity as to their purpose and scope. Add a description of llvm.eh.sjlj.setjmp to ExceptionHandling.html. (llvm.eh.sjlj.longjmp documentation coming when that implementation is added). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71758 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/ExceptionHandling.html | 26 ++++++++++++++++++++++++++ include/llvm/Intrinsics.td | 4 ++-- lib/Target/ARM/ARMISelLowering.cpp | 4 ++-- lib/Target/ARM/ARMISelLowering.h | 4 ++-- lib/Target/ARM/ARMInstrInfo.cpp | 2 +- lib/Target/ARM/ARMInstrInfo.td | 20 +++++++++++--------- 6 files changed, 44 insertions(+), 16 deletions(-) diff --git a/docs/ExceptionHandling.html b/docs/ExceptionHandling.html index 24a34844c7b..7676e09b277 100644 --- a/docs/ExceptionHandling.html +++ b/docs/ExceptionHandling.html @@ -31,6 +31,8 @@
  • llvm.eh.exception
  • llvm.eh.selector
  • llvm.eh.typeid.for
    • +
  • llvm.eh.sjlj.setjmp
    • +
  • llvm.eh.sjlj.longjmp
  • Asm Table Formats
      @@ -400,6 +402,30 @@ a reference to a type info.

      + +
      + llvm.eh.sjlj.setjmp +
      + +
      +
      +  i32 %llvm.eh.sjlj.setjmp(i8*)
+
      + +

      The SJLJ exception handling uses this intrinsic to force register saving +for the current function and to store the address of the following instruction +for use as a destination address by +llvm.eh.sjlj.longjmp. The buffer format and the overall functioning +of this intrinsic is compatible with the GCC __builtin_setjmp implementation, +allowing code built with the two compilers to interoperate.

      + +

      The single parameter is a pointer to a five word buffer in which the +calling context is saved. The front end places the frame pointer in the +first word, and the target implementation of this intrinsic should place the +destination address for a + llvm.eh.sjlj.longjmp in the second word. The following three words are available for use in a +target-specific manner.

      +
      Asm Table Formats diff --git a/include/llvm/Intrinsics.td b/include/llvm/Intrinsics.td index 7c869f0aa30..bce3ce098f1 100644 --- a/include/llvm/Intrinsics.td +++ b/include/llvm/Intrinsics.td @@ -300,8 +300,8 @@ def int_eh_unwind_init: Intrinsic<[llvm_void_ty]>, def int_eh_dwarf_cfa : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty]>; let Properties = [IntrNoMem] in { -def int_builtinsetjmp : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty]>; -def int_builtinlongjmp : Intrinsic<[llvm_void_ty], [llvm_ptr_ty, llvm_i32_ty]>; +def int_eh_sjlj_setjmp : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty]>; +def int_eh_sjlj_longjmp : Intrinsic<[llvm_void_ty], [llvm_ptr_ty, llvm_i32_ty]>; } //===---------------- Generic Variable Attribute Intrinsics----------------===// diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index f5b33b02cab..d3cf6675f29 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -1045,8 +1045,8 @@ ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) { default: return SDValue(); // Don't custom lower most intrinsics. case Intrinsic::arm_thread_pointer: return DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); - case Intrinsic::builtinsetjmp: - SDValue Res = DAG.getNode(ARMISD::BUILTIN_SETJMP, dl, MVT::i32, + case Intrinsic::eh_sjlj_setjmp: + SDValue Res = DAG.getNode(ARMISD::EH_SJLJ_SETJMP, dl, MVT::i32, Op.getOperand(1)); return Res; } diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h index 32434124d82..0bd492fab67 100644 --- a/lib/Target/ARM/ARMISelLowering.h +++ b/lib/Target/ARM/ARMISelLowering.h @@ -64,8 +64,8 @@ namespace llvm { FMRRD, // double to two gprs. FMDRR, // Two gprs to double. - BUILTIN_SETJMP, // exception handling setjmp - BUILTIN_LONGJMP, // exception handling longjmp + EH_SJLJ_SETJMP, // SjLj exception handling setjmp + EH_SJLJ_LONGJMP, // SjLj exception handling longjmp THREAD_POINTER }; diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp index 8e678a8c461..4b0dbb5dacd 100644 --- a/lib/Target/ARM/ARMInstrInfo.cpp +++ b/lib/Target/ARM/ARMInstrInfo.cpp @@ -991,7 +991,7 @@ unsigned ARMInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { // If this machine instr is a constant pool entry, its size is recorded as // operand #2. return MI->getOperand(2).getImm(); - case ARM::Int_builtin_setjmp: return 12; + case ARM::Int_eh_sjlj_setjmp: return 12; case ARM::BR_JTr: case ARM::BR_JTm: case ARM::BR_JTadd: diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index cdc0ee55d77..d2e4c34e9cf 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -40,7 +40,7 @@ def SDT_ARMPICAdd : SDTypeProfile<1, 2, [SDTCisSameAs<0, 1>, SDTCisPtrTy<1>, SDTCisVT<2, i32>]>; def SDT_ARMThreadPointer : SDTypeProfile<1, 0, [SDTCisPtrTy<0>]>; -def SDT_ARMBuiltinSetjmp : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisPtrTy<1>]>; +def SDT_ARMEH_SJLJ_Setjmp : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisPtrTy<1>]>; // Node definitions. def ARMWrapper : SDNode<"ARMISD::Wrapper", SDTIntUnaryOp>; @@ -85,7 +85,7 @@ def ARMsra_flag : SDNode<"ARMISD::SRA_FLAG", SDTIntUnaryOp, [SDNPOutFlag]>; def ARMrrx : SDNode<"ARMISD::RRX" , SDTIntUnaryOp, [SDNPInFlag ]>; def ARMthread_pointer: SDNode<"ARMISD::THREAD_POINTER", SDT_ARMThreadPointer>; -def ARMbuiltin_setjmp: SDNode<"ARMISD::BUILTIN_SETJMP", SDT_ARMBuiltinSetjmp>; +def ARMeh_sjlj_setjmp: SDNode<"ARMISD::EH_SJLJ_SETJMP", SDT_ARMEH_SJLJ_Setjmp>; //===----------------------------------------------------------------------===// // ARM Instruction Predicate Definitions. @@ -1269,23 +1269,25 @@ let isCall = 1, //===----------------------------------------------------------------------===// // SJLJ Exception handling intrinsics -// setjmp() is a three instruction sequence to store the return address -// and save #0 in R0 for the non-longjmp case. +// eh_sjlj_setjmp() is a three instruction sequence to store the return +// address and save #0 in R0 for the non-longjmp case. // Since by its nature we may be coming from some other function to get // here, and we're using the stack frame for the containing function to // save/restore registers, we can't keep anything live in regs across -// the setjmp(), else it will almost certainly have been tromped upon +// the eh_sjlj_setjmp(), else it will almost certainly have been tromped upon // when we get here from a longjmp(). We force everthing out of registers -// except for our own input by listing the relevant registers in Defs. +// except for our own input by listing the relevant registers in Defs. By +// doing so, we also cause the prologue/epilogue code to actively preserve +// all of the callee-saved resgisters, which is exactly what we want. let Defs = [ R0, R1, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, LR, D0, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15 ] in { - def Int_builtin_setjmp : XI<(outs), (ins GPR:$src), + def Int_eh_sjlj_setjmp : XI<(outs), (ins GPR:$src), AddrModeNone, SizeSpecial, IndexModeNone, Pseudo, "add r0, pc, #4\n\t" "str r0, [$src, #+4]\n\t" - "mov r0, #0 @ setjmp", "", - [(set R0, (ARMbuiltin_setjmp GPR:$src))]>; + "mov r0, #0 @ eh_setjmp", "", + [(set R0, (ARMeh_sjlj_setjmp GPR:$src))]>; } //===----------------------------------------------------------------------===// -- 2.34.1