From f641395435ddfe2e3f0d9857fff4f6da77ee5427 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Thu, 28 Aug 2008 17:22:54 +0000 Subject: [PATCH] Revert r55467; it causes regressions in UnitTests/Vector/divides, Benchmarks/sim/sim, and others on x86-64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55475 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SimpleRegisterCoalescing.cpp | 65 ++----------------- lib/CodeGen/SimpleRegisterCoalescing.h | 7 -- test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll | 2 +- .../X86/2008-08-25-AsmRegTypeMismatch.ll | 4 +- 4 files changed, 6 insertions(+), 72 deletions(-) diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index 08c0ab3c54b..897eb710309 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -38,7 +38,6 @@ STATISTIC(numJoins , "Number of interval joins performed"); STATISTIC(numSubJoins , "Number of subclass joins performed"); STATISTIC(numCommutes , "Number of instruction commuting performed"); STATISTIC(numExtends , "Number of copies extended"); -STATISTIC(NumReMats , "Number of instructions re-materialized"); STATISTIC(numPeep , "Number of identity moves eliminated after coalescing"); STATISTIC(numAborts , "Number of times interval joining aborted"); @@ -427,43 +426,6 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, return true; } -/// ReMaterializeTrivialDef - If the source of a copy is defined by a trivial -/// computation, replace the copy by rematerialize the definition. -bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt, - unsigned DstReg, - MachineInstr *CopyMI) { - unsigned CopyIdx = li_->getUseIndex(li_->getInstructionIndex(CopyMI)); - LiveInterval::iterator SrcLR = SrcInt.FindLiveRangeContaining(CopyIdx); - if (SrcLR == SrcInt.end()) // Should never happen! - return false; - VNInfo *ValNo = SrcLR->valno; - // If other defs can reach uses of this def, then it's not safe to perform - // the optimization. - if (ValNo->def == ~0U || ValNo->def == ~1U || ValNo->hasPHIKill) - return false; - MachineInstr *DefMI = li_->getInstructionFromIndex(ValNo->def); - const TargetInstrDesc &TID = DefMI->getDesc(); - if (!TID.isAsCheapAsAMove()) - return false; - bool SawStore = false; - if (!DefMI->isSafeToMove(tii_, SawStore)) - return false; - - unsigned DefIdx = li_->getDefIndex(CopyIdx); - const LiveRange *DLR= li_->getInterval(DstReg).getLiveRangeContaining(DefIdx); - DLR->valno->copy = NULL; - - MachineBasicBlock::iterator MII = CopyMI; - MachineBasicBlock *MBB = CopyMI->getParent(); - tii_->reMaterialize(*MBB, MII, DstReg, DefMI); - MachineInstr *NewMI = prior(MII); - li_->ReplaceMachineInstrInMaps(CopyMI, NewMI); - CopyMI->eraseFromParent(); - ReMatCopies.insert(CopyMI); - ++NumReMats; - return true; -} - /// isBackEdgeCopy - Returns true if CopyMI is a back edge copy. /// bool SimpleRegisterCoalescing::isBackEdgeCopy(MachineInstr *CopyMI, @@ -513,17 +475,6 @@ SimpleRegisterCoalescing::UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg, unsigned UseDstReg = DstReg; if (OldSubIdx) UseDstReg = tri_->getSubReg(DstReg, OldSubIdx); - - unsigned CopySrcReg, CopyDstReg; - if (tii_->isMoveInstr(*UseMI, CopySrcReg, CopyDstReg) && - CopySrcReg != CopyDstReg && - CopySrcReg == SrcReg && CopyDstReg != UseDstReg) { - // If the use is a copy and it won't be coalesced away, and its source - // is defined by a trivial computation, try to rematerialize it instead. - if (ReMaterializeTrivialDef(li_->getInterval(SrcReg), CopyDstReg,UseMI)) - continue; - } - O.setReg(UseDstReg); O.setSubReg(0); } else { @@ -914,7 +865,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { MachineInstr *CopyMI = TheCopy.MI; Again = false; - if (JoinedCopies.count(CopyMI) || ReMatCopies.count(CopyMI)) + if (JoinedCopies.count(CopyMI)) return false; // Already done. DOUT << li_->getInstructionIndex(CopyMI) << '\t' << *CopyMI; @@ -1157,12 +1108,6 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { if (!isEmpty && !JoinIntervals(DstInt, SrcInt, Swapped)) { // Coalescing failed. - - // If definition of source is defined by trivial computation, try - // rematerializing it. - if (!isExtSubReg && !isInsSubReg && - ReMaterializeTrivialDef(SrcInt, DstInt.reg, CopyMI)) - return true; // If we can eliminate the copy without merging the live ranges, do so now. if (!isExtSubReg && !isInsSubReg && @@ -1266,6 +1211,9 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { if (TargetRegisterInfo::isVirtualRegister(DstReg)) RemoveUnnecessaryKills(DstReg, *ResDstInt); + // SrcReg is guarateed to be the register whose live interval that is + // being merged. + li_->removeInterval(SrcReg); if (isInsSubReg) // Avoid: // r1024 = op @@ -1275,10 +1223,6 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { RemoveDeadImpDef(DstReg, *ResDstInt); UpdateRegDefsUses(SrcReg, DstReg, SubIdx); - // SrcReg is guarateed to be the register whose live interval that is - // being merged. - li_->removeInterval(SrcReg); - if (isEmpty) { // Now the copy is being coalesced away, the val# previously defined // by the copy is being defined by an IMPLICIT_DEF which defines a zero @@ -2074,7 +2018,6 @@ void SimpleRegisterCoalescing::printRegName(unsigned reg) const { void SimpleRegisterCoalescing::releaseMemory() { JoinedCopies.clear(); - ReMatCopies.clear(); } static bool isZeroLengthInterval(LiveInterval *li) { diff --git a/lib/CodeGen/SimpleRegisterCoalescing.h b/lib/CodeGen/SimpleRegisterCoalescing.h index 62738952aa2..bb21515a354 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.h +++ b/lib/CodeGen/SimpleRegisterCoalescing.h @@ -96,10 +96,6 @@ namespace llvm { /// SmallPtrSet JoinedCopies; - /// ReMatCopies - Keep track of copies eliminated due to remat. - /// - SmallPtrSet ReMatCopies; - public: static char ID; // Pass identifcation, replacement for typeid SimpleRegisterCoalescing() : MachineFunctionPass((intptr_t)&ID) {} @@ -198,9 +194,6 @@ namespace llvm { bool RemoveCopyByCommutingDef(LiveInterval &IntA, LiveInterval &IntB, MachineInstr *CopyMI); - bool ReMaterializeTrivialDef(LiveInterval &SrcInt, unsigned DstReg, - MachineInstr *CopyMI); - /// TurnCopyIntoImpDef - If source of the specified copy is an implicit def, /// turn the copy into an implicit def. bool TurnCopyIntoImpDef(MachineBasicBlock::iterator &I, diff --git a/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll b/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll index b50f2b0a608..2b9f96e188d 100644 --- a/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll +++ b/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movd | count 1 +; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | not grep movd ; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movq ; PR2677 diff --git a/test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll b/test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll index 61240979ac3..8d987b5011f 100644 --- a/test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll +++ b/test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll @@ -1,7 +1,5 @@ -; RUN: llvm-as < %s | llc -mcpu=yonah | grep pxor | count 2 -; RUN: llvm-as < %s | llc -mcpu=yonah | not grep movapd +; RUN: llvm-as < %s | llc -mcpu=yonah ; PR2715 - target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" %struct.XPTTypeDescriptorPrefix = type { i8 } -- 2.34.1