From f5b5c5156c0ac6250d2980f51e47145096851d6f Mon Sep 17 00:00:00 2001
From: Rafael Espindola <rafael.espindola@gmail.com>
Date: Tue, 14 Jun 2011 06:08:32 +0000
Subject: [PATCH] Implement Jakob's suggestion on how to detect fall thought
 without calling AnalyzeBranch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132981 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 31 ++++++++++++++++-----------
 test/CodeGen/Thumb2/machine-licm.ll   |  4 ++--
 2 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index f324148cea4..187963c26a1 100644
--- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -1934,19 +1934,26 @@ isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const {
   if (Pred->empty())
     return true;
 
-  // Otherwise, ask the backend.
-  const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
-  MachineBasicBlock *PredTBB = NULL, *PredFBB = NULL;
-  SmallVector<MachineOperand, 4> PredCond;
-  if (TII->AnalyzeBranch(*Pred, PredTBB, PredFBB, PredCond))
-    return false;
-
-  if (PredTBB == MBB || PredFBB == MBB)
-    return false;
+  // Check the terminators in the previous blocks
+  for (MachineBasicBlock::iterator II = Pred->getFirstTerminator(),
+         IE = Pred->end(); II != IE; ++II) {
+    MachineInstr &MI = *II;
+
+    // If it is not a simple branch, we are in a table somewhere.
+    if (!MI.getDesc().isBranch() || MI.getDesc().isIndirectBranch())
+      return false;
+
+    // If we are the operands of one of the branches, this is not
+    // a fall through.
+    for (MachineInstr::mop_iterator OI = MI.operands_begin(),
+           OE = MI.operands_end(); OI != OE; ++OI) {
+      const MachineOperand& OP = *OI;
+      if (OP.isMBB() && OP.getMBB() == MBB)
+        return false;
+    }
+  }
 
-  // This is a fall through if there is no conditions in the bb
-  // or if there is no explicit false branch.
-  return PredCond.empty() || !PredFBB;
+  return true;
 }
 
 
diff --git a/test/CodeGen/Thumb2/machine-licm.ll b/test/CodeGen/Thumb2/machine-licm.ll
index 2468aa6cab8..ee054a165a0 100644
--- a/test/CodeGen/Thumb2/machine-licm.ll
+++ b/test/CodeGen/Thumb2/machine-licm.ll
@@ -13,7 +13,7 @@ entry:
   br i1 %0, label %return, label %bb.nph
 
 bb.nph:                                           ; preds = %entry
-; CHECK: LBB0_1:
+; CHECK: BB#1
 ; CHECK: movw r[[R2:[0-9]+]], :lower16:L_GV$non_lazy_ptr
 ; CHECK: movt r[[R2]], :upper16:L_GV$non_lazy_ptr
 ; CHECK: ldr{{(.w)?}} r[[R2b:[0-9]+]], [r[[R2]]
@@ -21,7 +21,7 @@ bb.nph:                                           ; preds = %entry
 ; CHECK: LBB0_2
 ; CHECK-NOT: LCPI0_0:
 
-; PIC: LBB0_1:
+; PIC: BB#1
 ; PIC: movw r[[R2:[0-9]+]], :lower16:(L_GV$non_lazy_ptr-(LPC0_0+4))
 ; PIC: movt r[[R2]], :upper16:(L_GV$non_lazy_ptr-(LPC0_0+4))
 ; PIC: add r[[R2]], pc
-- 
2.34.1