From ef8e5671375cde78dd9589ca21ffd34932acacd6 Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Fri, 13 Jun 2014 13:08:38 +0000 Subject: [PATCH] [mips][mips64r6] bc1any[24] are not available on MIPS32r6/MIPS64r6 Summary: These MIPS-3D instructions have never been implemented in LLVM so we only add testcases. Reviewers: zoran.jovanovic, jkolek, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D4115 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210899 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/Mips32r6InstrInfo.td | 1 - test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s | 11 +++++++++++ test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s | 6 +++++- 3 files changed, 16 insertions(+), 2 deletions(-) create mode 100644 test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s diff --git a/lib/Target/Mips/Mips32r6InstrInfo.td b/lib/Target/Mips/Mips32r6InstrInfo.td index 2ed580e67ad..f2421418152 100644 --- a/lib/Target/Mips/Mips32r6InstrInfo.td +++ b/lib/Target/Mips/Mips32r6InstrInfo.td @@ -25,7 +25,6 @@ include "Mips32r6InstrFormats.td" // Reencoded: sdbbp // Reencoded: sdc2 // Reencoded: swc2 -// Removed: bc1any2, bc1any4 // Rencoded: [ls][wd]c2 def brtarget21 : Operand { diff --git a/test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s b/test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s new file mode 100644 index 00000000000..99d10c327a4 --- /dev/null +++ b/test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s @@ -0,0 +1,11 @@ +# Instructions that are invalid but currently emit the wrong error message. +# +# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \ +# RUN: 2>%t1 +# RUN: FileCheck %s < %t1 + + .set noat + bc1any2f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc1any2t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc1any4f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc1any4t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction diff --git a/test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s b/test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s index 6b980e6ed9a..4fc94e26eb1 100644 --- a/test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s +++ b/test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s @@ -1,4 +1,4 @@ -# Instructions that are invalid +# Instructions that are invalid but currently emit the wrong error message. # # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 \ # RUN: 2>%t1 @@ -8,6 +8,10 @@ abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction alnv.ps $f12,$f18,$f30,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc1any2f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc1any2t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc1any4f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc1any4t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction c.f.ps $fcc6,$f11,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction c.le.ps $fcc1,$f7,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction -- 2.34.1