From ee2624174704f7490957acc1c751075021022404 Mon Sep 17 00:00:00 2001
From: ZhuangXiaoLiang <zhuangxl@rock-chips.com>
Date: Tue, 14 Mar 2017 16:39:16 +0800
Subject: [PATCH] ARM64: dts: rk3368: Update gpu opp table.

Change-Id: Id155a49d96e7533cb8c7f930c63528f452836b0e
Signed-off-by: ZhuangXiaoLiang <zhuangxl@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 30 ++++++++++++++++++------
 1 file changed, 23 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index c72a34846f39..b86151955790 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -1105,15 +1105,31 @@
 			"sclk_gpu_core",
 			"aclk_gpu_mem",
 			"aclk_gpu_cfg";
-		operating-points = <
-			/* KHz uV */
-			200000 1100000
-			288000 1100000
-			400000 1150000
-			576000 1200000
-		>;
 		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "rogue-g6110-irq";
+		operating-points-v2 = <&gpu_opp_table>;
+	};
+
+	gpu_opp_table: gpu_opp_table {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp@200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <950000>;
+		};
+		opp@288000000 {
+			opp-hz = /bits/ 64 <288000000>;
+			opp-microvolt = <1025000>;
+		};
+		opp@400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <1050000>;
+		};
+		opp@576000000 {
+			opp-hz = /bits/ 64 <576000000>;
+			opp-microvolt = <1200000>;
+		};
 	};
 
 	efuse: efuse@ffb00000 {
-- 
2.34.1