From ebdabda708348d54d86719a1af30e2410b5bcc0a Mon Sep 17 00:00:00 2001
From: Rafael Espindola <rafael.espindola@gmail.com>
Date: Thu, 21 Sep 2006 13:06:26 +0000
Subject: [PATCH] more condition codes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30567 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/ARM/ARMISelDAGToDAG.cpp |  9 +++++-
 test/CodeGen/ARM/select.ll         | 45 ++++++++++++++++++++++++++++--
 2 files changed, 51 insertions(+), 3 deletions(-)

diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 74bfdc3da24..8c9cf27fc76 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -87,7 +87,14 @@ namespace llvm {
 /// DAGCCToARMCC - Convert a DAG integer condition code to an ARM CC
 static ARMCC::CondCodes DAGCCToARMCC(ISD::CondCode CC) {
   switch (CC) {
-  default: assert(0 && "Unknown condition code!");
+  default:
+    std::cerr << "CC = " << CC << "\n";
+    assert(0 && "Unknown condition code!");
+  case ISD::SETUGT: return ARMCC::HI;
+  case ISD::SETULE: return ARMCC::LS;
+  case ISD::SETLE:  return ARMCC::LE;
+  case ISD::SETLT:  return ARMCC::LT;
+  case ISD::SETGT:  return ARMCC::GT;
   case ISD::SETNE:  return ARMCC::NE;
   case ISD::SETEQ:  return ARMCC::EQ;
   case ISD::SETGE:  return ARMCC::GE;
diff --git a/test/CodeGen/ARM/select.ll b/test/CodeGen/ARM/select.ll
index 7204c801c5b..0bfffc89b4f 100644
--- a/test/CodeGen/ARM/select.ll
+++ b/test/CodeGen/ARM/select.ll
@@ -1,8 +1,49 @@
-; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=arm &&
+; RUN: llvm-as < %s | llc -march=arm | grep moveq | wc -l | grep 1 &&
+; RUN: llvm-as < %s | llc -march=arm | grep movgt | wc -l | grep 1 &&
+; RUN: llvm-as < %s | llc -march=arm | grep movlt | wc -l | grep 1 &&
+; RUN: llvm-as < %s | llc -march=arm | grep movle | wc -l | grep 1 &&
+; RUN: llvm-as < %s | llc -march=arm | grep movls | wc -l | grep 1 &&
+; RUN: llvm-as < %s | llc -march=arm | grep movhi | wc -l | grep 1
 
-int %f(int %a) {
+int %f1(int %a) {
 entry:
 	%tmp = seteq int %a, 4		; <bool> [#uses=1]
 	%tmp1 = select bool %tmp, int 2, int 3
 	ret int %tmp1
 }
+
+int %f2(int %a) {
+entry:
+	%tmp = setgt int %a, 4		; <bool> [#uses=1]
+	%tmp1 = select bool %tmp, int 2, int 3
+	ret int %tmp1
+}
+
+int %f3(int %a, int %b) {
+entry:
+	%tmp = setlt int %a, %b		; <bool> [#uses=1]
+	%tmp1 = select bool %tmp, int 2, int 3
+	ret int %tmp1
+}
+
+int %f4(int %a, int %b) {
+entry:
+	%tmp = setle int %a, %b		; <bool> [#uses=1]
+	%tmp1 = select bool %tmp, int 2, int 3
+	ret int %tmp1
+}
+
+int %f5(uint %a, uint %b) {
+entry:
+	%tmp = setle uint %a, %b		; <bool> [#uses=1]
+	%tmp1 = select bool %tmp, int 2, int 3
+	ret int %tmp1
+}
+
+int %f6(uint %a, uint %b) {
+entry:
+	%tmp = setgt uint %a, %b		; <bool> [#uses=1]
+	%tmp1 = select bool %tmp, int 2, int 3
+	ret int %tmp1
+}
-- 
2.34.1